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    0.4MM PITCH 2.5X2.5MM Search Results

    0.4MM PITCH 2.5X2.5MM Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    CYD18S18V18-167BBAXC Rochester Electronics LLC 1MX18 DUAL-PORT SRAM, PBGA256, 17 X 17 MM, 1 MM PITCH, LEAD FREE, MO-192, FBGA-256 Visit Rochester Electronics LLC Buy
    MG80960MC-25 Rochester Electronics LLC RISC Microprocessor, 32-Bit, 25MHz, CMOS, CPGA132, 2.54 MM PITCH, CERAMIC, PGA-132 Visit Rochester Electronics LLC Buy
    A82380-25 Rochester Electronics LLC Multifunction Peripheral, CHMOS, CPGA132, 2.54 MM PITCH, CERAMIC, PGA-132 Visit Rochester Electronics LLC Buy
    A82380-20 Rochester Electronics LLC Multifunction Peripheral, CHMOS, CPGA132, 2.54 MM PITCH, CERAMIC, PGA-132 Visit Rochester Electronics LLC Buy
    CYD18S18V18-167BBAXI Rochester Electronics LLC 1MX18 DUAL-PORT SRAM, 4ns, PBGA256, 17 X 17 MM, 1.70 MM HEIGHT, 1 MM PITCH, LEAD FREE, MO-192, FBGA-256 Visit Rochester Electronics LLC Buy

    0.4MM PITCH 2.5X2.5MM Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: iCE40 LP/HX Family Data Sheet DS1040 Version 02.5, August 2013 iCE40 LP/HX Family Data Sheet Introduction August 2013 Data Sheet DS1040  Flexible On-Chip Clocking Features • Eight low-skew global clock resources • Up to two analog PLLs per device


    Original     		PDF iCE40â DS1040 iCE40 DS1040 Distribut2013

    Untitled

    Abstract: No abstract text available
    Text: iCE40 LP/HX Family Data Sheet DS1040 Version 02.4, July 2013 iCE40 LP/HX Family Data Sheet Introduction July 2013 Data Sheet DS1040  Flexible On-Chip Clocking Features • Eight low-skew global clock resources • Up to two analog PLLs per device  Flexible Logic Architecture


    Original     		PDF iCE40â DS1040 iCE40 DS1040

    LATTICE SEMICONDUCTOR Tape and Reel Specification

    Abstract: LVDS25E 0.4mm pitch BGA routing ICE40 FPGA pitch 0.4mm BGA 0.4mm pitch 2.5x2.5mm
    Text: iCE40 LP/HX Family Data Sheet DS1040 Version 02.3, May 2013 iCE40 LP/HX Family Data Sheet Introduction April 2013 Data Sheet DS1040  Flexible On-Chip Clocking Features • Eight low-skew global clock resources • Up to two analog PLLs per device  Flexible Logic Architecture


    Original     		PDF iCE40TM DS1040 iCE40 DS1040 LATTICE SEMICONDUCTOR Tape and Reel Specification LVDS25E 0.4mm pitch BGA routing ICE40 FPGA pitch 0.4mm BGA 0.4mm pitch 2.5x2.5mm

    Untitled

    Abstract: No abstract text available
    Text: iCE40 LP/HX Family Data Sheet DS1040 Version 02.6, September 2013 iCE40 LP/HX Family Data Sheet Introduction August 2013 Data Sheet DS1040  Flexible On-Chip Clocking Features • Eight low-skew global clock resources • Up to two analog PLLs per device


    Original     		PDF iCE40â DS1040 iCE40 DS1040

    ICE40 lattice

    Abstract: ICE40 FPGA 0.4mm pitch BGA routing TN1251 ICE40LP1K ICE40LP1K-CM36 GDDR71 pitch 0.4mm BGA 0.4mm pitch 2.5x2.5mm ICE40LP384SG32
    Text: iCE40 LP/HX Family Data Sheet DS1040 Version 02.2, April 2013 iCE40 LP/HX Family Data Sheet Introduction April 2013 Data Sheet DS1040  Flexible On-Chip Clocking Features • Eight low-skew global clock resources • Up to two analog PLLs per device  Flexible Logic Architecture


    Original     		PDF iCE40TM DS1040 iCE40 DS1040 ICE40 lattice ICE40 FPGA 0.4mm pitch BGA routing TN1251 ICE40LP1K ICE40LP1K-CM36 GDDR71 pitch 0.4mm BGA 0.4mm pitch 2.5x2.5mm ICE40LP384SG32

    35x45mm

    Abstract: 6X6 mlp
    Text: FIN212AC 12-Bit Serializer Deserializer with Multiple Frequency Ranges Features Description ƒ ƒ ƒ ƒ ƒ ƒ Low Power Consumption The FIN212AC µSerDes is a low-power serializer / deserializer optimized for use in cell phone displays and camera paths. The device reduces a 12-bit data path to


    Original     		PDF FIN212AC 12-Bit FIN212AC 35x45mm 6X6 mlp

    Untitled

    Abstract: No abstract text available
    Text: FIN212AC 12-Bit Serializer Deserializer with Multiple Frequency Ranges Features Description ƒ ƒ ƒ ƒ ƒ ƒ Low Power Consumption The FIN212AC µSerDes is a low-power serializer / deserializer optimized for use in cell phone displays and camera paths. The device reduces a 12-bit data path to


    Original     		PDF FIN212AC 12-Bit FIN212AC 32-Lead, 42-Ball,

    Untitled

    Abstract: No abstract text available
    Text: Click to see this datasheet in Simplified Chinese! FIN212AC 12-Bit Serializer Deserializer with Multiple Frequency Ranges Features ƒ Low Power Consumption ƒ Low Power, Proprietary, CTL I/O Serial Interface ƒ Wide PLL Input Frequency Range ƒ Wide Parallel Supply Voltage Range: 1.65 to 3.6V


    Original     		PDF FIN212AC 12-Bit FIN212AC

    FIN212AC

    Abstract: FIN212ACGFX FIN212ACMLX MO-195 MO-220 AN-5058 AN-5061 13M-pixel
    Text: FIN212AC 12-Bit Serializer Deserializer with Multiple Frequency Ranges Features Description ƒ ƒ ƒ ƒ ƒ ƒ Low Power Consumption The FIN212AC µSerDes is a low-power serializer / deserializer optimized for use in cell phone displays and camera paths. The device reduces a 12-bit data path to


    Original     		PDF FIN212AC 12-Bit FIN212AC FIN212ACGFX FIN212ACMLX MO-195 MO-220 AN-5058 AN-5061 13M-pixel

    FIN212AC

    Abstract: No abstract text available
    Text: FIN212AC 12-Bit Serializer Deserializer with Multiple Frequency Ranges Features Description ƒ ƒ ƒ ƒ ƒ ƒ Low Power Consumption The FIN212AC µSerDes is a low-power serializer / deserializer optimized for use in cell phone displays and camera paths. The device reduces a 12-bit data path to


    Original     		PDF FIN212AC 12-Bit FIN212AC 42-Ball, 36-Ball,

    FIN212AC

    Abstract: 5M cmos camera AN-5058 AN-5061 DP10 FIN212ACBFX FIN212ACGFX FIN212ACMLX MO-195 MO-220
    Text: Click to see this datasheet in Simplified Chinese! FIN212AC 12-Bit Serializer Deserializer with Multiple Frequency Ranges Features ƒ Low Power Consumption ƒ Low Power, Proprietary, CTL I/O Serial Interface ƒ Wide PLL Input Frequency Range ƒ Wide Parallel Supply Voltage Range: 1.65 to 3.6V


    Original     		PDF FIN212AC 12-Bit FIN212AC 5M cmos camera AN-5058 AN-5061 DP10 FIN212ACBFX FIN212ACGFX FIN212ACMLX MO-195 MO-220

    Untitled

    Abstract: No abstract text available
    Text: MachXO2 Family Data Sheet DS1035 Version 2.6, July 2014 MachXO2 Family Data Sheet Introduction February 2014 Features Data Sheet DS1035  Flexible On-Chip Clocking • Eight primary clocks • Up to two edge clocks for high-speed I/O  interfaces top and bottom sides only


    Original     		PDF DS1035 DS1035 LCMXO2-2000ZE-1UWG49ITR UWG49 LCMXO2-2000ZE-1UWG49CTR

    Untitled

    Abstract: No abstract text available
    Text: MachXO2 Family Data Sheet DS1035 Version 02.4, February 2014 MachXO2 Family Data Sheet Introduction February 2014 Features Data Sheet DS1035  Flexible On-Chip Clocking • Eight primary clocks • Up to two edge clocks for high-speed I/O  interfaces top and bottom sides only


    Original     		PDF DS1035 DS1035 XO2-2000 LCMXO2-2000ZE-1UWG49CTR LCMXO2-2000ZE-1UWG49ITR

    Untitled

    Abstract: No abstract text available
    Text: MachXO2 Family Data Sheet DS1035 Version 2.5, May 2014 MachXO2 Family Data Sheet Introduction February 2014 Features Data Sheet DS1035  Flexible On-Chip Clocking • Eight primary clocks • Up to two edge clocks for high-speed I/O  interfaces top and bottom sides only


    Original     		PDF DS1035 DS1035 XO2-2000 LCMXO2-2000ZE-1UWG49CTR LCMXO2-2000ZE-1UWG49ITR

    Untitled

    Abstract: No abstract text available
    Text: MachXO2 Family Data Sheet Preliminary DS1035 Version 01.5, August 2011 MachXO2 Family Data Sheet Introduction April 2011 Features Preliminary Data Sheet DS1035  Flexible On-Chip Clocking • Eight primary clocks • Up to two edge clocks for high-speed I/O 


    Original     		PDF DS1035 DS1035 MachXO2-2000 MachXO2-1200-R1 LCMX02-2000UHE4FG484I, LCMX02-2000UHE-5FG484I, LCMX02-2000UHE-6FG484I. AN8086,

    LCMXO2-256 pinout

    Abstract: No abstract text available
    Text: MachXO2 Family Data Sheet Preliminary DS1035 Version 01.2, April 2011 MachXO2 Family Data Sheet Introduction April 2011 Features Preliminary Data Sheet DS1035  Flexible On-Chip Clocking • Eight primary clocks • Up to two edge clocks for high-speed I/O 


    Original     		PDF DS1035 DS1035 LCMXO2-256 pinout

    MACHXO2 7000 pinout

    Abstract: MachXO2-4000
    Text: MachXO2 Family Data Sheet DS1035 Version 02.3, December 2013 MachXO2 Family Data Sheet Introduction January 2013 Features Data Sheet DS1035  Flexible On-Chip Clocking • Eight primary clocks • Up to two edge clocks for high-speed I/O  interfaces top and bottom sides only


    Original     		PDF DS1035 DS1035 0A-13. MACHXO2 7000 pinout MachXO2-4000

    Untitled

    Abstract: No abstract text available
    Text: MachXO2 Family Data Sheet DS1035 Version 02.1, June 2013 MachXO2 Family Data Sheet Introduction January 2013 Features Data Sheet DS1035  Flexible On-Chip Clocking • Eight primary clocks • Up to two edge clocks for high-speed I/O  interfaces top and bottom sides only


    Original     		PDF DS1035 DS1035 MachXO2-4000HE

    Untitled

    Abstract: No abstract text available
    Text: MachXO2 Family Data Sheet DS1035 Version 02.0, January 2013 MachXO2 Family Data Sheet Introduction January 2013 Features Data Sheet DS1035  Flexible On-Chip Clocking • Eight primary clocks • Up to two edge clocks for high-speed I/O  interfaces top and bottom sides only


    Original     		PDF DS1035 DS1035 MachXO2-4000HE

    Untitled

    Abstract: No abstract text available
    Text: MachXO2 Family Data Sheet DS1035 Version 02.0, January 2013 MachXO2 Family Data Sheet Introduction January 2013 Features Data Sheet DS1035  Flexible On-Chip Clocking • Eight primary clocks • Up to two edge clocks for high-speed I/O  interfaces top and bottom sides only


    Original     		PDF DS1035 DS1035 MachXO2-4000HE

    Untitled

    Abstract: No abstract text available
    Text: MachXO2 Family Data Sheet DS1035 Version 02.2, September 2013 MachXO2 Family Data Sheet Introduction January 2013 Features Data Sheet DS1035  Flexible On-Chip Clocking • Eight primary clocks • Up to two edge clocks for high-speed I/O  interfaces top and bottom sides only


    Original     		PDF DS1035 DS1035 0A-13.

    LCMXO2-256 pinout

    Abstract: LCMXO2-2000 pinout
    Text: MachXO2 Family Data Sheet DS1035 Version 02.1, June 2013 MachXO2 Family Data Sheet Introduction January 2013 Features Data Sheet DS1035  Flexible On-Chip Clocking • Eight primary clocks • Up to two edge clocks for high-speed I/O  interfaces top and bottom sides only


    Original     		PDF DS1035 DS1035 MachXO2-4000HE LCMXO2-256 pinout LCMXO2-2000 pinout

    LCMX02 1200

    Abstract: LCMX02 LCMX02 256 LCMX02 640 MACHXO2 1200 pinout file LCMXO2-1200HC-4MG132C MACHXO2 7000 pinout file MACHXO2-1200ZE LCMXO2-7000 LCMXO2-2000
    Text: MachXO2 Family Data Sheet DS1035 Version 01.8, March 2012 MachXO2 Family Data Sheet Introduction March 2012 Features Data Sheet DS1035  Flexible On-Chip Clocking • Eight primary clocks • Up to two edge clocks for high-speed I/O  interfaces top and bottom sides only


    Original     		PDF DS1035 DS1035 49-ball LCMX02 1200 LCMX02 LCMX02 256 LCMX02 640 MACHXO2 1200 pinout file LCMXO2-1200HC-4MG132C MACHXO2 7000 pinout file MACHXO2-1200ZE LCMXO2-7000 LCMXO2-2000

    LCMXO2-4000

    Abstract: LCMX02 LCMX02 1200 MACHXO2 7000 pinout file LCMXO2 640HC LCMXO2-4000HC LCMXO2-1200HC-4TG100C LCMXO2-7000HC MachXO2 LCMXO2-1200HC-4MG132C
    Text: MachXO2 Family Data Sheet DS1035 Version 01.9, April 2012 MachXO2 Family Data Sheet Introduction March 2012 Features Data Sheet DS1035  Flexible On-Chip Clocking • Eight primary clocks • Up to two edge clocks for high-speed I/O  interfaces top and bottom sides only


    Original     		PDF DS1035 DS1035 TN1200. LCMXO2-1200ZE1UWG25ITR50. LCMXO2-1200ZE-1UWG25ITR. LCMXO2-4000 LCMX02 LCMX02 1200 MACHXO2 7000 pinout file LCMXO2 640HC LCMXO2-4000HC LCMXO2-1200HC-4TG100C LCMXO2-7000HC MachXO2 LCMXO2-1200HC-4MG132C