CY7C1302DV25
Abstract: CY7C1302DV25-167 3M Touch Systems
Text: CY7C1302DV25 9-Mbit Burst of Two Pipelined SRAMs with QDR Architecture 9-Mbit Burst of Two Pipelined SRAMs with QDR™ Architecture Features Functional Description • Separate independent Read and Write data ports ❐ Supports concurrent transactions ■
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CY7C1302DV25
167-MHz
CY7C1302DV25
CY7C1302DV25-167
3M Touch Systems
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3M Touch Systems
Abstract: No abstract text available
Text: CY7C1302DV25 9-Mbit Burst of Two Pipelined SRAMs with QDR Architecture 9-Mbit Burst of Two Pipelined SRAMs with QDR™ Architecture Features Functional Description • Separate independent Read and Write data ports ❐ Supports concurrent transactions ■
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CY7C1302DV25
CY7C1302DV25
3M Touch Systems
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CY7C1303BV25
Abstract: CY7C1306BV25 3M Touch Systems
Text: CY7C1303BV25 CY7C1306BV25 18-Mbit Burst of Two-Pipelined SRAM with QDR Architecture 18-Mbit Burst of Two-Pipelined SRAM with QDR® Architecture Features Functional Description • Separate independent read and write data ports ❐ Supports concurrent transactions
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CY7C1303BV25
CY7C1306BV25
18-Mbit
CY7C1303BV25
CY7C1306BV25
3M Touch Systems
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3M Touch Systems
Abstract: No abstract text available
Text: CY7C1302DV25 9-Mbit Burst of Two Pipelined SRAMs with QDR Architecture 9-Mbit Burst of Two Pipelined SRAMs with QDR™ Architecture Features Functional Description • Separate independent Read and Write data ports ❐ Supports concurrent transactions ■
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CY7C1302DV25
CY7C1302DV25
3M Touch Systems
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Untitled
Abstract: No abstract text available
Text: CY7C1303BV25 18-Mbit Burst of Two-Pipelined SRAM with QDR Architecture 18-Mbit Burst of Two-Pipelined SRAM with QDR® Architecture Features Functional Description • Separate independent read and write data ports ❐ Supports concurrent transactions ■
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CY7C1303BV25
18-Mbit
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3M Touch Systems
Abstract: No abstract text available
Text: CY7C1303BV25 18-Mbit Burst of Two-Pipelined SRAM with QDR Architecture 18-Mbit Burst of Two-Pipelined SRAM with QDR® Architecture Features Functional Description • Separate independent read and write data ports ❐ Supports concurrent transactions ■
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CY7C1303BV25
18-Mbit
CY7C1303BV25
3M Touch Systems
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Untitled
Abstract: No abstract text available
Text: CY7C1302DV25 9-Mbit Burst of Two Pipelined SRAMs with QDR Architecture 9-Mbit Burst of Two Pipelined SRAMs with QDR™ Architecture Functional Description Features • Separate independent Read and Write data ports ❐ Supports concurrent transactions ■
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Original
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CY7C1302DV25
167-MHz
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3M Touch Systems
Abstract: No abstract text available
Text: CY7C1302DV25 9-Mbit Burst of Two Pipelined SRAMs with QDR Architecture 9-Mbit Burst of Two Pipelined SRAMs with QDR™ Architecture Features Functional Description • Separate independent Read and Write data ports ❐ Supports concurrent transactions ■
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Original
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CY7C1302DV25
CY7C1302DV25
3M Touch Systems
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Untitled
Abstract: No abstract text available
Text: CY7C1302DV25 9-Mbit Burst of Two Pipelined SRAMs with QDR Architecture 9-Mbit Burst of Two Pipelined SRAMs with QDR™ Architecture Features Functional Description • Separate independent Read and Write data ports ❐ Supports concurrent transactions ■
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Original
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CY7C1302DV25
167-MHz
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3M Touch Systems
Abstract: No abstract text available
Text: CY7C1303BV25 18-Mbit Burst of Two-Pipelined SRAM with QDR Architecture 18-Mbit Burst of Two-Pipelined SRAM with QDR® Architecture Features Functional Description • Separate independent read and write data ports ❐ Supports concurrent transactions ■
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CY7C1303BV25
18-Mbit
CY7C1303BV25
3M Touch Systems
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Untitled
Abstract: No abstract text available
Text: MSP430x43x1, MSP430x43x, MSP430x44x1, MSP430x44x MIXED SIGNAL MICROCONTROLLER SLAS344G − JANUARY 2002 − REVISED OCTOBER 2009 D Low Supply-Voltage Range, 1.8 V to 3.6 V D Ultralow-Power Consumption: D D D D D D D D D D D − Active Mode: 280 µA at 1 MHz, 2.2 V
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MSP430x43x1,
MSP430x43x,
MSP430x44x1,
MSP430x44x
SLAS344G
16-Bit
125-ns
12-Bit
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Untitled
Abstract: No abstract text available
Text: MSP430x43x1, MSP430x43x, MSP430x44x1, MSP430x44x MIXED SIGNAL MICROCONTROLLER SLAS344G − JANUARY 2002 − REVISED OCTOBER 2009 D Low Supply-Voltage Range, 1.8 V to 3.6 V D Ultralow-Power Consumption: D D D D D D D D D D D − Active Mode: 280 µA at 1 MHz, 2.2 V
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MSP430x43x1,
MSP430x43x,
MSP430x44x1,
MSP430x44x
SLAS344G
16-Bit
125-ns
12-Bit
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Untitled
Abstract: No abstract text available
Text: MSP430x43x1, MSP430x43x, MSP430x44x1, MSP430x44x MIXED SIGNAL MICROCONTROLLER SLAS344G − JANUARY 2002 − REVISED OCTOBER 2009 D Low Supply-Voltage Range, 1.8 V to 3.6 V D Ultralow-Power Consumption: D D D D D D D D D D D − Active Mode: 280 µA at 1 MHz, 2.2 V
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MSP430x43x1,
MSP430x43x,
MSP430x44x1,
MSP430x44x
SLAS344G
16-Bit
125-ns
12-Bit
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Untitled
Abstract: No abstract text available
Text: MSP430x43x1, MSP430x43x, MSP430x44x1, MSP430x44x MIXED SIGNAL MICROCONTROLLER SLAS344G − JANUARY 2002 − REVISED OCTOBER 2009 D Low Supply-Voltage Range, 1.8 V to 3.6 V D Ultralow-Power Consumption: D D D D D D D D D D D − Active Mode: 280 µA at 1 MHz, 2.2 V
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MSP430x43x1,
MSP430x43x,
MSP430x44x1,
MSP430x44x
SLAS344G
16-Bit
125-ns
12-Bit
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Untitled
Abstract: No abstract text available
Text: SN54ACT8990, SN74ACT8990 TEST-BUS CONTROLLERS IEEE STD 1149.1 JTAG TAP MASTERS WITH 16-BIT GENERIC HOST INTERFACES SCAS190E – JUNE 1990 – REVISED JANUARY 1997 D D D D D Members of the Texas Instruments SCOPE Family of Testability Products Compatible With the IEEE Standard
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SN54ACT8990,
SN74ACT8990
16-BIT
SCAS190E
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tbc 541
Abstract: ACT8990 SN54ACT8990 SN74ACT8990
Text: SN54ACT8990, SN74ACT8990 TEST-BUS CONTROLLERS IEEE STD 1149.1 JTAG TAP MASTERS WITH 16-BIT GENERIC HOST INTERFACES SCAS190E – JUNE 1990 – REVISED JANUARY 1997 D D D D D Members of the Texas Instruments SCOPE Family of Testability Products Compatible With the IEEE Standard
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SN54ACT8990,
SN74ACT8990
16-BIT
SCAS190E
tbc 541
ACT8990
SN54ACT8990
SN74ACT8990
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MSP430
Abstract: MSP430C1331 MSP430C1331IPM MSP430C1351 MSP430C1351IPM
Text: MSP430C13x1 MIXED SIGNAL MICROCONTROLLER SLAS341B − SEPTEMBER 2001 − REVISED SEPTEMBER 2004 D Low Supply-Voltage Range, 1.8 V to 3.6 V D Ultralow-Power Consumption: D D D D D D On-Chip Comparator D Serial Communication Interface USART , − Active Mode: 160 µA at 1 MHz, 2.2 V
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MSP430C13x1
SLAS341B
16-Bit
125-ns
MSP430
MSP430C1331
MSP430C1331IPM
MSP430C1351
MSP430C1351IPM
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5962R0922501VXC
Abstract: 5962R0922501QXC ISL70001SRHF ISL70001SRHVF ISL70001SRH Lxx 05 smd TB363 4060 SYNCHRONOUS COUNTER EQ122 1.9 TDI Voltage Regulator
Text: ISL70001SRH Features The ISL70001SRH is a radiation hardened and SEE hardened high efficiency monolithic synchronous buck regulator with integrated MOSFETs. This single chip power solution operates over an input voltage range of 3V to 5.5V and provides a tightly regulated output
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ISL70001SRH
ISL70001SRH
FN6947
5962R0922501VXC
5962R0922501QXC
ISL70001SRHF
ISL70001SRHVF
Lxx 05 smd
TB363
4060 SYNCHRONOUS COUNTER
EQ122
1.9 TDI Voltage Regulator
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Untitled
Abstract: No abstract text available
Text: MSP430C13x1 MIXED SIGNAL MICROCONTROLLER SLAS341C − SEPTEMBER 2001 − REVISED DECEMBER 2008 D Low Supply-Voltage Range, 1.8 V to 3.6 V D Ultralow Power Consumption: D D D D D D On-Chip Comparator D Serial Communication Interface USART , − Active Mode: 160 µA at 1 MHz, 2.2 V
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MSP430C13x1
SLAS341C
16-Bit
125-ns
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MSP430
Abstract: MSP430C1331 MSP430C1331IPM MSP430C1351 MSP430C1351IPM
Text: MSP430C13x1 MIXED SIGNAL MICROCONTROLLER SLAS341C − SEPTEMBER 2001 − REVISED DECEMBER 2008 D Low Supply-Voltage Range, 1.8 V to 3.6 V D Ultralow Power Consumption: D D D D D D On-Chip Comparator D Serial Communication Interface USART , − Active Mode: 160 A at 1 MHz, 2.2 V
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MSP430C13x1
SLAS341C
16-Bit
125-ns
MSP430
MSP430C1331
MSP430C1331IPM
MSP430C1351
MSP430C1351IPM
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Untitled
Abstract: No abstract text available
Text: WM2200 w Low Power CODEC with Enhanced Wolfson myZone Ambient Noise Cancellation DESCRIPTION FEATURES The WM2200 is a low power mobile CODEC with enhanced TM Wolfson myZone Ambient Noise Cancellation ANC . It is ideal for mobile telephony applications, providing enhanced
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WM2200
WM2200
DM097
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vqg44
Abstract: No abstract text available
Text: XA2C64A CoolRunner-II Automotive CPLD R DS553 v1.0 October 31, 2006 Features • • • • • • AEC-Q100 device qualification and full PPAP support available in both I-grade and extended temperature Q-grade Guaranteed to meet full electrical specifications over
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XA2C64A
DS553
AEC-Q100
44-pin
XAPP784:
XAPP375:
XAPP376:
XAPP378:
XAPP382:
XAPP389:
vqg44
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ACT8990
Abstract: SN54ACT8990 SN74ACT8990 scas190e
Text: SN54ACT8990, SN74ACT8990 TEST-BUS CONTROLLERS IEEE STD 1149.1 JTAG TAP MASTERS WITH 16-BIT GENERIC HOST INTERFACES SCAS190E – JUNE 1990 – REVISED JANUARY 1997 D D D D D Members of the Texas Instruments SCOPE Family of Testability Products Compatible With the IEEE Standard
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SN54ACT8990,
SN74ACT8990
16-BIT
SCAS190E
ACT8990
SN54ACT8990
SN74ACT8990
scas190e
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SN74ACT8990FNR
Abstract: No abstract text available
Text: SN54ACT8990, SN74ACT8990 TEST-BUS CONTROLLERS IEEE STD 1149.1 JTAG TAP MASTERS WITH 16-BIT GENERIC HOST INTERFACES SCAS190E – JUNE 1990 – REVISED JANUARY 1997 D D D D D Members of the Texas Instruments SCOPE Family of Testability Products Compatible With the IEEE Standard
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SN54ACT8990,
SN74ACT8990
16-BIT
SCAS190E
SN74ACT8990FNR
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