TSSOP 8PIN MARK 21
Abstract: land pattern for TSsOP 16 6pin land pattern for TSsOP 8 2952 8pin HA005-A-P
Text: CMOS IC PACKAGES Package Type DIP/TO Gull-wing Flat-lead WLP *1 Pin Count 3 8 4 5 3 5 6 3 5 8 14 8 10 8 16 24 8 5 6 8 8 10 6 4 6 8 4 5 6 8 Package Name TO-92 8-Pin DIP SC-82AB SC-88A SOT-23-3 SOT-23-5 SOT-23-6 SOT-89-3 SOT-89-5 8-Pin SOP JEDEC 14-Pin SOP
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Original
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SC-82AB
SC-88A
OT-23-3
OT-23-5
OT-23-6
OT-89-3
OT-89-5
14-Pin
10-Pin
16-Pin
TSSOP 8PIN MARK 21
land pattern for TSsOP 16
6pin
land pattern for TSsOP 8
2952 8pin
HA005-A-P
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PDF
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power amplifier 3000w diagram
Abstract: 3000w amplifier l1310 3000w power amplifier Circuit 3000w power amplifier circuit diagram ROSA 1310 10G T-11-10G-D-SLC DSA0048133
Text: 10 Gbps PIN-TIA Receiver Modules-ROSA 5 V T-11-10G-D-SLC Features • InGaAs/ InP PIN Photodiode with transimpedance amplifier • Differential output • Single +5V operation • 0 to +85˚C operating temperature Packaging • Integrated 4-pin TO-46 ROSA package for LC connector
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Original
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T-11-10G-D-SLC
LUMNDS240-1028
power amplifier 3000w diagram
3000w amplifier
l1310
3000w power amplifier Circuit
3000w power amplifier circuit diagram
ROSA 1310 10G
T-11-10G-D-SLC
DSA0048133
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PDF
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SP3 Series
Abstract: sp3122 SP3152 sp3810 SP3105 SP3165 SP-3350 sip schematic SL2T 125OC
Text: SP3 Series Mini-SIP Passive Delay Modules Similar 3-pin SIP refer to SIL2 Series Operating Specifications - Passive Delay Lines Fast Rise Time, Low DCR High Bandwidth 2-tap 4-pin SIP refer to SL2T Series Pulse Overshoot Pos . 5% to 10%, typical
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Original
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100VDC
100VDC
SP3-20-20
SP3 Series
sp3122
SP3152
sp3810
SP3105
SP3165
SP-3350
sip schematic
SL2T
125OC
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PDF
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Untitled
Abstract: No abstract text available
Text: SiT3807 Standard Frequency MEMS VCXO Preliminary Features, Benefits and Applications 30 standard frequencies from 1.544 MHz to 49.152 MHz 100% pin-to-pin drop-in replacement to quartz based VCXO Wide pull range options: ±50, ±100, ±150, ±200 Superior pull range linearity of <= 1%, 10 times better than quartz
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SiT3807
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PDF
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SiT5000AC
Abstract: No abstract text available
Text: SiT5000 Standard Frequency MEMS TCXO and VCTCXO Advanced Information • Features, Benefits and Applications ■ 26 standard frequencies between 10 MHz and 40 MHz ■ 100% pin-to-pin drop-in replacement to quartz-based TCXO ■ Excellent total frequency stability as low as ±0.5 PPM
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Original
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SiT5000
SiT5000AC
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PDF
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BXMP1019
Abstract: WNMP1019
Text: Medium Power Amplifier RF AMPLIFIER MODEL BXMP1019 Available as: TRMP1019, 4-Pin TO-8B Tall WNMP1019, 10 Pin .625” Sq. Surface Mount (SG4) BXMP1019, SMA Connectorized Housing Features ! ! ! ! Typical Intermodulation Performance at 25 º C High IP2: +70 dBm Typical
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BXMP1019
TRMP1019,
WNMP1019,
BXMP1019,
Vd260
BXMP1019
WNMP1019
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PDF
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ATF1516AS
Abstract: ATF1516AS-10QC160 ATF1516AS-10QHC208 ATF1516AS-10UC192 ATF1516AS-15Q160 ATF1516AS-15QC160 ATF1516AS-15QHC208 ATF1516AS-15UC192 ATF1516ASL
Text: Features • High-density, High-performance, Electrically-erasable Complex • • • • • • • • • • Programmable Logic Device – 256 Macrocells – 5 Product Terms per Macrocell, Expandable up to 40 per Macrocell – 160, 192, 208 pins – 10 ns Maximum Pin-to-pin Delay
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Original
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0994D
09/99/xM
ATF1516AS
ATF1516AS-10QC160
ATF1516AS-10QHC208
ATF1516AS-10UC192
ATF1516AS-15Q160
ATF1516AS-15QC160
ATF1516AS-15QHC208
ATF1516AS-15UC192
ATF1516ASL
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PDF
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"XOR Gate"
Abstract: d-latch JK flip flop jk flip flop to d flip flop conversion atmel 160 pin Atmel CPLD In-System Program internal circuitry for sr flip flop R S Flip Flop Latch sr flip flop ATF1516AS-10QC160
Text: Features • High-density, High-performance, Electrically-erasable Complex • • • • • • • • • • Programmable Logic Device – 256 Macrocells – 5 Product Terms per Macrocell, Expandable up to 40 per Macrocell – 160, 192, 208-pins – 10 ns Maximum Pin-to-pin Delay
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Original
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208-pins
0994C
09/99/xM
"XOR Gate"
d-latch
JK flip flop
jk flip flop to d flip flop conversion
atmel 160 pin
Atmel CPLD In-System Program
internal circuitry for sr flip flop
R S Flip Flop Latch
sr flip flop
ATF1516AS-10QC160
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PDF
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Untitled
Abstract: No abstract text available
Text: Features • High-density, High-performance, Electrically-erasable Complex • • • • • • • • • • Programmable Logic Device – 256 Macrocells – 5 Product Terms per Macrocell, Expandable up to 40 per Macrocell – 160, 192, 208-pins – 10 ns Maximum Pin-to-pin Delay
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Original
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208-pins
0994B
08/99/xM
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PDF
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jk flip flop to d flip flop conversion with diagram
Abstract: ATF1516AS ATF1516AS-10QC160 ATF1516AS-10QHC208 ATF1516AS-10UC192 ATF1516AS-15Q160 ATF1516AS-15QC160 ATF1516AS-15QHC208 ATF1516AS-15UC192 Atmel CPLD In-System Program
Text: Features • High Density, High Performance Electrically Erasable Complex • • • • • • • • • • Programmable Logic Device – 256 Macrocells – 5 Product Terms per Macrocell, Expandable up to 40 per Macrocell – 160, 192, 208-pins – 10 ns Maximum Pin-to-Pin Delay
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Original
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208-pins
ATF1516ASL-20QC160
ATF1516ASL-20UC192
ATF1516ASL-20QHC208
208QH
ATF1516ASL-20QI160
ATF1516ASL-20UI192
ATF1516ASL-20QHI208
ATF1516ASL-25QC160
jk flip flop to d flip flop conversion with diagram
ATF1516AS
ATF1516AS-10QC160
ATF1516AS-10QHC208
ATF1516AS-10UC192
ATF1516AS-15Q160
ATF1516AS-15QC160
ATF1516AS-15QHC208
ATF1516AS-15UC192
Atmel CPLD In-System Program
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PDF
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Untitled
Abstract: No abstract text available
Text: SiT5000 Preliminary Standard Frequency MEMS VC TCXO The Smart Timing Choice The Smart Timing Choice Features Applications 27 standard frequencies between 10 MHz and 40 MHz WiFi, 3G, LTE, SDI, Ethernet, SONET, DSL 100% pin-to-pin drop-in replacement to quartz-based (VC)TCXO
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Original
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SiT5000
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PDF
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intel FPGA
Abstract: intel PLD
Text: int ! ÌFX8160 10 ns FLEXIogic FPGA WITH SRAM OPTION High Performance FPGA Field Programmable Gate Array — Deterministic 10 ns Pin-to-Pin Propagation Delays — 80 MHz System Clock Frequency Electrically Erasable 0.6y, ETOX* IV CHMOS FLASH Technology
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OCR Scan
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IFX8160
24V10
12-Bit
intel FPGA
intel PLD
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PDF
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PROTEUS-UPLC88
Abstract: ifx780 KUFX780-10 NFX780-10 intel FPGA FX780 nfx780z10 fx780z KUFX780 intel ifx780
Text: in te i P R U O B M A lIR f ÌFX780 10 ns FLEXIogic FPGA WITH SRAM OPTION High Performance FPGA Field Programmable Gate Array — Deterministic 10 ns Pin-to-Pin Propagation Delays — 80 MHz System Clock Frequency 5,000 Equivalent Logic Gates or up to 10,240 Bits of SRAM
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OCR Scan
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FX780
24V10
VCC06)
PROTEUS-UPLC88
ifx780
KUFX780-10
NFX780-10
intel FPGA
nfx780z10
fx780z
KUFX780
intel ifx780
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PDF
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Untitled
Abstract: No abstract text available
Text: Features • High-density, High-performance, Electrically-erasable Complex Programmable Logic Device - 256 Macrocells - 5 Product Terms per Macrocell, Expandable up to 40 per Macrocell - 160,192, 208-pins - 10 ns Maximum Pin-to-pin Delay - Registered Operation Up To 100 MHz
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OCR Scan
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208-pins
6AS-15QHC208
ATF1516AS-15UC192
ATF1516AS-10QHC208
ATF1516AS-10QC160
ATF1516AS-10UC192
208QH
ATF1516ASL-25QI60
ATF1516ASL-25U1192
ATF1516ASL-25QHI208
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PDF
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xt_3
Abstract: 636 8pin SG-8002CA
Text: Applications guide Dimensions • Unit: mm DIP 16-pin (SPG series) SIP 3-pin (SG-10) . 16.0 max. I 3.0 min. 4.5 max. XT • DIP 14-pin (SG-51 series, SG-8002DB series) • DIP 14-pin (MG-3020) o rF9o*=to 1—*i. DIP 8-pin (SG-531 series, SG-8002DC series,
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OCR Scan
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16-pin
SG-10)
14-pin
SG-51
SG-8002DB
MG-3020)
SG-531
SG-8002DC
HG-8002DC
xt_3
636 8pin
SG-8002CA
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PDF
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SP3122
Abstract: sp3810 SP316 SP3165 SP315 sp3152
Text: SP3 Series Mini-SIP Passive Delay Modules Similar 3-pin SIP refer to SIL2 Series • 2-tap 4-pin SIP refer to SL2T Series Operating Specifications - Passive Delay Lines • Fast Rise Time, Low DCR Pulse Overshoot P os . 5% to 10%, typical
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OCR Scan
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PDF
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PLC88
Abstract: intel CMOS PLD intel PLD intel FPGA 29052 FX760
Text: int ! ÄO m iM ©! 0M F fô[iiflAT0®M ÌFX760 10 ns FLEXIogic FPGA WITH SRAM OPTION • High Performance FPGA (Field Programmable Gate Array — Deterministic 10 ns Pin-to-Pin Propagation Delays — 80 MHz System Clock Frequency Any CFB can be either 24V10 Logic or
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OCR Scan
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FX760
24V10
12-Bit
625or
FX760
84-PIN
PLC88
intel CMOS PLD
intel PLD
intel FPGA
29052
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PDF
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Untitled
Abstract: No abstract text available
Text: A E W A K K S l OM F [K}[ì M T O K ] i n t e 1 ÌFX740 10 ns FLEXIogic FPGA WITH SRAM OPTION High Performance FPGA (Field Programmable Gate Array — Deterministic 10 ns Pin-to-Pin Propagation Delays — 80 MHz System Clock Frequency 2,500 Equivalent Logic Gates or up to
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OCR Scan
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FX740
24V10
IFX740
44-PIN
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PDF
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intel FPGA
Abstract: FX730 intel PLD intel Series Gate Array IFX730 IC LM 317
Text: i n * ! O M F K iÆ Â ¥ D ® lM ÌFX730 10 ns FLEXIogic FPGA FAMILY WITH SRAM OPTION High Performance FPGA (Field Programmable Gate Array — Deterministic 10 ns Pin-to-Pin Propagation Delays — 80 MHz System Clock Frequency Any CFB Can Be Either 24V10 Logic or
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OCR Scan
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FX730
24V10
Configuratio467
intel FPGA
intel PLD
intel Series Gate Array
IFX730
IC LM 317
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PDF
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NFX780-15
Abstract: KUFX780-10 KUFX780 intel FPGA tms 1035 128x10 intel PLD NFX780-10 FX780 PROTEUS-UPLC88
Text: in te i P R S O B M A I f f if ÌFX780 10 ns FLEXIogic FPGA WITH SRAM OPTION High Performance FPGA Field Programmable Gate Array — Deterministic 10 ns Pin-to-Pin Propagation Delays — 80 MHz System Clock Frequency Any CFB can be either 24V10 Logic or
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OCR Scan
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FX780
24V10
12-Bit
VCC06)
NFX780-15
KUFX780-10
KUFX780
intel FPGA
tms 1035
128x10
intel PLD
NFX780-10
PROTEUS-UPLC88
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PDF
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FX740
Abstract: intel FPGA IFX740 intel PLD register organization of intel i3 N68FX740
Text: Ä E W A M ! O M IF Ü ^ ß M T T D Ü lM ir r te ! ÎFX740 10 ns FLEXIogic FPGA WITH SRAM OPTION High Performance FPGA Field Programmable Gate Array) — Deterministic 10 ns Pin-to-Pin Propagation Delays — 80 MHz System Clock Frequency Any CFB Can Be Either 24V10 Logic or
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OCR Scan
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FX740
24V10
VCC02)
VCC03)
FX740
44-PIN
intel FPGA
IFX740
intel PLD
register organization of intel i3
N68FX740
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PDF
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Untitled
Abstract: No abstract text available
Text: Ä P Ä M g l D K 1 IF K 1 M 1 Ä T 0 ® M in te i ÌFX8160 10 ns FLEXIogic FPGA WITH SRAM OPTION High Performance FPGA Field Programmable Gate Array — Deterministic 10 ns Pin-to-Pin Propagation Delays — 80 MHz System Clock Frequency Electrically Erasable 0.6p, ETOX* IV
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OCR Scan
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FX8160
24V10
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PDF
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Untitled
Abstract: No abstract text available
Text: ATF1508 Features • • • • • • • • • High Density, High Performance Electrically Erasable Complex Programmable Logic Device 128 Macrocells 5 Product Terms per Macrocell, Expandable up to 40 per Macrocell 68, 8 4 ,10 0 ,160-pins 7 ns Maximum Pin-to-Pin Delay
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OCR Scan
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ATF1508
160-pins
and160Q
ATF1508JC68-15
ATF1508JC84-15
ATF1508QC100-15
ATF1508AC100-15
ATF1508QC160-15
ATF1508JI68-15
ATF1508JI84-15
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PDF
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Untitled
Abstract: No abstract text available
Text: INTEL CORP MEMORY/PL] / böE D 4ß Sb l7 b GDflBDBfl 024 « I T L S A P m i M C B 0 M ( F [{ 3 R M ir 0 ® W In te l ) ÌFX8160 10 ns FLEXIogic FPGA WITH SRAM OPTION High Performance FPGA (Field Programmable Gate Array) — Deterministic 10 ns Pin-to-Pin
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OCR Scan
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FX8160
24V10
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PDF
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