2 WAY ASSOCIATIVE Search Results

2 WAY ASSOCIATIVE Result Highlights (5)

Part	Manufacturer	Description
92869-001LF	Amphenol Communications Solutions	HEADER PCMCIA
72326-001	Amphenol Communications Solutions	HEADER PCMCIA
G659EU1124703T	Amphenol Communications Solutions	PCMCIA Card, 68 Position 1.27 mm Pitch
G659EU1024703T	Amphenol Communications Solutions	PCMCIA Card, 68 Position 1.27 mm Pitch
G659RS681082EU	Amphenol Communications Solutions	PCMCIA Card, 68 Position 1.27 mm Pitch

2 WAY ASSOCIATIVE Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
i960 Cx Instruction Set Quick Reference Abstract: I960 hx i960 Cx Processor Instruction Set Quick Reference 80960CA 80960CF 80960HA 80960HD 80960HT 80960JA 80960JD Text: i960 HA/HD/HT Superscalar Microprocessors PRODUCT HIGHLIGHTS • Superscalar RISC core ■ 16 Kbyte four-way set associative instruction cache ■ 8 Kbyte four-way set associative data cache ■ 2 Kbyte on-chip data RAM ■ On-chip high-speed interrupt controller	Original	32-bit /0698/5K/IL0983 i960 Cx Instruction Set Quick Reference I960 hx i960 Cx Processor Instruction Set Quick Reference 80960CA 80960CF 80960HA 80960HD 80960HT 80960JA 80960JD	PDF
Audacity-T2U Abstract: MIPS microprocessor databus BGA PROFILING FOIP Netergy Microelectronics DMA engine Text: Audacity-T2U Processor Features lNetergy Microelectronics' MIPS-X5 unified RISC and DSP core up to 180 DSP MIPS lPin and code compatible with the Audacity-T2 processor l384 KByte on-chip RAM, 16-way interleaved with single cycle access l16 KByte, 2-way set associative	Original	16-way 16-bit Audacity-T2U MIPS microprocessor databus BGA PROFILING FOIP Netergy Microelectronics DMA engine	PDF
Audacity-T2 Abstract: Netergy Microelectronics 49258 voip ethernet single chip 256 kbyte Low Power Serial SRAM Master Of The House Netergy BGA 15x15mm DMA engine J-Squared Technologies Text: Audacity-T2 Processor Features Netergy Microelectronics' MIPS-X5 unified RISC and DSP core 150+ DSP MIPS 256 KByte on-chip RAM, 8-way interleaved with single cycle access 4 KByte, 2-way set associative read-only cache for external FLASH/SRAM memory External memory-mapped bus	Original	16-bit 100/H KA-4207 Audacity-T2 Netergy Microelectronics 49258 voip ethernet single chip 256 kbyte Low Power Serial SRAM Master Of The House Netergy BGA 15x15mm DMA engine J-Squared Technologies	PDF
BCM4320 Abstract: BCM4318 BCM4321 BCM4309 BCM4705 BCM5397 BROADCOM BCM4320 Broadcom WLAN BCM4318 2x2 MIMO block diagram diagram of wifi wireless router Text: BCM4705 Brief Intensi-fi Gigabit Ethernet Draft-802.11n Processor SUMMARY OF BENEFITS FEATURES • Advanced 500 DMIPS/300-MHz MIPS32® core • • • • 4-way set associative 32-KB I-Cache 2-way set associative 32-KB D-Cache 4-KB Read-Ahead Cache	Original	BCM4705 Draft-802 DMIPS/300-MHz MIPS32® 32-KB 16/32-bit DDR266 133-MHz 8/16/32-bit BCM4320 BCM4318 BCM4321 BCM4309 BCM4705 BCM5397 BROADCOM BCM4320 Broadcom WLAN BCM4318 2x2 MIMO block diagram diagram of wifi wireless router	PDF
SDRAM edac Abstract: AT697 Radiation report AT697 AT697E AT697F SPARC T4-2 at697e-2h-e MQFP256 Text: Features • SPARC V8 High Performance Low-power 32-bit Architecture – 8 Register Windows • Advanced Architecture: • • • • • • • • • • • • – On-chip Amba Bus – 5 Stage Pipeline – 32 KB 4-way associative Instruction Cache – 16 KB 2-way associative Data Cache	Original	32-bit 24-bit 33MHz 32/64-bit 4226H SDRAM edac AT697 Radiation report AT697 AT697E AT697F SPARC T4-2 at697e-2h-e MQFP256	PDF
5962-0722402vyc Abstract: AT697F bootstrap AT697F 5962-0722402QYC ufc 101 vc 5962R0722402VYC AT697F-KG-E SDRAM edac 5962-0722402QXB MCGA349 Text: Features • SPARC V8 High Performance Low-power 32-bit Architecture – 8 Register Windows • Advanced Architecture: • • • • • • • • • • • • – On-chip Amba Bus – 5 Stage Pipeline – 32 KB 4-way associative Instruction Cache – 16 KB 2-way associative Data Cache	Original	32-bit 33MHz 32/64-bit 7703E 5962-0722402vyc AT697F bootstrap AT697F 5962-0722402QYC ufc 101 vc 5962R0722402VYC AT697F-KG-E SDRAM edac 5962-0722402QXB MCGA349	PDF
BCM53115 Abstract: BCM4322 BCM4320 BROADCOM BCM4322 BCM4309 block diagram diagram of wifi wireless router BCM4318 BCM4321 BCM4705 2x2 MIMO Text: BCM4705 Brief INTENSI-FI® GIGABIT ETHERNET DRAFT-802.11N PROCESSOR SUMMARY OF BENEFITS FEATURES • Advanced 500 DMIPS/300-MHz MIPS32® core • 4-way set associative 32-KB I-Cache • 2-way set associative 32-KB D-Cache • 4-KB Read-Ahead Cache • MMU/TLB support for Linux®	Original	BCM4705 DRAFT-802 DMIPS/300-MHz MIPS32® 32-KB 4705-PB01-R BCM53115 BCM4322 BCM4320 BROADCOM BCM4322 BCM4309 block diagram diagram of wifi wireless router BCM4318 BCM4321 BCM4705 2x2 MIMO	PDF
MN103E0600YD Abstract: SD21 SD27 SD31 Text: MN103E0600YD Type MN103E0600YD Instruction Cache 16 K-byte 4-way, set-associative Data Cashe 16 K-byte (4-way, set-associative) Package MLGA239-C-1111 7.5 ns (at 1.8 V tolerance = ±5% , 133 MHz) Minimum Instruction Execution Time Interrupts • XIRQ x 8 • NMI • Timer × 14 • DMAC × 4 • WDT • SIO × 6 • I2C × 2 • Asynchronous bus error	Original	MN103E0600YD MLGA239-C-1111 16/24/32-bit 16-bit 32-bit PC-9801 MN103E0600YD SD21 SD27 SD31	PDF
Untitled Abstract: No abstract text available Text: MB86932_ FUJITSU 930 Series 32-BIT RISC EMBEDDED PROCESSOR M AY 25, 1994 FEATURES • 4 0 MHz 25ns/cycle operating frequency • SPARC high performance R ISC architecture • 8 Kbytes 2-way set associative instruction cache • 2 Kbytes 2-way set associative data cache	OCR Scan	MB86932_ 32-BIT 25ns/cycle) MB86932 c175b 374T75b MB86932-20ZF-G	PDF
KM78C80 Abstract: No abstract text available Text: PRELIMINARY CMOS SRAM KM78C80 8 K X 16 /4 K X 16X2-Way Cache Data Static RAM FEATURES DESCRIPTION • Configurable for 2-Way or Direct Mapped Cache Organizations -2-way: 4,096 words x 16 bits — Direct: 8,192 words x 16 bits • On-Chip Address Latches for A0-A11	OCR Scan	KM78C80 16X2-Way A0-A11 52-PIN KM78C80	PDF
Untitled Abstract: No abstract text available Text: MB86932 FUJITSU SPARCIite 32-BIT RISC EMBEDDED PROCESSOR MAY 25, 1994 FEATURES • 4 0 M H z 2 5 n s/cy cle operating frequency • SPARC high perform ance R IS C architecture • 8 K by tes 2 -way set associative instruction cach e • 2 K bytes 2 - way set associative data cache	OCR Scan	MB86932 32-BIT	PDF
Untitled Abstract: No abstract text available Text: 4flE D HÖSEL — VITELIC m bBSaaTl OOGlDbl 7 • UOVI Product Brief MOSEL .«.„„« a*« MS82C340 Cache Chipset for 80386 Systems with Write-Back Cache FEATURES T -4 6 -2 3 -1 4 Direct mapped, 2-way and 4-way set associative cache mapping options supported	OCR Scan	MS82C340 MS82C341 MS82C342 MS82C343 MS82C342 PID036	PDF
block diagram of 80386 microprocessor Abstract: 80386 microprocessor features block diagram of processor 80386 interface 80386 80387 80386 bus technology Text: MOSEL Product Brief MS82C340 Cache Chipset for 80386 Systems with Write-Back Cache FEATURES Highly integrated VLSI components offer complete cache solution - MS82C341 Cache Controller - MS82C342 Expansion Tag RAM - MS82C343 Quad Data RAM Direct mapped, 2-way and 4-way set associative cache	OCR Scan	MS82C340 MS82C341 MS82C342 MS82C343 PID036 block diagram of 80386 microprocessor 80386 microprocessor features block diagram of processor 80386 interface 80386 80387 80386 bus technology	PDF
Untitled Abstract: No abstract text available Text: SN74BCT2160 8K X 4 2-WAY CACHE ADDRESS COWIPARATOR/DATA RAM D 3512, JU NE 1990 FM PACKAGE TOP VIEW LO ^ n w r o < < < < < < Fast Address to Match Time . . . 12 ns Max 2-Way Architecture Significantly Improves Hit Rate 4 * Implements LRU Replacement Algorithm	OCR Scan	SN74BCT2160 T2160	PDF

HM62A168 Abstract: 8d15 62A168 Text: HM62A168/HM62A188 Series Prelim inary • PIN-OUT Direct M apped 8,192-Word x 16/18-Bit 2-Way 4,096-W ord x 16/18-Bit Static Cache RAM ■ DESCRIPTION T h e Hitachi H M 62 A 168 /H M 62A 1 88 is a high speed 128/144-kbit static cache RAM organized as 2-way set associative 4k x 16/18 or	OCR Scan	HM62A168/HM62A188 192-Word 16/18-Bit 128/144-kbit 52-pin 62A168/HM 62A188 HM62A168 8d15 62A168	PDF
D3365 Abstract: SN74ACT2160 Text: SN74ACT2160 8K x 4 2-WAY CACHE ADDRESS COMPARATOR/DATA RAM D3365, JANUARY 1990-REVISED JUNE 1990 Address to Match Time . . . 1 7 n s Max FM PACKAGE TOP VIEW 2-Way Architecture Significantly Improves Hit Rate KT> CO C\J 1 - O < < < < < < O O y L J P C J L J L J a n	OCR Scan	SN74ACT2160 D3365, 1990-REVISED SCAD002. D3365	PDF
HM62A168CP-25 Abstract: HM62A168 HM62A188CP25R Text: HM62A168, HM62A188 Series-Direct Mapped 8,192-Word x 16 18 -Bit/ 2-Way 4,096-Word x 16(18)-Bit Static Cache Memory • DESCRIPTION The H itachi H M 62A168/188 is a high speed 128(144)-k Cache memory organized as 2-way set a sso cia tive 4k x 16(18) or direct m apped 8k x	OCR Scan	HM62A168, HM62A188 192-Word 096-Word 62A168/188 HM62A168/188 32-bit HM62A168/188, 52-pin HM62A168CP-25 HM62A168 HM62A188CP25R	PDF
SN74BCT2160 Abstract: No abstract text available Text: SN74BCT2160 8K X 4 2-WAY CACHE ADD REÍSS COMPARATOR/DATA RAM D 3 5 1 2 , A U G U S T 1990 - R E V IS E D A U G U S T 1990 FM P A C K A G E Fast Address to Match Time . . . 12 ns Max CTOP V IE W in < < 2-Way Architecture Significantly Improves Hit Rate <	OCR Scan	SN74BCT2160 SCAD002.	PDF
MB86930-20PFV-G Abstract: QFP-208 fujitsu mb86901 Text: MB86930 FUJITSU SPARCIite 32-BIT RISC EMBEDDED PROCESSOR May 25, 1994 FEATURES_ • 4 0 MHz 25ns/cycle operating frequency • SPARC high-performance R ISC architecture • 2 Kbytes 2-way set associative instruction cache •	OCR Scan	MB86930 32-BIT MB86930-20PFV-G QFP-208 fujitsu mb86901	PDF
mb81c51 Abstract: No abstract text available Text: cP February 1990 Edition 2.0 - - DATA S H E E T FUJITSU MB81C51-2S/-30 CMOS TAG RANDOM ACCESS MEMORY CMOS Tag Random Access Memory The Fujitsu MB81C51 is a 512 entry x 4 way or 1024 entry x 2 way tag random access memory Tag RAM fabricated with CMOS technology.	OCR Scan	MB81C51-2S/-30 MB81C51 32-bit 1375mWmax. MB81C51-25 MB81C51-30 64-LEAD PGA-64C-A02) 27IDIA	PDF
SN74ACT2160 Abstract: D3365 Text: SN74ACT2160 8K X 4 2-WAY CACHE ADDRESS COMPARATOR/DATA RAM D3365, JA N U A R Y 1 9 90-R E V IS E D JU NE 1990 Address to Match Time . . . 17 ns Max FM PACKAGE TOP VIEW 2-Way Architecture Significantly Improves Hit Rate IO t O W T- O O < < < < < < O I II II II II II II I	OCR Scan	SN74ACT2160 D3365, ACT2160 D3365	PDF
HM62A168 Abstract: No abstract text available Text: HM62A168, HM62A188 Series Direct Mapped 8,192-Word x 16 18 -Bit/ 2-Way 4,096-Word x 16(18)-Bit Static C ach e Mem ory • DESCRIPTION The H itachi H M 62A168/188 is a high speed 128(144)-k Cache memory organized as 2-way set a sso cia tiv e 4k x 16(18) or dire ct m apped 8k x	OCR Scan	HM62A168, HM62A188 192-Word 096-Word 62A168/188 HM62A168/188 32-bit HM62A168/188, 52-pin HM62A168	PDF
intel 82385 Abstract: 82386 20D11 21G22 Text: SN74ACT2140A 2-WAY 4K x 18/8K x 18 CACHE DATA RAM D3291, N O VEM BER 1989-R E V IS E D JUN E 1990 FN P ACKA G E Interfaces Directly with the Intel 82385 Cache Controller TOP VIE W T - C M C O T j-in tO I II II 6 II 5 AO ] 8 7 GND ] 9 Configurable for 2-Way or Direct Mapped	OCR Scan	SN74ACT2140A 18/8K D3291, 1989-R 33-MHz 64K-Byte ACT2140A intel 82385 82386 20D11 21G22	PDF
Untitled Abstract: No abstract text available Text: #U209 H M 644332 GMICRO TAGM 2k Entiy Tag Memoiy for Cache System Preliminary SEPTEMBER, 1989 0 H IT A C H I The HM644332 TAGM is a 2048-entry tag m emory fabricated with CMOS technology. It supports compact cache systems with 2-way or 4-way set associativity and a high level of perform ance for	OCR Scan	HM644332 2048-entry 32-bit 512-entry 1024-entry HM644332 64-Pin	PDF

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2 WAY ASSOCIATIVE Search Results

2 WAY ASSOCIATIVE Result Highlights (5)

2 WAY ASSOCIATIVE Datasheets Context Search

i960 Cx Instruction Set Quick Reference

Audacity-T2U

Audacity-T2

BCM4320

SDRAM edac

5962-0722402vyc

BCM53115

MN103E0600YD

Untitled

KM78C80

Untitled

Untitled

block diagram of 80386 microprocessor

Untitled

HM62A168

D3365

HM62A168CP-25

SN74BCT2160

MB86930-20PFV-G

mb81c51

SN74ACT2160

HM62A168

intel 82385

Untitled