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    Teledyne e2v PLDC20RA10-25TMB

    PROG. LOGIC DEVICE, UV ERASABLE, ASYNCHR - Rail/Tube (Alt: PLDC20RA10-25TMB)
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    Teledyne e2v CY7C261-25TMB

    PROM, UV ERASABLE, 8K X 8, 25 NS ACCESS - Rail/Tube (Alt: CY7C261-25TMB)
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    Teledyne e2v CY7C245A-25TMB

    PROM, UV ERASABLE, 2K X 8, REGISTERED, 2 - Rail/Tube (Alt: CY7C245A-25TMB)
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    Teledyne e2v QP7C263-25TMB

    PROM, UV ERASABLE, 8K X 8, 25 NS ACCESS - Rail/Tube (Alt: QP7C263-25TMB)
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    Teledyne e2v QP7C261-25TMB

    PROM, UV ERASABLE, 8K X 8, 25 NS ACCESS - Rail/Tube (Alt: QP7C261-25TMB)
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    25TMB Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    transistor c331

    Abstract: c331 transistor C3318 C3317 C331 C3311 C331 datasheet CY7C331 20HC c331 equivalent
    Text: CY7C331 Asynchronous Registered EPLD Features • Low power — 90 mA typical ICC quiescent • Twelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — 180 mA ICC maximum — UV-erasable and reprogrammable — One feedback flip-flop with input coming from the


    Original
    CY7C331 CY7C331 transistor c331 c331 transistor C3318 C3317 C331 C3311 C331 datasheet 20HC c331 equivalent PDF

    transistor c331

    Abstract: c331 transistor c331 c331 equivalent C3318 C3319 C3314 c3317 C3311 transistor c331 datasheet
    Text: fax id: 6016 1CY7C331 CY7C331 Asynchronous Registered EPLD Features • Low power — 90 mA typical ICC quiescent • Twelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — 180 mA ICC maximum — UV-erasable and reprogrammable


    Original
    1CY7C331 CY7C331 transistor c331 c331 transistor c331 c331 equivalent C3318 C3319 C3314 c3317 C3311 transistor c331 datasheet PDF

    c331 equivalent

    Abstract: C3317 c331-12 c3311 192x pin diagram c331
    Text: CY7C331 Asynchronous Registered EPLD • Low power — 90 mA typical ICC quiescent Features • Twelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — 180 mA ICC maximum — UV-erasable and reprogrammable — One feedback flip-flop with input coming from the I/O


    Original
    CY7C331 28-pin c331 equivalent C3317 c331-12 c3311 192x pin diagram c331 PDF

    CY7C263-35PC

    Abstract: 7C261 CY7C263 CY7C26345DMB cerdip z PACKAGE 7C264 C261 CY7C261 CY7C264 f1b0
    Text: CY7C261 CY7C263/CY7C264 CYPRESS Features • CMOS for optimum speed/power • Windowed for reprogrammability • High speed — 20 ns commercial — 25 ns (military) • Low power — 660 mW (commercial) — 770 m\V (military) • Super low standby power (7C261)


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    CY7C261 C263/CY7C264 7C261) 300-mil 600-mil CY7C261, CY7C263, CY7C264 8192-word byGY7C264 CY7C263-35PC 7C261 CY7C263 CY7C26345DMB cerdip z PACKAGE 7C264 C261 f1b0 PDF

    L496D

    Abstract: 9l reset CY7C331 ST L11922 0423-J
    Text: CY7C331 -W C Y P R E S S Asynchronous Registered EPLD Features • TWelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — One feedback flip-flop with input coining from the I/O pin — Independent product term set,


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    CY7C331 28-pin CY7C331 -40TMB 28-Lead CY7C331â 40WMB 28-Lead 300-Mil) L496D 9l reset ST L11922 0423-J PDF

    Untitled

    Abstract: No abstract text available
    Text: Asynchronous Registered EPLD 13 inputs, 12 feedback VO pins, plus 6 shared I/O macrocell feedbacks for a total of 31 true and complementary inpnts High speed: 20 ns maximum tpo Security bit Space-saving 28-pin slim-line DIP package; also available in 28-pin


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    28-pin 28-pin termW22 28-Lead 300-Mil) CY7C331 001305b PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C332 ¡W CYPRESS SEMICONDUCTOR 13 in p u t m acrocells, each having: — C om plem entary input — R egister, latch, o r tra n s p a re n t access — Two clock sources Features • • Registered Combinatorial EPLD 12 I/O m acrocells each having: — R egistered, latched, o r tra n s p a re n t


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    CY7C332 7C332 PDF

    smd code ND

    Abstract: 7c263 L43 SMD
    Text: CY7C261 CY7C263/CY7C264 CYPRESS SEMICONDUCTOR • TTL-compatlble I/O • Direct replacement for bipolar PROMs • CMOS for optimum speed/power • Windowed Tor reprogrammability • High speed — 20 ns commercial — 25 ns (military) • Low power — 660 mW (commercial)


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    CY7C261 CY7C263/CY7C264 7C261) 300-mil 604-mil CY7C261, CY7C263, CY7C264 r7515 261--45TM smd code ND 7c263 L43 SMD PDF

    C3317

    Abstract: L1190 CY7331
    Text: Asynchronous Registered EPLD Features • TWelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — One feedback flip-flop with input coming from the I/O pin — Independent product term set, reset, and clock inputs on all


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    28-pin 28-Lead 28-Lead 300-Mil) CY7C331 0Dlb56b C3317 L1190 CY7331 PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C342 CY7C342B CYPRESS SEMICONDUCTOR & 128-Macrocell M A X EPLDs Features Functional Description • 128 macrocells in 8 LABs • 8 dedicated inputs, 52 bidirectional I/O pins • Programmable interconnect array • Available in 68-pin HLCC, PLCC, PGA, and Flatpack


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    CY7C342 CY7C342B 128-Macrocell 68-pin CY7C342/CY7C342B CY7C342/ CY7C342B Y7C342B PDF

    C3325

    Abstract: l9618 L9680 C3326 L9622 l9742 tunel C3321
    Text: C YP RE SS SEMICONDUCTOR a ML.E D 2S 0^bb2 GQQ7Q33 S Q C Y P "T" ^ ^ CYPRESS SEMICONDUCTOR CY7C332 Registered Combinatorial EPLD 13 input macrocells, each having: — Complementary input — Register, latch, or transparent access — I\vo clock sources 15 ns tpo max.


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    GQQ7Q33 CY7C332 CY7C332â 25TMB CY7C332-25WMB 30DMB CY7C332-30HMB CY7C332-30LMB CY7C332-30QMB C3325 l9618 L9680 C3326 L9622 l9742 tunel C3321 PDF

    CERAMIC LEADLESS CHIP CARRIER

    Abstract: la crosse technology smd UJ 99 7C245A CY7C245A 0G152
    Text: W CYPRESS Features • • W indowed for reprogram m ability • C M O S for optim um speed/power • • • H igh speed — 15-ns ad dress set-up • — 10-ns clock to output • Low power — 330 m W com m ercial for —25 ns — 660 mW (m ilitary) •


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    CY7C245A 15-ns 10-ns 300-mil, 24-pin CY7C245A progra8735 CY7C245Aâ 25LMB CERAMIC LEADLESS CHIP CARRIER la crosse technology smd UJ 99 7C245A 0G152 PDF

    CY7C291A

    Abstract: CY7C292A CY7C293A 57C29
    Text: F# CYPRESS Features • Windowed for reprogrammability • CMOS for optimum speed/power • High speed — 20 ns commercial — 25 ns (military) CY7C291A CY7C292A/CY7C293A 2K X 8 Reprogrammable PROM • Direct replacement for bipolar PROMs • Capable o f withstanding >2001V stat­


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    CY7C291A CY7C292A/CY7C293A 300-mil 600-mil CY7C291A, CY7C292A, CY7C293A 300-mil 7C291A, 7C293A) CY7C292A 57C29 PDF

    7C261

    Abstract: 7c264
    Text: CY7C261 CY7C263/CY7C264 WÈP CYPRESS 8K x 8 Power-Switched and Reprogrammable PROM floating-gate technology and byte-wide in­ telligent programming algorithms. The CY7C261, CY7C263, and CY7C264 are plug-in replacements for bipolar de­ vices and offer the advantages of lower


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    7C261) 300-mil 600-mil CY7C261 CY7C263/CY7C264 CY7C261, CY7C263, CY7C264 24-Lead 7C261 7c264 PDF

    7C261

    Abstract: 7C261-25 C2612 CY7C263-45DC C2613 J-64 CY7C263-35DMB CY7C261 DIODE SMD W12 75 C261
    Text: CYPRESS SEMIC ON DUC TOR MbE D BSfl^bbS □□Qb704 1 n C Y P CY7C261 CY7C263/CY7C264 CYPRESS SEMICONDUCTOR Features 8192 x 8 Power-Switched and Reprogrammable PROM • TTL-compatible I/O • Direct replacement for bipolar PROMs • CMOS for optimum speed/power


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    Ob704 CY7C261 CY7C263/CY7C264 7C261) 300-mil 600-mll CY7C261, CY7C263, CY7C264 8192-word 7C261 7C261-25 C2612 CY7C263-45DC C2613 J-64 CY7C263-35DMB DIODE SMD W12 75 C261 PDF

    al p13

    Abstract: CERAMIC LEADLESS CHIP CARRIER cerdip z PACKAGE cy7c291 CY7C293AL-35PC PACKAGE CERAMIC LEADLESS CHIP CARRIER LCC CY7C291A CY7C292A CY7C293A
    Text: CY7C291A CY7C292A/CY7C293A F# CYPRESS Features • Windowed for reprogrammability • CMOS for optimum speed/power • High speed — 20 ns commercial — 25 ns (military) 2K X 8 Reprogrammable PROM • Direct replacement for bipolar PROMs • Capable o f withstanding >2001V stat­


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    CY7C291A CY7C292A/CY7C293A 300-mil 600-mil CY7C291A, CY7C292A, CY7C293A 35QMB CY7C293A-30WMB CY7C293Aâ al p13 CERAMIC LEADLESS CHIP CARRIER cerdip z PACKAGE cy7c291 CY7C293AL-35PC PACKAGE CERAMIC LEADLESS CHIP CARRIER LCC CY7C292A PDF

    lc 245a

    Abstract: DIODE SMD 10 - 25L DIODE SMD 10 25L 7C245A 7c245
    Text: CY7C245A •= CYPRESS • 5V ± 10% V c, commercial and military • I I I.-compatible I/O • Direct replacement for bipolar PROMs • Capable of withstanding greater than 2001V static discharge F e a tu re s • Windowed for reprogrammability • CMOS for optimum speed/power


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    15-ns CY7C245A CY7C245A 45KMB 45DMB -450M 7C245A lc 245a DIODE SMD 10 - 25L DIODE SMD 10 25L 7c245 PDF

    CY7C263

    Abstract: 7C264 7C261 C261 CY7C261 CY7C264 CY7C263-45WC CY7C264-55 cy7c261-45wmb CY7C264-45WMB
    Text: CY7C261 CY7C263/CY7C264 CYPRESS Features • Capable of withstanding greater than 2001V static discharge • CMOS for optimum speed/power • Windowed for reprogrammability • High speed — 20 ns commercial — 25 ns (military) • Low power — 660 mW (commercial)


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    CY7C261 C263/CY7C264 7C261) 300-mil 600-mil CY7C261, CY7C263, CY7C264 8192-word 600-M CY7C263 7C264 7C261 C261 CY7C263-45WC CY7C264-55 cy7c261-45wmb CY7C264-45WMB PDF

    2SUR

    Abstract: CY7C331 L1190 C3317
    Text: CY7C331 ¿F C Y P R E S S Features • TWelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — One feedback flip-flop with input coining from the I/O pin — Independent product term set, reset, and clock inpnts on all


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    CY7C331 28-pin 40HMB CY7C331â 40LMB 28-Square 40QMB 2SUR L1190 C3317 PDF

    RQW 130

    Abstract: tlOH-tm33X ELLS 110 CY7C331
    Text: i*bE ]> CYPRESS SEMICONDUCTOR B 256*^1.2 DDQ7Q5Q 7 Q C Y P c t 7C33i CYPRESS SEMICONDUCTOR Asynchronous Registered EPLD Features • Tnelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — O ne feedback flip-flop with input


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    CT7C331 CY7C331-40QMB CY7C331-40TMB CY7C331-40WMB DDQ7032 CY7C331 38-00066-C RQW 130 tlOH-tm33X ELLS 110 CY7C331 PDF

    7C293A

    Abstract: 7C291A
    Text: CY7C291A CY7C292A/CY7C293A î f CYPRESS Features • Windowed for reprogrammability • CMOS for optimum speed/power • High speed — 20 ns commercial 2K X 8 Reprogrammable PROM The CY7C291A, CY7C292A, and CY7C293A are plug-in replacem ents for bipolar devices and offer the advantages of


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    CY7C291A CY7C292A/CY7C293A 300-mil 600-mil CY7C291A, CY7C292A, CY7C293A 7C293A--50WMB 7C293A--50TMB 7C293A--50QMB 7C293A 7C291A PDF

    Untitled

    Abstract: No abstract text available
    Text: s rs 'w CY7C332 ~ •• = Registered Combinatorial EPLD CYPRESS — SEMICONDUCTOR Features • 12 I/O macrocells each having: — Registered, latched, or transparent array input — A choice of two clock sources — Global or local output enable OE — Up to 19 product terms (PTs) per


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    CY7C332 CY7C332â 30QMB 30TMB 30WMB PDF