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Catalog Datasheet	MFG & Type	Document Tags	PDF
Untitled Abstract: No abstract text available Text: White Electronic W3EG72125S-D3 -JD3 -AJD3 PRELIMINARY* 1GB – 2x64Mx72 DDR SDRAM REGISTERED ECC w/PLL FEATURES DESCRIPTION Double-data-rate architecture Clock Speeds of 100MHz, 133MHz and 166MHz Bi-directional data strobes DQS Differential clock inputs (CK & CK#)	Original	W3EG72125S-D3 2x64Mx72 100MHz, 133MHz 166MHz	PDF
samsung 5230 Abstract: DDR200 DDR266 DDR333 W3EG72125S-D3 Text: White Electronic Designs W3EG72125S-D3 -JD3 -AJD3 PRELIMINARY* 1GB – 2x64Mx72 DDR SDRAM REGISTERED ECC w/PLL FEATURES DESCRIPTION Double-data-rate architecture Clock Speeds of 100MHz, 133MHz and 166MHz Bi-directional data strobes DQS Differential clock inputs (CK & CK#)	Original	W3EG72125S-D3 2x64Mx72 100MHz, 133MHz 166MHz W3EG72125S 256Mb 2x64Mx4 samsung 5230 DDR200 DDR266 DDR333 W3EG72125S-D3	PDF
DDR200 Abstract: DDR266 DDR333 W3EG72125S-D3 Text: White Electronic Designs W3EG72125S-D3 -JD3 -AJD3 PRELIMINARY* 1GB - 2x64Mx72 DDR SDRAM REGISTERED ECC w/PLL FEATURES DESCRIPTION Double-data-rate architecture Clock Speeds of 100MHz, 133MHz and 166MHz Bi-directional data strobes DQS Differential clock inputs (CK & CK#)	Original	W3EG72125S-D3 2x64Mx72 100MHz, 133MHz 166MHz W3EG72125S 256Mb 2x64Mx4 DDR200 DDR266 DDR333 W3EG72125S-D3	PDF

Catalog Datasheet

MFG & Type

Document Tags

PDF

Untitled

Abstract: No abstract text available
Text: White Electronic W3EG72125S-D3 -JD3 -AJD3 PRELIMINARY* 1GB – 2x64Mx72 DDR SDRAM REGISTERED ECC w/PLL FEATURES DESCRIPTION Double-data-rate architecture Clock Speeds of 100MHz, 133MHz and 166MHz Bi-directional data strobes DQS Differential clock inputs (CK & CK#)

Original

W3EG72125S-D3 2x64Mx72 100MHz, 133MHz 166MHz

PDF

samsung 5230

Abstract: DDR200 DDR266 DDR333 W3EG72125S-D3
Text: White Electronic Designs W3EG72125S-D3 -JD3 -AJD3 PRELIMINARY* 1GB – 2x64Mx72 DDR SDRAM REGISTERED ECC w/PLL FEATURES DESCRIPTION Double-data-rate architecture Clock Speeds of 100MHz, 133MHz and 166MHz Bi-directional data strobes DQS Differential clock inputs (CK & CK#)

Original

W3EG72125S-D3 2x64Mx72 100MHz, 133MHz 166MHz W3EG72125S 256Mb 2x64Mx4 samsung 5230 DDR200 DDR266 DDR333 W3EG72125S-D3

PDF

DDR200

Abstract: DDR266 DDR333 W3EG72125S-D3
Text: White Electronic Designs W3EG72125S-D3 -JD3 -AJD3 PRELIMINARY* 1GB - 2x64Mx72 DDR SDRAM REGISTERED ECC w/PLL FEATURES DESCRIPTION Double-data-rate architecture Clock Speeds of 100MHz, 133MHz and 166MHz Bi-directional data strobes DQS Differential clock inputs (CK & CK#)

Original

W3EG72125S-D3 2x64Mx72 100MHz, 133MHz 166MHz W3EG72125S 256Mb 2x64Mx4 DDR200 DDR266 DDR333 W3EG72125S-D3

PDF