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    3 LEVEL LOW VOLTAGE INVERTER Search Results

    3 LEVEL LOW VOLTAGE INVERTER Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    7UL1G07FU Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Non-Inverter Buffer (Open Drain), USV, -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    DF2B5M4ASL Toshiba Electronic Devices & Storage Corporation TVS Diode (ESD Protection Diode), Bidirectional, +/-3.6 V, SOD-962 (SL2) Visit Toshiba Electronic Devices & Storage Corporation
    DF2B6M4ASL Toshiba Electronic Devices & Storage Corporation TVS Diode (ESD Protection Diode), Bidirectional, +/-5.5 V, SOD-962 (SL2) Visit Toshiba Electronic Devices & Storage Corporation
    DF2B5PCT Toshiba Electronic Devices & Storage Corporation TVS Diode (ESD Protection Diode), Bidirectional, +/-3.6 V, SOD-882 (CST2) Visit Toshiba Electronic Devices & Storage Corporation
    DF2B7PCT Toshiba Electronic Devices & Storage Corporation TVS Diode (ESD Protection Diode), Bidirectional, +/-5.5 V, SOD-882 (CST2) Visit Toshiba Electronic Devices & Storage Corporation

    3 LEVEL LOW VOLTAGE INVERTER Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1T97 Low-power configurable gate with voltage-level translator Rev. 3 — 30 November 2011 Product data sheet 1. General description The 74AUP1T97 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic


    Original     		74AUP1T97 74AUP1T97 PDF

    74AUP1T58GF

    Abstract: 74AUP1T58GM 74AUP1T58GW
    Text: 74AUP1T58 Low-power configurable gate with voltage-level translator Rev. 3 — 18 October 2010 Product data sheet 1. General description The 74AUP1T58 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic


    Original     		74AUP1T58 74AUP1T58 74AUP1T58GF 74AUP1T58GM 74AUP1T58GW PDF

    74AUP1T57

    Abstract: 74AUP1T57GF 74AUP1T57GM 74AUP1T57GW JESD22-A114E
    Text: 74AUP1T57 Low-power configurable gate with voltage-level translator Rev. 01 — 3 January 2008 Product data sheet 1. General description The 74AUP1T57 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic


    Original     		74AUP1T57 74AUP1T57 74AUP1T57GF 74AUP1T57GM 74AUP1T57GW JESD22-A114E PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1T98 Low-power configurable gate with voltage-level translator Rev. 3 — 30 November 2011 Product data sheet 1. General description The 74AUP1T98 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic


    Original     		74AUP1T98 74AUP1T98 PDF

    74AUP1T57

    Abstract: 74AUP1T57GF 74AUP1T57GM 74AUP1T57GW JESD22-A114E
    Text: 74AUP1T57 Low-power configurable gate with voltage-level translator Rev. 02 — 3 August 2009 Product data sheet 1. General description The 74AUP1T57 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic


    Original     		74AUP1T57 74AUP1T57 74AUP1T57GF 74AUP1T57GM 74AUP1T57GW JESD22-A114E PDF

    74AUP1T57

    Abstract: 74AUP1T57GF 74AUP1T57GM 74AUP1T57GW
    Text: 74AUP1T57 Low-power configurable gate with voltage-level translator Rev. 3 — 21 July 2010 Product data sheet 1. General description The 74AUP1T57 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic


    Original     		74AUP1T57 74AUP1T57 74AUP1T57GF 74AUP1T57GM 74AUP1T57GW PDF

    74LVQ04

    Abstract: 74LVQ04SC 74LVQ04SCX 74LVQ04SJ 74LVQ04SJX M14A M14D
    Text: 74LVQ04 Low Voltage Hex Inverter General Description Features The LVQ04 contains six inverters Y Y Y Y Y Ideal for low power low noise 3 3V applications Guaranteed simultaneous switching noise level and dynamic threshold performance Guaranteed pin-to-pin skew AC performance


    Original     		74LVQ04 LVQ04 MIL-STD-883 C1996 74LVQ04SC 74LVQ04SC 74LVQ04 74LVQ04SCX 74LVQ04SJ 74LVQ04SJX M14A M14D PDF

    74LVX04M

    Abstract: 74LVX04MTC 74LVX04MTCX 74LVX04MX 74LVX04SJ 74LVX04SJX LVX04 M14A M14D 74LVX04
    Text: 74LVX04 Low Voltage Hex Inverter General Description Features The LVX04 contains six inverters The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems Y Y Y Y Logic Symbol Input voltage level translation from 5V to 3V Ideal for low power low noise 3 3V applications


    Original     		74LVX04 LVX04 C1996 74LVX 74LVX04M 74LVX04MTC 74LVX04MTCX 74LVX04MX 74LVX04SJ 74LVX04SJX M14A M14D 74LVX04 PDF

    1MBI1000VXB-170EH-50

    Abstract: No abstract text available
    Text: / 1MBI1000VXB-170EH-50 IGBT Modules IGBT MODULE V series 1700V / 1000A / 1 in one package Features High speed switching Voltage drive Low Inductance module structure Applications NPC 3-level Inverter Active PFC


    Original     		1MBI1000VXB-170EH-50 1MBI1000VXB-170EH-50 PDF

    C2E1

    Abstract: IC650
    Text: / 1MBI650VXA-170EH-50 IGBT Modules IGBT MODULE V series 1700V / 650A / 1 in one package Features High speed switching Voltage drive Low Inductance module structure Applications NPC 3-level Inverter Active PFC


    Original     		1MBI650VXA-170EH-50 C2E1 IC650 PDF

    74AUP1T98GF

    Abstract: 74AUP1T98GM 74AUP1T98GW
    Text: 74AUP1T98 Low-power configurable gate with voltage-level translator Rev. 2 — 19 October 2010 Product data sheet 1. General description The 74AUP1T98 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic


    Original     		74AUP1T98 74AUP1T98 74AUP1T98GF 74AUP1T98GM 74AUP1T98GW PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1T98-Q100 Low-power configurable gate with voltage-level translator Rev. 1 — 19 May 2014 Product data sheet 1. General description The 74AUP1T98-Q100 provides low-power, low-voltage configurable logic gate functions. Eight patterns of 3-bit input determine the output state. The user can choose the logic


    Original     		74AUP1T98-Q100 74AUP1T98-Q100 PDF

    001aad993

    Abstract: 74AUP1T98GF 74AUP1T98GM 74AUP1T98GW JESD22-A114E
    Text: 74AUP1T98 Low-power configurable gate with voltage-level translator Rev. 01 — 6 March 2008 Product data sheet 1. General description The 74AUP1T98 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic


    Original     		74AUP1T98 74AUP1T98 001aad993 74AUP1T98GF 74AUP1T98GM 74AUP1T98GW JESD22-A114E PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1T58 Low-power configurable gate with voltage-level translator Rev. 5 — 15 August 2012 Product data sheet 1. General description The 74AUP1T58 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic


    Original     		74AUP1T58 74AUP1T58 PDF

    74AUP1T58GF

    Abstract: 74AUP1T58GM 74AUP1T58GW
    Text: 74AUP1T58 Low-power configurable gate with voltage-level translator Rev. 02 — 29 September 2009 Product data sheet 1. General description The 74AUP1T58 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic


    Original     		74AUP1T58 74AUP1T58 74AUP1T58GF 74AUP1T58GM 74AUP1T58GW PDF

    74AUP1T58GF

    Abstract: 74AUP1T58GM 74AUP1T58GW JESD22-A114E
    Text: 74AUP1T58 Low-power configurable gate with voltage-level translator Rev. 01 — 6 March 2008 Product data sheet 1. General description The 74AUP1T58 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic


    Original     		74AUP1T58 74AUP1T58 74AUP1T58GF 74AUP1T58GM 74AUP1T58GW JESD22-A114E PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1T97 Low-power configurable gate with voltage-level translator Rev. 4 — 15 August 2012 Product data sheet 1. General description The 74AUP1T97 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic


    Original     		74AUP1T97 74AUP1T97 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1T98 Low-power configurable gate with voltage-level translator Rev. 4 — 15 august 2012 Product data sheet 1. General description The 74AUP1T98 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic


    Original     		74AUP1T98 74AUP1T98 PDF

    74AUP1T97

    Abstract: 74AUP1T97GF 74AUP1T97GM 74AUP1T97GW JESD22-A114E
    Text: 74AUP1T97 Low-power configurable gate with voltage-level translator Rev. 01 — 25 October 2007 Product data sheet 1. General description The 74AUP1T97 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic


    Original     		74AUP1T97 74AUP1T97 74AUP1T97GF 74AUP1T97GM 74AUP1T97GW JESD22-A114E PDF

    74AUP1T97

    Abstract: 74AUP1T97GF 74AUP1T97GM 74AUP1T97GW
    Text: 74AUP1T97 Low-power configurable gate with voltage-level translator Rev. 2 — 18 October 2010 Product data sheet 1. General description The 74AUP1T97 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic


    Original     		74AUP1T97 74AUP1T97 74AUP1T97GF 74AUP1T97GM 74AUP1T97GW PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1T57 Low-power configurable gate with voltage-level translator Rev. 4 — 1 December 2011 Product data sheet 1. General description The 74AUP1T57 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic


    Original     		74AUP1T57 74AUP1T57 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1T58 Low-power configurable gate with voltage-level translator Rev. 4 — 28 November 2011 Product data sheet 1. General description The 74AUP1T58 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic


    Original     		74AUP1T58 74AUP1T58 PDF

    54LS240

    Abstract: 54S240/BRA 54LS241 44 LLCC
    Text: Signetics 54LS240, 54LS241, 54S240, 54S241 Buffers '240 Octal Inverter Buffer 3*State '241 Octal Buffer (3-State) Product Specification Military Logic Products INPUTS ÖE. L L H H = L = X = (Z) = 0Eb ▼b L L H L L H L H H X X (Z) High voltage level Low voltage level


    OCR Scan     		54LS240, 54LS241, 54S240, 54S241 20-Pin 54LS240/BRA 54S240/BRA 54LS241/BRA 54S241/BRA 54LS240 54LS241 44 LLCC PDF

    74LVX04

    Abstract: No abstract text available
    Text: 74LVX04 LOW VOLTAGE CMOS HEX INVERTER . HIGH SPEED: tpD =4.1 ns TYP. at Vcc = 3.3V . INPUT VOLTAGE LEVEL: V il = 0.8V, V ih = 2V at Vcc = 3V . LOW POWER DISSIPATION: Icc = 2 |oA (MAX.) at T a = 25 °C . LOW NOISE: V olp = 0 .3 V (TYP.) at V cc = 3 .3 V . SYMMETRICAL OUTPUT IMPEDANCE:


    OCR Scan     		74LVX04 74LVX04 TSS0P14 PDF