Untitled
Abstract: No abstract text available
Text: Application Note 601 Accelerating 16/32-Bit Math Operations with the DS80C390 www.maxim-ic.com OVERVIEW Performance advances in the 8051 microcontroller market have increasingly led users to consider 8-bit devices in applications that once required processing power only available from 16-bit devices. Some of
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16/32-Bit
DS80C390
16-bit
DS80C390
40MHz
AN601
40Mhz
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AN601
Abstract: DIV32 DS80C390 IEEE754
Text: Application Note 601 Accelerating 16/32-Bit Math Operations with the DS80C390 www.maxim-ic.com OVERVIEW Performance advances in the 8051 microcontroller market have increasingly led users to consider 8-bit devices in applications that once required processing power only available from 16-bit devices. Some of
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16/32-Bit
DS80C390
16-bit
DS80C390
40Mov
40Mhz
AN601
DIV32
IEEE754
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640NS
Abstract: No abstract text available
Text: HIGH–SPEED MICROCONTROLLER USER’S GUIDE SECTION 5: CPU TIMING XTAL2 The timing of the High–Speed Microcontroller is the area with the greatest departure from the original 8051 series. This section will briefly explain the timing and also compare it to the original.
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80517A
Abstract: 8051-UART 8 BIT ALU design by cmos 8051 port 0 internal structure 80C517A C500 C509 C509-L
Text: Fundamental Structure C509-L 2 Fundamental Structure The C509-L is the high-end 8051-compatible microcontroller of the C500 microcontroller family with a significantly increased performance of CPU and peripheral units. lt includes the complete SAB 80C517A functionality, providing 100% upward compatibility. This means that all existing 80517A
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C509-L
C509-L
8051-compatible
80C517A
0517A
C509-L.
32-bit/16-bit
16-bit
80517A
8051-UART
8 BIT ALU design by cmos
8051 port 0 internal structure
C500
C509
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AB-40
Abstract: 6 BIT MUL OF 8051 AB-40 intel B10M intel 8051 application intel 8051 application information
Text: AB-40 APPLICATION BRIEF 32-Bit Math Routines for the 8051 RICK SCHUE REGIONAL APPLICATIONS SPECIALIST INDIANAPOLIS INDIANA October 1992 Order Number 270530-002 Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or copyright for sale and use of Intel products except as provided in
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AB-40
32-Bit
AB-40
6 BIT MUL OF 8051
AB-40 intel
B10M
intel 8051 application
intel 8051 application information
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MCS251
Abstract: cmp 3205 200H AN705 PCB83C552 WR10
Text: Philips Semiconductors Application note XA benchmark vs. the MCS251 AN705 BACKGROUND BENCHMARK RESULTS AND CONCLUSIONS A computer benchmark is a “program” that is used to determine relative computer core performance by evaluating benchmark execution time of the core. In a brainstorm sessionon
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MCS251
AN705
MCS251,
MCS251
cmp 3205
200H
AN705
PCB83C552
WR10
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cmp 3205
Abstract: 4 stroke engine files MCS251 200H AN705 PCB83C552 WR10
Text: Philips Semiconductors Application note XA benchmark vs. the MCS251 AN705 BACKGROUND BENCHMARK RESULTS AND CONCLUSIONS A computer benchmark is a “program” that is used to determine relative computer core performance by evaluating benchmark execution time of the core. In a brainstorm sessionon
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MCS251
AN705
cmp 3205
4 stroke engine files
MCS251
200H
AN705
PCB83C552
WR10
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cmp 3205
Abstract: MCS251 AN705 4 stroke engine files r2l diode MICROS 200H PCB83C552 WR10 2 stroke engine calculation
Text: Philips Semiconductors Application note XA benchmark vs. the MCS251 AN705 BACKGROUND BENCHMARK RESULTS AND CONCLUSIONS A computer benchmark is a “program” that is used to determine relative computer core performance by evaluating benchmark execution time of the core. In a brainstorm sessionon
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MCS251
AN705
cmp 3205
MCS251
AN705
4 stroke engine files
r2l diode
MICROS
200H
PCB83C552
WR10
2 stroke engine calculation
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ARM LPC1768 instruction set
Abstract: mbed LPC1768 ARM cortex R7 processor LPC3154 cmsis lpc1768 knight rider stripboard instruction set for PIC18 series using c compiler LPC1768 MSP430F5438
Text: Get Better Code Density than 8/16 bit MCU’s NXP LPC1100 Cortex M0 Oct 2009 Outline Introduction ARM Cortex-M0 processor Why processor bit width doesn’t matter – Code size – Performance – Cost Conclusions 2 ARM Cortex-M Processors Cortex-M family optimised for deeply embedded
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LPC1100
32-bit
16-bit
ARM LPC1768 instruction set
mbed LPC1768
ARM cortex R7 processor
LPC3154
cmsis lpc1768
knight rider
stripboard
instruction set for PIC18 series using c compiler
LPC1768
MSP430F5438
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SLAA204
Abstract: SLAA205 PIC18F242 atmel 8051 microcontroller with built in ADC 0x1800 144-462 TI 936 MC68HC11 MSP430 MSP430F135
Text: Application Report SLAA205 – June 2004 MSP430 Competitive Benchmarking Greg Morton MSP430 ABSTRACT This application report contains the results from benchmarking the MSP430 against microcontrollers from other vendors. IAR Systems’ Embedded Workbench development
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SLAA205
MSP430
MSP430
SLAA204
SLAA205
PIC18F242
atmel 8051 microcontroller with built in ADC
0x1800
144-462
TI 936
MC68HC11
MSP430F135
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8051 Microcontroller Instruction Set
Abstract: atmel 8051 atmel 8051 microcontroller datasheet AT89 8051 microcontroller 8051 opcode for three digit addition, subtraction hex to bcd conversion atmel 8051 microcontrollers hardware manual
Text: Section 1 8051 Microcontroller Instruction Set For interrupt response time information, refer to the hardware description chapter. Instructions that Affect Flag Settings 1 Instruction Flag Instruction Flag C OV AC ADD X X X CLR C O ADDC X X X CPL C X SUBB
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0509C
8051 Microcontroller Instruction Set
atmel 8051
atmel 8051 microcontroller datasheet
AT89
8051 microcontroller
8051 opcode for three digit addition, subtraction
hex to bcd conversion
atmel 8051 microcontrollers hardware manual
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AN705
Abstract: MCS251 PCB83C552 WR10
Text: INTEGRATED CIRCUITS AN705 XA benchmark vs. the MCS251 1996 Feb 15 IC25 Data Handbook Philips Semiconductors Philips Semiconductors Application note XA benchmark vs. the MCS251 AN705 BACKGROUND BENCHMARK RESULTS AND CONCLUSIONS A computer benchmark is a “program” that is used to determine
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AN705
MCS251
MCS251,
AN705
MCS251
PCB83C552
WR10
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DIV32
Abstract: AF53 DS80C390 DS80C400
Text: Maxim > App Notes > MICROCONTROLLERS Keywords: high speed microcontroller, DS80C390, DS80C400, CAN, controller area network, math accelerator, math acceleration, 16-bit math, special function registers, SFR, 16-bit multiply, 32-bit divide, code example, Dallas Semiconductor, microcontrollers
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DS80C390,
DS80C400,
16-bit
32-bit
16/32-Bit
DS80C390/
DS80C400
DS80C390/DS80C400
DIV32
AF53
DS80C390
DS80C400
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CORE8051
Abstract: Core8051s vhdl code for accumulator 80C31 ASM51 Actel core8051s 8051 microcontroller features lm 398- SAMPLE AND HOLD
Text: Core8051s v2.3 Handbook Actel Corporation, Mountain View, CA 94043 2006 Actel Corporation. All rights reserved. Printed in the United States of America Part Number: 50200084-1 Release: July 2009 No part of this document may be copied or reproduced in any form or by any means without prior written
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Core8051s
CORE8051
vhdl code for accumulator
80C31
ASM51
Actel core8051s
8051 microcontroller features
lm 398- SAMPLE AND HOLD
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intel 80c196 INSTRUCTION SET
Abstract: 80C196 instruction set 80C196 assembly language 80c196 operand intel 80196 assembly language difference between 8051 microcontroller and 80196 intel 80C196 users manual 80c196 instruction 80C196 SC68000
Text: Philips Semiconductors Application note XA benchmark versus the architectures 68000, 80C196, and 80C51 AN703 Author: Santanu Roy BACKGROUND BENCHMARK RESULTS AND CONCLUSIONS A computer benchmark is a “program” that is used to determine relative computer core performance by evaluating benchmark
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80C196,
80C51
AN703
SU00600A
80C51
80C196
intel 80c196 INSTRUCTION SET
80C196 instruction set
80C196 assembly language
80c196 operand
intel 80196 assembly language
difference between 8051 microcontroller and 80196
intel 80C196 users manual
80c196 instruction
80C196
SC68000
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intel 80c196 INSTRUCTION SET
Abstract: 80C196 instruction set motorola 68000 architecture 80C196 assembly language 80196 instruction set 80C196 users manual intel 80c196 microcontroller difference between 8051 microcontroller and 80196 intel 68000 INSTRUCTION SET 80c196
Text: Philips Semiconductors Application note XA benchmark versus the architectures 68000, 80C196, and 80C51 AN703 Author: Santanu Roy BACKGROUND BENCHMARK RESULTS AND CONCLUSIONS A computer benchmark is a “program” that is used to determine relative computer core performance by evaluating benchmark
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80C196,
80C51
AN703
SU00600A
80C51
80C196
intel 80c196 INSTRUCTION SET
80C196 instruction set
motorola 68000 architecture
80C196 assembly language
80196 instruction set
80C196 users manual
intel 80c196 microcontroller
difference between 8051 microcontroller and 80196
intel 68000 INSTRUCTION SET
80c196
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80C52
Abstract: SAB-C502 8051 psw function
Text: Fundamental Structure 2 Fundamental Structure The SAB-C502 is fully compatible to the standard 8051 microcontroller family. It is compatible with the SAB 80C52. While maintaining all architectural and operational characteristics of the SAB 80C52 the SAB-C502 incorporates some enhancements in the Timer2
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8051 psw function
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SAB-C501
Abstract: No abstract text available
Text: Fundamental Structure 2 Fundamental Structure The SAB-C511/513 family microcontrollers are based on the SAB-C501 architecture. Therefore they are also fully compatible to the standard 8051 microcontroller family. The completely new units compared to the SAB-C501 are the synchronous serial channel, the
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80C52
Abstract: SAB-C501 18H-1FH
Text: Fundamental Structure 2 Fundamental Structure The SAB-C501 is fully compatible to the standard 8051 microcontroller family It is compatible with the SAB 80C52. While maintaining all architectural and operational characteristics of the SAB 80C52 the SAB-C501 incorporates some enhancements in the Timer 2
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80C52.
80C52
SAB-C501.
SAB-C501
18H-1FH
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C504
Abstract: 8051 psw function C-501
Text: Fundamental Structure C504 2 Fundamental Structure The C504 basically is fully compatible to the architecture of the standard 8051 microcontroller family. Especially it is functionally upward compatible with the SAB 80C52/C501 microcontrollers. While maintaining all architectural and operational characteristics of the SAB 80C52/C501, the
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C504
8051 psw function
C-501
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80C196 instruction set
Abstract: intel 80c196 INSTRUCTION SET intel 80C196 users manual 80C196 assembly language 80C196 users manual 80C196 manual 80c196 operand 80C196 difference between 8051 microcontroller and 80196 intel 80196 assembly language
Text: INTEGRATED CIRCUITS AN703 XA benchmark versus the architectures 68000, 80C196, and 80C51 Author: Santanu Roy Philips Semiconductors 1996 Mar 01 Philips Semiconductors Application note XA benchmark versus the architectures 68000, 80C196, and 80C51 AN703 Author: Santanu Roy
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AN703
80C196,
80C51
80C196 instruction set
intel 80c196 INSTRUCTION SET
intel 80C196 users manual
80C196 assembly language
80C196 users manual
80C196 manual
80c196 operand
80C196
difference between 8051 microcontroller and 80196
intel 80196 assembly language
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AB-40
Abstract: No abstract text available
Text: intel. AB-40 APPLICATION BRIEF 32-Bit Math Routines for the 8051 RICK SCHUE REGIONAL APPLICATIONS SPECIALIST INDIANAPOLIS, IN D IA N A October 1992 Order Number: 270530-002 Information in this document is provided in connection with Intel products. Intel assumes no liability whatsoev
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AB-40
32-Bit
/xxxx/0296/B
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pl/m intel
Abstract: No abstract text available
Text: intei » A B ' 4 APPLICATION BRIEF 32-Bit Math Routines for the 8051 RICK SCHUE REGIONAL APPLICATIONS SPECIALIST INDIANAPOLIS, INDIANA October 1992 Order Number: 270530-002 Information in this document is provided in connection with Intel products. Intel assumes no liability whatsoev
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32-Bit
AB-40
/xxxx/0296/B
pl/m intel
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J8031A
Abstract: P8051AH interfacing of RAM and ROM with 8085 IP805 id8031 P8031ah ID8031AH 8051A IP8051 8031AH
Text: 8051AH/8031AH 8051AH/8031AH Single-Chip 8-Bit Microcomputer DISTINCTIVE CHARACTERISTICS 4K x 8 ROM, 1 2 8 x 8 RAM Four 8-bit ports, 32 I/O lines Two 16-bit timer/event counters, 5 interrupt sources High-Performance full-duplex serial channel Boolean processor, cycle multiply and divide
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8051AH/8031AH
16-bit
100mA
AH/8031
8051AH
03303C
J8031A
P8051AH
interfacing of RAM and ROM with 8085
IP805
id8031
P8031ah
ID8031AH
8051A
IP8051
8031AH
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