XCR3064XL
Abstract: CP56 CS48 DS012 PC44 VQ100 VQ44
Text: R DS017 v1.5 April 19, 2001 XCR3064XL 64 Macrocell CPLD 14 Product Specification Features Description • Lowest power 64 macrocell CPLD • 6.0 ns pin-to-pin logic delays • System frequencies up to 145 MHz • 64 macrocells with 1,600 usable gates The XCR3064XL is a 3.3V, 64-macrocell CPLD targeted at
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DS017
XCR3064XL
64-macrocell
48-ball
56-ball
44-pin
XCR3064XL
CP56
CS48
DS012
PC44
VQ100
VQ44
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CP56
Abstract: CS48 DS012 PC44 VQ100 VQ44 XCR3064XL xcr3064xl vq44
Text: R XCR3064XL 64 Macrocell CPLD DS017 v1.6 January 8, 2002 14 Product Specification Features Description • Lowest power 64 macrocell CPLD • 6.0 ns pin-to-pin logic delays • System frequencies up to 145 MHz • 64 macrocells with 1,500 usable gates The XCR3064XL is a 3.3V, 64-macrocell CPLD targeted at
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XCR3064XL
DS017
64-macrocell
48-ball
56-ball
100-pin
CP56
CS48
DS012
PC44
VQ100
VQ44
xcr3064xl vq44
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XCR3064XL
Abstract: No abstract text available
Text: R DS017 v1.4 April 11, 2001 XCR3064XL 64 Macrocell CPLD 14 Product Specification Features Description • Lowest power 64 macrocell CPLD • 6.0 ns pin-to-pin logic delays • System frequencies up to 145 MHz • 64 macrocells with 1,600 usable gates The XCR3064XL is a 3.3V, 64-macrocell CPLD targeted at
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XCR3064XL
DS017
44-pin
48-ball
56-ball
100-pin
VQ100
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XCR3064XL
Abstract: c4924 CP56 CS48 DS012 PC44 VQ100 VQ44 XCR3064XL-6PC44C XCR3064XL-6VQ44C
Text: R XCR3064XL 64 Macrocell CPLD DS017 v1.7 April 8, 2002 14 Product Specification Features Description • Lowest power 3V 64 macrocell CPLD • 6.0 ns pin-to-pin logic delays • System frequencies up to 175 MHz • 64 macrocells with 1,500 usable gates The XCR3064XL is a 3.3V, 64-macrocell CPLD targeted at
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XCR3064XL
DS017
64-macrocell
48-ball
56-ball
100-pin
c4924
CP56
CS48
DS012
PC44
VQ100
VQ44
XCR3064XL-6PC44C
XCR3064XL-6VQ44C
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Untitled
Abstract: No abstract text available
Text: CY7C373i UltraLogic 64-Macrocell Flash CPLD Features Functional Description • • • • 64 macrocells in four logic blocks 64 I/O pins 5 dedicated inputs including 4 clock pins In-System Reprogrammable™ ISR™ Flash technology — JTAG interface
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CY7C373i
64-Macrocell
CY7C373i
FLASH370iTM
FLASH370i
22V10,
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Untitled
Abstract: No abstract text available
Text: 73i CY7C373i UltraLogic 64-Macrocell Flash CPLD Features Functional Description • • • • 64 macrocells in four logic blocks 64 I/O pins 5 dedicated inputs including 4 clock pins In-System Reprogrammable™ ISR™ Flash technology — JTAG interface
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CY7C373i
64-Macrocell
CY7C373i
FLASH370iTM
FLASH370i
22V10,
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MACH130-20
Abstract: MACH130 MACH230 PAL22V10 PAL26V16
Text: FINAL COM’L: -15/20 IND: -18/24 MACH130-15/20 Lattice Semiconductor High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS 84 Pins 64 Outputs 64 Macrocells 64 Flip-flops; 4 clock choices 15 ns tPD Commercial 18 ns tPD Industrial 4 “PAL26V16” Blocks
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MACH130-15/20
PAL26V16"
MACH131,
MACH230,
MACH231,
MACH435
MACH130
PAL22V10
14131H-26
MACH130-20
MACH230
PAL26V16
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PAL26V16
Abstract: MACH130-20 PAL 007 64 macrocells PAL 007 A MACH130 MACH230 PAL22V10 MACH130-20/BXA
Text: FINAL COM’L: -15/20 IND: -18/24 MACH130-15/20 Lattice/Vantis High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS 84 Pins 64 Outputs 64 Macrocells 64 Flip-flops; 4 clock choices 15 ns tPD Commercial 18 ns tPD Industrial 4 “PAL26V16” Blocks
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MACH130-15/20
PAL26V16"
MACH131,
MACH230,
MACH231,
MACH435
MACH130
PAL22V10
14131H-26
PAL26V16
MACH130-20
PAL 007
64 macrocells
PAL 007 A
MACH230
MACH130-20/BXA
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Untitled
Abstract: No abstract text available
Text: fax id: 6138 1CY 7C37 3i CY7C373i UltraLogic 64-Macrocell Flash CPLD Features Functional Description • • • • 64 macrocells in four logic blocks 64 I/O pins 5 dedicated inputs including 4 clock pins In-System Reprogrammable ISR™ Flash technology
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CY7C373i
64-Macrocell
CY7C373i
FLASH370iTM
FLASH370i
22V10,
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Untitled
Abstract: No abstract text available
Text: USE ULTRA37000TM FOR ALL NEW DESIGNS CY7C373i UltraLogic 64-Macrocell Flash CPLD Features • Available in 84-pin PLCC and 100-pin TQFP packages • Pin compatible with the CY7C374i • 64 macrocells in four logic blocks • 64 I/O pins Functional Description
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ULTRA37000TM
CY7C373i
64-Macrocell
84-pin
100-pin
CY7C374i
CY7C373i
FLASH370iTM
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Untitled
Abstract: No abstract text available
Text: fax id: 6138 CY7C373i UltraLogic 64-Macrocell Flash CPLD Features Functional Description • • • • 64 macrocells in four logic blocks 64 I/O pins 5 dedicated inputs including 4 clock pins In-System Reprogrammable ISR™ Flash technology — JTAG interface
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CY7C373i
64-Macrocell
CY7C373i
FLASH370iTM
FLASH370i
22V10,
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7C373-125
Abstract: CY7C373 CY7C374 FLASH370 CY7C373-66JC
Text: 7C373: Wednesday, September 23, 1992 Revision: Thursday, October 14, 1995 CY7C373 UltraLogict 64ĆMacrocell Flash CPLD Features D D D D D D D D Functional Description 64 macrocells in four logic blocks 64 I/O pins 6 dedicated inputs including 4 clock pins
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7C373:
CY7C373
64Macrocell
84pin
100pin
CY7C374
CY7C373
FLASH370t
7C373-125
CY7C374
FLASH370
CY7C373-66JC
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preset resistor
Abstract: No abstract text available
Text: fax id: 6138 CY7C373i UltraLogic 64-Macrocell Flash CPLD Features Functional Description • • • • 64 macrocells in four logic blocks 64 I/O pins 5 dedicated inputs including 4 clock pins In-System Reprogrammable ISR™ Flash technology — JTAG interface
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CY7C373i
64-Macrocell
CY7C373i
FLASH370iTM
FLASH370i
22V10,
preset resistor
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ULTRA37000TM
Abstract: No abstract text available
Text: USE ULTRA37000TM FOR ALL NEW DESIGNS CY7C373i UltraLogic 64-Macrocell Flash CPLD Features • Available in 84-pin PLCC and 100-pin TQFP packages • Pin compatible with the CY7C374i • 64 macrocells in four logic blocks • 64 I/O pins Functional Description
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ULTRA37000TM
CY7C373i
64-Macrocell
84-pin
100-pin
CY7C374i
CY7C373i
FLASH370iTM
FLASH370i
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Untitled
Abstract: No abstract text available
Text: fax id: 6128 CYPRESS CY7C373 UltraLogic 64-Macrocell Flash CPLD FLASH370 fam ily the CY7C373 is designed to bring the ease of use and high performance of the 22V10 to high-density CPLDs. Features • 64 macrocells in four logic blocks • 64 I/O pins The 64 macrocells in the CY7C373 are divided between four
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CY7C373
64-Macrocell
FLASH370
CY7C373
22V10
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Untitled
Abstract: No abstract text available
Text: fax id: 6138 CY7C373Î ^CYPRESS UltraLogic 64-Macrocell Flash CPLD Features • • • • Functional Description 64 macrocells in four logic blocks 64 I/O pins 5 dedicated inputs including 4 clock pins In-System Reprogram mable ISR™ Flash technology
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CY7C373Ã
64-Macrocell
CY7C373i
FLASH370i
22V10,
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Untitled
Abstract: No abstract text available
Text: W CYPRESS CY7C373Ì UltraLogic 64-Macrocell Flash CPLD Functional Description Features • • • • 64 macrocells in four logic blocks 64 I/O pins 5 dedicated inputs including 4 clock pins In-System Reprogrammable ISR™ Flash technology — JTAG interface
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PDF
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CY7C373Ã
64-Macrocell
84-pin
100-pin
CY7C374i
FLASH370iâ
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Untitled
Abstract: No abstract text available
Text: fax id: 6138 CY7C373Ì UltraLogic 64-Macrocell Flash CPLD • Pin compatible with the CY7C374i Features • • • • 64 macrocells in four logic blocks 64 I/O pins 5 dedicated inputs including 4 clock pins In-System Reprogram mable ISR™ Flash technology
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PDF
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CY7C373Ã
64-Macrocell
CY7C374i
84-pin
100-pin
CY7C373i
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TAC01
Abstract: No abstract text available
Text: CY7C343 CYPRESS SEMICONDUCTOR 64-Macrocell MAX EPLD F eatures F unctional D escription • 64 MAX macrocells in 4 LABs The CY7C343 is a high-performance, high-density erasable programmable logic device, available in 44-pin PLCC and HLCC packages. The CY7C343 contains 64 highly flexible
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CY7C343
44-pin
64-Macrocell
CY7C343
CY7C343--
30HC/HI
CY7C343-30JC/JI
TAC01
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Untitled
Abstract: No abstract text available
Text: fax id: 6138 CYPRESS PRELIMINARY CY7C373Ì UltraLogic 64-Macrocell Flash CPLD Features • • • • Functional Description 64 macrocells in four logic blocks 64 I/O pins 5 dedicated inputs including 4 clock pins In-System Reprogram m able ISR™ Flash technology
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CY7C373Ã
64-Macrocell
CY7C373i
ASH370iâ
FLASH370i
22V10,
100-Pin
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Untitled
Abstract: No abstract text available
Text: CYPRESS 64-Macrocell Flash CPLD is designed to bring the ease of use and high performance of the 22V10 to higbdensity CPLDs. Features • 64 macrocells in four logic blocks • 64 I/O pins • 6 dedicated inputs including 4 clock pins • No hidden delays
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64-Macrocell
22V10
CY7C373
84-pin
100-pin
CY7C374
CY7C37ICATIONS
lash370,
25flTbb2
CY7C373
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MACH130
Abstract: No abstract text available
Text: F IN A L COM’L: -15/20 IND: -18/24 MACH130-15/20 High-Density EE CMOS Programmable Logic a Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 84 Pins ■ 64 Outputs ■ 64 Macrocells ■ 64 Flip-flops; 4 clock choices ■ ■ 4 “PAL26V16” Blocks
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MACH130-15/20
PAL26V16â
MACH131,
MACH230,
MACH231,
MACH435
PAL22V10
MACH130
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Untitled
Abstract: No abstract text available
Text: ” / C Y P R E S S C Y 7 < M UltraLogic 64-Macrocell Flash CPLD Features • • • • Functional Description 64 macrocells in four logic blocks 64 I/O pins 5 dedicated inputs including 4 clock pins In-System Reprogrammable ISR™ Flash technology
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OCR Scan
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64-Macrocell
CY7C373i
ASH370iTM
ASH370i
22V10,
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Untitled
Abstract: No abstract text available
Text: fax id: 6138 CY7C373Ì C'i- UltraLogic 64-Macrocell Flash CPLD • Pin compatible with the CY7C374i Features Functional Description • 64 macrocells in four logic blocks • 64 I/O pins • 5 dedicated inputs including 4 clock pins • In-System Reprogrammable ISR™ Flash technology
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PDF
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CY7C373Ì
64-Macrocell
CY7C374i
CY7C373i
FLASH370iTM
FLASH370i
22V10,
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