k3570
Abstract: V62C31161024
Text: PRELIMINARY INFORMATION V62C31161024 64K x 16 STATIC RAM MOSEL VITELIC Features Description • High-speed: 35, 70 ns ■ Ultra low DC operating current of 4mA max. – TTL Standby: 0.5 mA (Max.) – CMOS Standby: 10 µA (Max.) ■ Fully static operation
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V62C31161024
44-pin
V62C31161024
576-bit
k3570
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P4C1258
Abstract: No abstract text available
Text: P4C1258 ULTRA HIGH SPEED 64K x 4 STATIC CMOS RAM FEATURES Full CMOS, 6T Cell Three-State Outputs High Speed Equal Access and Cycle Times – 15/20/25/35 ns (Commercial/Industrial) TTL/CMOS Compatible Outputs Fully TTL Compatible Inputs Low Power Standard Pinout (JEDEC Approved)
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P4C1258
24-Pin
P4C1258
144-bit
SRAM123
SRAM123
Oct-05
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PDF
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Untitled
Abstract: No abstract text available
Text: P4C1258 ULTRA HIGH SPEED 64K x 4 STATIC CMOS RAM FEATURES Full CMOS, 6T Cell Three-State Outputs High Speed Equal Access and Cycle Times – 15/20/25/35 ns (Commercial/Industrial) TTL/CMOS Compatible Outputs Fully TTL Compatible Inputs Low Power Standard Pinout (JEDEC Approved)
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P4C1258
24-Pin
144-bit
-15PC
-15JC
-15PI
-15JI
-20PC
-20JC
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PDF
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Untitled
Abstract: No abstract text available
Text: P4C1258 ULTRA HIGH SPEED 64K x 4 STATIC CMOS RAM FEATURES Full CMOS, 6T Cell Three-State Outputs High Speed Equal Access and Cycle Times – 15/20/25/35 ns (Commercial/Industrial) TTL/CMOS Compatible Outputs Fully TTL Compatible Inputs Low Power Standard Pinout (JEDEC Approved)
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P4C1258
24-Pin
P4C1258
144-bit
SRAM123
SRAM123
Oct-05
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PDF
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V61C51161024
Abstract: No abstract text available
Text: MOSEL VITELIC PRELIMINARY V61C51161024 64K x 16 HIGH SPEED STATIC RAM Features Description • ■ ■ ■ ■ ■ The V61C51161024 is a 1,048,576-bit static random-access memory organized as 65,536 words by 16 bits. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with
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V61C51161024
V61C51161024
576-bit
44-pin
I/O15
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DBLL
Abstract: No abstract text available
Text: IS62WV6416DALL/DBLL IS65WV6416DALL/DBLL 64K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM FEATURES • High-speed access time: 35ns, 45ns, 55ns • CMOS low power operation: 15 mW typical operating 1.5 µW (typical) CMOS standby • TTL compatible interface levels
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IS62WV6416DALL/DBLL
IS65WV6416DALL/DBLL
62WV6416DALL)
65WV6416DBLL)
IS62/65WV6416DALL
IS62/65WV6416DBLL
ISSV6416DBLL-45CTLA3
IS65WV6416DBLL-45BLA3
DBLL
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IS64LV6416AL
Abstract: No abstract text available
Text: ISSI IS64LV6416AL 64K x 16 HIGH-SPEED CMOS STATIC RAM PRELIMINARY INFORMATION APRIL 2003 FEATURES • High-speed access time: 20 ns, 25ns • CMOS low power operation: 38 mW typical operating 10 µW (typical) standby • TTL compatible interface levels
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IS64LV6416AL
IS64LV6416AL
576-bit
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IS62WV6416DBLL-45TLI
Abstract: IS62WV6416DALL-55BLI IS62WV6416DBLL-45BLI 45TLA
Text: IS62WV6416DALL/DBLL IS65WV6416DALL/DBLL 64K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM FEATURES • High-speed access time: 35ns, 45ns, 55ns • CMOS low power operation: 15 mW typical operating 1.5 µW (typical) CMOS standby • TTL compatible interface levels
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IS62WV6416DALL/DBLL
IS65WV6416DALL/DBLL
IS62/65WV6416DALL
IS62/65WV6416DBLL
IS65WV6416DBLL-45BLA3
MO-207
IS62WV6416DBLL-45TLI
IS62WV6416DALL-55BLI
IS62WV6416DBLL-45BLI
45TLA
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EDI8808CB
Abstract: C323 64K 8KX8 CMOS SRAM sram 8kx8
Text: ^EDI _ EDI8808CB E le ctro n ic D « d g ru Inc. High Speed, Low Power 64K Monolithic SRAM 8Kx8 Static RAM CMOS, High Speed Monolithic Features The EDI8808CB is a 65,536bit, high speed CMOS 64K bit CMOS Static Static RAM organized as 8Kx8. Ali inputs and outputs are TTL compatible and allow
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EDI8808CB
EDI8808CB
536bit,
MIL-STD-883,
A0-A12
C323
64K 8KX8 CMOS SRAM
sram 8kx8
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PDF
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54HCT138
Abstract: No abstract text available
Text: D D C MEM-84000 ILC DATA DEVICE CORPORATION_ 64K x 16 STATIC RAM FEATURES DESCRIPTION The MEM-84000 is a 64K x 16 static RAM organized as four 32K x 8 blocks. Features of this hybrid include TTL com patible inputs and outputs, external or internal decoding, and operation over
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MEM-84000
MIL-STD-883C
MEM-84000
MEM-84000-X
010of
MIL-STD-883.
MIL-STD-883
54HCT138
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PDF
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Untitled
Abstract: No abstract text available
Text: d Td Tc MEM-84000 ILC DATA DEVICE CORPORATION_ 64K x 16 STATIC RAM FEATURES DESCRIPTION The MEM-84000 is a 64K x 16 static RAM organized as four 32K x 8 blocks. Features of this hybrid include TTL com patible inputs and outputs, external or internal decoding, and operation over
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MEM-84000
MEM-84000
MIL-STD-883C,
MEM-84000-X
400TYP
010ofoutlinedimensions.
MIL-STD-883.
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PDF
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Untitled
Abstract: No abstract text available
Text: rï D DC MEM-84000 ILC DATA DEVICE CORPORATION_ 64K x 16 STATIC RAM FEATURES DESCRIPTION The MEM-84000 is a 64K x 16 static RAM organized as four 32K x 8 blocks. Features of this hybrid include TTL com patible inputs and outputs, external or internal decoding, and operation over
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MEM-84000
MEM-84000
MIL-STD-883C,
MIL-STD-883.
MIL-STD-883
B-3/88-3M
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PDF
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Untitled
Abstract: No abstract text available
Text: ri •S- D D C i MEM-84000 ILC DATA DEVICE CORPORATION_ 64K x 16 STATIC RAM FEATURES APPRO X. Vz ACTUAL S IZE DESCRIPTION The M E M -84 00 0 is a 64K x 16 static RAM organized as four 32K x 8 blocks. Features of this hybrid include TTL com patible inputs and outputs, external or
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S2564RL
Abstract: S2564RLF
Text: S-2564RL 64K-bit CMOS static RAM The S-2564R is a 8192-word x 8-bit CM OS static RAM. It is com posed of 4 transistors and 2 resisters, and operates completely static. All inputs and outputs can interface directly with TTL data bus. Features Low power consumption
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S-2564RL
64K-bit
S-2564R
8192-word
28-pin
S-2564RL
S-2564RLF
S2564RL
S2564RLF
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Ci 6287
Abstract: No abstract text available
Text: 64K x 1 CMOS STATIC RAM CT M 0SeL ms 6287 July 1986 FEATURES DESCRIPTION • High-speed— 35/45/55/70ns • Low Power dissipation 250mW Typ. Operating IOOjiW (Typ.) Standby • Single 5V power supply • Fully static operation • Input and oulpui directly TTL compatible
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35/45/55/70ns
250mW
MS6287
22-pin,
Ci 6287
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PDF
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7414e
Abstract: No abstract text available
Text: Prelibine:”/ CMOS SRAM KM6161002B/BL, KM6161002BI/BLI 64K x 16 Bit High-Speed CMOS Static RAM FEATURES GENERAL DESCRIPTION •• Fast Access Time 8,10,12» « Max. - Low Power Dissipation Standby (TTL) : 30* • (Max.) The KM6161002B/BL is a 1,048,576-bit high-speed Static Ran
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KM6161002B/BL,
KM6161002BI/BLI
KM6161002B/BL
I/O16
KM6161
44-TSOP2-4QOF
7414e
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PDF
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A314J
Abstract: lm516 lm5168
Text: LH5168/H FEATURES CMOS 64K 8K x 8 Static RAM PIN CONNECTIONS • 8,192 x 8 bit organization • Access times: 80/100 ns (MAX.) Fully-Static operation • Three-state outputs • Single +5 V power supply • TTL compatible I/O • Wide temperature range available
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LH5168/H
LH5168/D/N
LH5168/D/N/T
LH5168H/HD/HN/HT
LH5168/D/NAT
LH5168H/HD/HN/HT
28-PIN
28-RN
28-pin,
A314J
lm516
lm5168
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PDF
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Untitled
Abstract: No abstract text available
Text: ^EDI _ EDI8808CB Electronic Designs Inc. High Speed, Low Power 64K Monolithic SRAM 8Kx8 Static RAM CMOS, High Speed Monolithic The EDI8808CB is a 65,536bit, high speed CMOS Q iF M M 1]© i Features Static RAM organized as 8Kx8. All inputs and outputs are TTL compatible and allow
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EDI8808CB
EDI8808CB
536bit,
MIL-STD-883,
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PDF
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Untitled
Abstract: No abstract text available
Text: MOSEL VITELIC PRELIMINARY INFORMATION V62C31161024 64K x 16 STA TIC RAM Features Description • High-speed: 35, 70 ns ■ Ultra low DC operating current of 4mA max. - TTL Standby: 0.5 mA (Max.) - CMOS Standby: 10 [xA (Max.) ■ Fully static operation ■ All inputs and outputs directly TTL compatible
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V62C31161024
44-pin
576-bit
433-0952Tlx:
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PDF
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Untitled
Abstract: No abstract text available
Text: P re 'ir'irc í-y KM 616V1002B/BL, KM616V1002BI/BLI CMOS SRAM 64K x 16 Bit High-Speed CMOS Static RAM 3 ,3V Operating FEATURES GENERAL DESCRIPTION Fast Access Time 8,10,12* • (Max.) . Low Power Dissipation Standby (TTL) : 30« • (Max.) The KM616V1002B/BL is a 1,048,576-bit high-speed Static
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KM616V1002B/BL,
KM616V1002BI/BLI
KM616V1002B/BL
KM616V1002B/BL-12
I/O16
KM616V1002B/BLJ
44-SOJ-400
KM616V1002B/BLT:
44-TSOP2-400F
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DA72
Abstract: D-A72
Text: LH52253 FEATURES • Fast Access Times: 17/20/25/35 ns • Low-Power Standby when Deselected • TTL Compatible I/O • 5 V ± 10% Supply • Fully-Static Operation CMOS 64K x 4 Static RAM The LH52253 offers an Output Enable G for use in managing the Data Bus. Bus contention_during Write
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LH52253
28-Pin,
300-mil
LH52253
256K-bit
LH52253.
28SK-DIP
DA72
D-A72
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PDF
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LH52252A
Abstract: No abstract text available
Text: CMOS 64K x 4 Static RAM FEATURES • Fast Access Times: 25/35/45 ns • Standard 24-Pin, 300-mil DIP • Space Saving 24-Pin, 300-mil SOJ • JEDEC Standard Pinouts • Low Power Standby When Deselected • TTL Compatible I/O • 5 V ± 10% Supply • Fully Static Operation
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24-Pin,
300-mil
LH52252A
LH52252A
24-Din.
DIP24-P-300Ì
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PDF
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Untitled
Abstract: No abstract text available
Text: LH52253 FEATURES • Fast Access Times: 17/20/25/35 ns • Low-Power Standby when Deselected • TTL Compatible I/O • 5 V + 10% Supply • Fully-Static Operation CMOS 64K x 4 Static RAM The LH52253 offers an Output Enable G for use in managing the Data Bus. Bus contention during Write
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OCR Scan
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LH52253
28-Pin,
300-mil
LH52253
256K-bit
LH52253.
28DIP-1
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PDF
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Untitled
Abstract: No abstract text available
Text: LH52253 FEATURES • Fast Access Times: 17/20/25/35 ns • Low-Power Standby when Deselected • TTL Compatible I/O • 5 V ± 10% Supply • Fully-Static Operation CMOS 64K X 4 Static RAM The LH52253 offers an Output Enable G for use in managing the Data Bus. Bus contention jluring Write
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OCR Scan
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LH52253
28-Pin,
300-mil
LH52253
256K-bit
LH52253.
28SK-DIP
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PDF
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