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    74 LS 14 LOGIC GATES Search Results

    74 LS 14 LOGIC GATES Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TC4001BP Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, 2-Input/AND, DIP14 Visit Toshiba Electronic Devices & Storage Corporation
    74HC08D Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, 2-Input/AND, SOIC14 Visit Toshiba Electronic Devices & Storage Corporation
    TC4011BP Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, 2-Input/NAND, DIP14 Visit Toshiba Electronic Devices & Storage Corporation
    TC4093BP Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, 2-Input/NAND, DIP14 Visit Toshiba Electronic Devices & Storage Corporation
    7UL1G32NX Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), 2-Input/OR, XSON6, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation

    74 LS 14 LOGIC GATES Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    74LS13

    Abstract: 74LS14 751A-02 trigger schmitt 74 14 ttl 74ls14
    Text: SN54/74LS13 SN54/74LS14 SCHMITT TRIGGERS DUAL GATE/HEX INVERTER The SN54LS / 74LS13 and SN54LS / 74LS14 contain logic gates / inverters which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into


    Original     		SN54/74LS13 SN54/74LS14 SN54LS 74LS13 74LS14 751A-02 trigger schmitt 74 14 ttl 74ls14 PDF

    74LS14 not gate

    Abstract: 74LS14 ttl 74ls14 74ls13 74ls14 ttl equivalent for 74LS13 TTL Schmitt-Trigger Inverters TTL Schmitt-Trigger LOW POWER SCHOTTKY 74 LS 14 Logic Gates 74LS14 datasheet
    Text: SN54/74LS13 SN54/74LS14 SCHMITT TRIGGERS DUAL GATE/HEX INVERTER The SN54LS/ 74LS13 and SN54LS / 74LS14 contain logic gates / inverters which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into


    Original     		SN54/74LS13 SN54/74LS14 SN54LS/ 74LS13 SN54LS 74LS14 74LS14 not gate ttl 74ls14 74ls14 ttl equivalent for 74LS13 TTL Schmitt-Trigger Inverters TTL Schmitt-Trigger LOW POWER SCHOTTKY 74 LS 14 Logic Gates 74LS14 datasheet PDF

    74f13

    Abstract: 74F14 Schmitt Triggers MC54/74F14 751A-02 inverters diagrams
    Text: MC54/74F13 MC54/74F14 SCHMITT TRIGGERS DUAL 4-INPUT NAND/HEX INVERTERS The MC54/74F13 and MC54/74F14 contain logic gates/inverters which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. Additionally, they have greater noise margin


    Original     		MC54/74F13 MC54/74F14 MC54/74F13 MC54/74F14 74f13 74F14 Schmitt Triggers 751A-02 inverters diagrams PDF

    74LS48

    Abstract: 74ls48 PIN OUT decoder 74LS48 TTL 74LS48 74ls48 datasheet 74LS48D LS48 lamptest 561 7 SEGMENT
    Text: SN54/74LS48 BCD TO 7-SEGMENT DECODER The SN54 / 74LS48 is a BCD to 7-Segment Decoder consisting of NAND gates, input buffers and seven AND-OR-INVERT gates. Seven NAND gates and one driver are connected in pairs to make BCD data and its complement available to the seven decoding AND-OR-INVERT gates. The remaining


    Original     		SN54/74LS48 74LS48 74ls48 PIN OUT decoder 74LS48 TTL 74LS48 74ls48 datasheet 74LS48D LS48 lamptest 561 7 SEGMENT PDF

    74LS48

    Abstract: decoder 74LS48 74ls48 PIN OUT 74LS48D ttl 74ls48 LS48 74LS48 function table
    Text: SN54/74LS48 BCD TO 7-SEGMENT DECODER The SN54 / 74LS48 is a BCD to 7-Segment Decoder consisting of NAND gates, input buffers and seven AND-OR-INVERT gates. Seven NAND gates and one driver are connected in pairs to make BCD data and its complement available to the seven decoding AND-OR-INVERT gates. The remaining


    Original     		SN54/74LS48 74LS48 decoder 74LS48 74ls48 PIN OUT 74LS48D ttl 74ls48 LS48 74LS48 function table PDF

    74LS47

    Abstract: 74LS47 gate diagram pin diagram of 74LS47 ttl 74ls47 7 segment ttl 74ls47 74LS47 functions 74LS47 pin 74LS47 pin configuration 74ls47 PIN DIAGRAM LS 74LS47
    Text: SN54/74LS47 BCD TO 7-SEGMENT DECODER/DRIVER The SN54 / 74LS47 are Low Power Schottky BCD to 7-Segment Decoder / Drivers consisting of NAND gates, input buffers and seven AND-OR-INVERT gates. They offer active LOW, high sink current outputs for driving indicators directly. Seven NAND gates and one driver are connected in pairs


    Original     		SN54/74LS47 74LS47 74LS47 gate diagram pin diagram of 74LS47 ttl 74ls47 7 segment ttl 74ls47 74LS47 functions 74LS47 pin 74LS47 pin configuration 74ls47 PIN DIAGRAM LS 74LS47 PDF

    pin diagram of 74LS47

    Abstract: 74LS47 pin configuration 74LS47 74LS47 gate diagram ttl 74ls47 74LS47 functions ttl 74ls47 7 segment datasheet 74LS47 7-segment 74ls47 74LS47 DATASHEET
    Text: SN54/74LS47 BCD TO 7-SEGMENT DECODER/DRIVER The SN54 / 74LS47 are Low Power Schottky BCD to 7-Segment Decoder / Drivers consisting of NAND gates, input buffers and seven AND-OR-INVERT gates. They offer active LOW, high sink current outputs for driving indicators directly. Seven NAND gates and one driver are connected in pairs


    Original     		SN54/74LS47 74LS47 pin diagram of 74LS47 74LS47 pin configuration 74LS47 gate diagram ttl 74ls47 74LS47 functions ttl 74ls47 7 segment datasheet 74LS47 7-segment 74ls47 74LS47 DATASHEET PDF

    74LS132

    Abstract: 74 LS 14 Logic Gates 751A-02 SN54LSXXXJ SN74LSXXXD SN74LSXXXN trigger schmitt 74 14 ttl NAND gate circuit
    Text: SN54/74LS132 QUAD 2-INPUT SCHMITT TRIGGER NAND GATE The SN54 / 74LS132 contains four 2-Input NAND Gates which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into sharply defined, jitterfree output signals. Additionally, they have greater noise margin than


    Original     		SN54/74LS132 74LS132 74 LS 14 Logic Gates 751A-02 SN54LSXXXJ SN74LSXXXD SN74LSXXXN trigger schmitt 74 14 ttl NAND gate circuit PDF

    Untitled

    Abstract: No abstract text available
    Text: SN74ALS21 A, SN74AS21, SN54ALS21A, SN54AS21 DUAL 4-INPUT POSITIVE-ANO GATES D2661, APRIL 1982 - REVISED MAY 198« Package Options Include Plastic "Small Outline" Packages. Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs S N 5 4A LS 2 1A . S N 64A S 21 . . J PACKAGE


    OCR Scan     		SN74ALS21 SN74AS21, SN54ALS21A, SN54AS21 D2661, 300-mil SN64A821 PDF

    TTL LS 7413

    Abstract: 74 LS 00 Logic Gates schmitt trigger 7413 ls 7413 n
    Text: 7413, LS13 Signetics Gates Dual 4-Input NAND Schmitt Trigger Product Specification Logic Products DESCRIPTION T h e '1 3 contains tw o 4-input N A N D gates which accept standard T T L input signals and provide standard T T L output levels. Th ey are capable of transforming


    OCR Scan     		OP01670S P016B0S TTL LS 7413 74 LS 00 Logic Gates schmitt trigger 7413 ls 7413 n PDF

    74LS14 not gate

    Abstract: 74LS14 74ls14 ttl ttl 74ls14 74LS14 DATA LS14 74LS13 TTL Schmitt-Trigger Inverters 751A-02 LS13
    Text: MOTOROLA SN54/74LS13 SN54/74LS14 SCHMITT TRIGGERS DUAL GATE/HEX INVERTER The SN 54LS /74LS 13 and S N 54LS /74LS 14 contain logic gates/inverters which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into


    OCR Scan     		SN54LS/74LS13 SN54LS/74LS14 SN54/74LS13 SN54/74LS14 74LS14 not gate 74LS14 74ls14 ttl ttl 74ls14 74LS14 DATA LS14 74LS13 TTL Schmitt-Trigger Inverters 751A-02 LS13 PDF

    74LS48

    Abstract: 74ls48 PIN OUT TTL 74ls48 decoder 74LS48 SN54/74LS48 LS48 motorola 74ls48 LS 74LS48
    Text: M MOTOROLA. SN54/74LS48 BCD TO 7-SEGMENT DECODER The SN54/74LS48 is a BCD to 7-Segment Decoder consisting of NAND gates, input buffers and seven AND-OR-INVERT gates. Seven NAND gates and one driver are connected in pairs to make BCD data and its complement


    OCR Scan     		SN54/74LS48 74LS48 74ls48 PIN OUT TTL 74ls48 decoder 74LS48 LS48 motorola 74ls48 LS 74LS48 PDF

    74LS48

    Abstract: 561 7 SEGMENT ttl 74ls48
    Text: M M OTOROLA SN54/74LS48 BCD TO 7-SEGMENT DECODER The SN54/74LS48 is a BCD to 7-Segment Decoder consisting of NAND gates, input buffers and seven AND-OR-INVERT gates. Seven NAND gates and one driver are connected in pairs to make BCD data and its complement


    OCR Scan     		SN54/74LS48 74LS48 561 7 SEGMENT ttl 74ls48 PDF

    74F13

    Abstract: 74F14
    Text: MOTOROLA MC54/74F13 MC54/74F14 SCHMITT TRIGGERS DUAL 4-INPUT NAND/HEX INVERTERS The MC54/74F13 and MC54/74F14 contain logic gates/inverters which ac­ cept standard TTL input signals and provide standardTT Loutput levels. They are capable of transforming slowly changing input signals into sharply de­


    OCR Scan     		MC54/74F13 MC54/74F14 54/74F MC54/74F13 MC54/74F14 74F13 74F14 PDF

    74LS132

    Abstract: 751A-02 SN54LSXXXJ SN74LSXXXD SN74LSXXXN 5216 motorola 74 standard TTL
    Text: SN54/74LS132 QUAD 2-INPUT SCHMITT TRIGGER NAND GATE The SN54 / 74LS132 contains four 2-Input NAND Gates which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into sharply defined, jitterfree output signals. Additionally, they have greater noise margin than


    Original     		SN54/74LS132 74LS132 751A-02 SN54LSXXXJ SN74LSXXXD SN74LSXXXN 5216 motorola 74 standard TTL PDF

    IC 74LS47

    Abstract: pin diagram of 74LS47 TTL IC 74ls470 motorola 74ls47 74LS47 7-segment 74ls47 74LS47 functions 74LS47 gate diagram 74LS47 pin ic 74ls47 and 7 segment
    Text: g MOTOROLA SN54/74LS47 BCD TO 7-SEGMENT DECODER/DRIVER The S N 54/74LS 47 are Low Power Schottky BCD to 7-Segment Decod­ er/D rivers consisting of NAND gates, input buffers and seven AND-OR-INVERT gates. They offer active LOW, high sink current outputs for driving


    OCR Scan     		SN54/74LS47 54/74LS IC 74LS47 pin diagram of 74LS47 TTL IC 74ls470 motorola 74ls47 74LS47 7-segment 74ls47 74LS47 functions 74LS47 gate diagram 74LS47 pin ic 74ls47 and 7 segment PDF

    7402 TTL

    Abstract: 7402 TTL 7402 7402 pin configuration 74LS02 function table 74LS02 pin configuration 7402 signetics TTL specification of 74ls02 7402 nor 74S02
    Text: Signetics I 7402, LS02, S02 Gates Quad Two-Input NOR Gate Product Specification Logic Products TYPE TYPICAL SUPPLY CURRENT TOTAL TYPICAL PROPAGATION DELAY 7402 10ns 11mA 74LS02 10ns 2.2mA 74S02 3.5ns 22mA ORDERING CODE COMMERCIAL RANGE VCc = 5V ±5% ; T a = 0°C to +70°C


    OCR Scan     		74LS02 74S02 N7402N, N74LS02N, N74S02N N74LS02D, N74S02D 10Sul 10LSul WF07570S 7402 TTL 7402 TTL 7402 7402 pin configuration 74LS02 function table 74LS02 pin configuration 7402 signetics TTL specification of 74ls02 7402 nor PDF

    ic 7451 pin configuration

    Abstract: 74 LS 00 Logic Gates
    Text: 7451, LS51, S51 Signetics Gates '51, 'S51 Dual 2-Wide 2-Input AND-OR-lnvert Gate LS51 Dual 2-Wide 3-Input, 2-Wide 2-Input AND-OR-lnvert Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 7451 11ns 5.7mA 74LS51


    OCR Scan     		74LS51 74S51 N7451N, N74LS51N, N74S51N N74LS51D, N74S51D ic 7451 pin configuration 74 LS 00 Logic Gates PDF

    ic 74132

    Abstract: f 74132 LS132 74132 853051 R/ls 74132
    Text: 74132, LS132 SigneHcs Schmitt Triggers Quad 2-Input NAND Schmitt Trigger Product Specification Logic Products The '132 contains four 2-input NAND gates which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming


    OCR Scan     		LS132 ic 74132 f 74132 LS132 74132 853051 R/ls 74132 PDF

    motorola 74ls47

    Abstract: 74LS47 ttl 74ls47 74LS47 functions ttl 74ls47 7 segment LS 74LS47 of 74ls47 7-segment 74ls47 74LS47 pin configuration 74LS47 pin
    Text: g MOTOROLA SN54/74LS47 BCD TO 7-SEGMENT DECODER/DRIVER The S N 54/74LS 47 are Low Power Schottky BCD to 7-Segment Decod­ er/D rivers consisting of NAND gates, input buffers and seven AND-OR-INVERT gates. They offer active LOW, high sink current outputs for driving


    OCR Scan     		SN54/74LS47 motorola 74ls47 74LS47 ttl 74ls47 74LS47 functions ttl 74ls47 7 segment LS 74LS47 of 74ls47 7-segment 74ls47 74LS47 pin configuration 74LS47 pin PDF

    1032E

    Abstract: No abstract text available
    Text: LeadFree Package Options Available! ispLSI 1032E In-System Programmable High Density PLD Features Functional Block Diagram • HIGH DENSITY PROGRAMMABLE LOGIC — 6000 PLD Gates Output Routing Pool — 64 I/O Pins, Eight Dedicated Inputs D7 D6 D5 D4 D3 D2 D1 D0


    Original     		1032E 84-Pin 100-Pin 84-PLCC 1032E-70LJNI 1032E-70LTNI 1032E PDF

    schmitt trigger 7413

    Abstract: 7413 4-input nand gate equivalent for 7413 dual schmitt trigger 74LS13 function table 74ls gate symbols 1N3064 1N916 74LS 74LS13 LS13
    Text: 7413, LS13 Signetics Gates Dual 4-Input NAND Schmitt Trigger Product Specification Logic Products DESCRIPTION Th e '1 3 contains two 4-input N AN D gates which accept standard T T L input signals and provide standard T T L output levels. They are capable of transforming


    OCR Scan     		PDF

    1032E

    Abstract: IN5384 EWD18
    Text: ispLSI 1032E In-System Programmable High Density PLD Features Functional Block Diagram • HIGH DENSITY PROGRAMMABLE LOGIC — 6000 PLD Gates — 64 I/O Pins, Eight Dedicated Inputs — 192 Registers — High Speed Global Interconnect — Wide Input Gating for Fast Counters, State


    Original     		1032E 1032E-80LJ 84-Pin 1032E-80LT 100-Pin 1032E-70LJ 1032E-70LT 041A/1032E 1032E IN5384 EWD18 PDF

    74LS132

    Abstract: No abstract text available
    Text: MOTOROLA SN54/74LS132 QUAD 2-INPUT SCHMITT TRIGGER NAND GATE The S N 54/74LS 132 contains four 2-Input NAND Gates which accept stan­ dard TTL input signals and provide standard TTL output levels. They are ca­ pable of transforming slowly changing input signals into sharply defined, jitterfree output signals. Additionally, they have greater noise margin than


    OCR Scan     		SN54/74LS132 54/74LS SN54/74LS132 74LS132 PDF