74LS112 Search Results

74LS112 Result Highlights (5)

Part	Manufacturer	Description
74LS112P-E	Renesas Electronics Corporation	HD74LS Series
74LS112FPEL-E	Renesas Electronics Corporation	HD74LS Series
SN74LS112ANSR	Texas Instruments	Dual J-K Negative-Edge-Triggered Flip-Flops With Clear And Preset 16-SO 0 to 70
SN74LS112AN	Texas Instruments	Dual J-K Negative-Edge-Triggered Flip-Flops With Clear And Preset 16-PDIP 0 to 70
SN74LS112ADR	Texas Instruments	Dual J-K Negative-Edge-Triggered Flip-Flops With Clear And Preset 16-SOIC 0 to 70

74LS112 Price and Stock

Filter by Manufacturer


Texas Instruments SN74LS112ANSR IC FF JK TYPE DUAL 1BIT 16SO
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	SN74LS112ANSR	Digi-Reel	1,933		1	1 $0.78 10 $0.556 100 $0.4381 1000 $0.37644 10000 $0.37644	Buy Now
	SN74LS112ANSR	Cut Tape	1,933		1	1 $0.78 10 $0.556 100 $0.4381 1000 $0.37644 10000 $0.37644	Buy Now
	SN74LS112ANSR	Reel			2,000	1 - 10 - 100 - 1000 - 10000 $0.34414	Buy Now
Mouser Electronics	SN74LS112ANSR		1,916			1 $0.78 10 $0.5 100 $0.409 1000 $0.377 10000 $0.337	Buy Now
Texas Instruments SN74LS112AD IC FF JK TYPE DUAL 1BIT 16SOIC
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	SN74LS112AD	Tube	769		1	1 $0.83 10 $0.596 100 $0.83 1000 $0.41962 10000 $0.41962	Buy Now
Bristol Electronics	SN74LS112AD		31			1 - 10 - 100 - 1000 - 10000 -	Get Quote
Rochester Electronics	SN74LS112AD		49,113		1	1 $0.3792 10 $0.3792 100 $0.3564 1000 $0.3223 10000 $0.3223	Buy Now
Texas Instruments SN74LS112AN IC FF JK TYPE DUAL 1BIT 16DIP
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	SN74LS112AN	Tube	438		1	1 $0.81 10 $0.576 100 $0.4544 1000 $0.39077 10000 $0.36533	Buy Now
Mouser Electronics	SN74LS112AN					1 $0.81 10 $0.518 100 $0.424 1000 $0.39 10000 $0.359	Get Quote
Newark	SN74LS112AN	Bulk	713		1	1 $1.1 10 $1.02 100 $0.924 1000 $0.832 10000 $0.772	Buy Now
Bristol Electronics	SN74LS112AN		100			1 - 10 - 100 - 1000 - 10000 -	Get Quote
	SN74LS112AN		66			1 - 10 - 100 - 1000 - 10000 -	Get Quote
Rochester Electronics	SN74LS112AN		30,647		1	1 $0.3653 10 $0.3653 100 $0.3434 1000 $0.3105 10000 $0.3105	Buy Now

TME	SN74LS112AN		820		1	1 $0.74 10 $0.74 100 $0.56 1000 $0.455 10000 $0.36	Buy Now
ComSIT USA	SN74LS112AN		18,949			1 - 10 - 100 - 1000 - 10000 -	Get Quote
Chip1Stop	SN74LS112AN	Tube	948			1 $0.648 10 $0.451 100 $0.358 1000 $0.324 10000 $0.324	Buy Now
Component Electronics, Inc	SN74LS112AN		2,164			1 $1.15 10 $1.15 100 $0.87 1000 $0.75 10000 $0.75	Buy Now
Win Source Electronics	SN74LS112AN		1,575			1 - 10 - 100 - 1000 $0.2584 10000 $0.2239	Buy Now
Rochester Electronics LLC 74LS112P-E DUAL JK FLIP-FLOP, SET AND RESET
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	74LS112P-E	Bulk			601	1 - 10 - 100 - 1000 $0.5 10000 $0.5	Buy Now
Rochester Electronics LLC SN74LS112AD SN74LS112A DUAL J-K NEGATIVE-EDG
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	SN74LS112AD	Bulk			761	1 - 10 - 100 - 1000 $0.39 10000 $0.39	Buy Now

Find more 74LS112 price and stock on Findchips.com

74LS112 Datasheets (14)

Part	Manufacturer	Description	Datasheet Type	PDF
74LS112	Fairchild Semiconductor	Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs	Original	PDF
74LS112	Hitachi Semiconductor	Dual J-K Negative-edge-triggered Flip-Flops(with Preset and Clear)	Original	PDF
74LS112	Motorola	DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP	Original	PDF
74LS112	Texas Instruments	DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR	Original	PDF
74LS112	Fairchild Semiconductor	Full Line Condensed Catalogue 1977	Scan	PDF
74LS112	Raytheon	Dual J-K Negative-Edge-Triggered Flip-Flops	Scan	PDF
74LS112	Signetics	Dual J-K Edge-Triggered Flip-Flop	Scan	PDF
74LS112	Signetics	Dual J-K Edge Triggered Flip-Flop	Scan	PDF
74LS112	Signetics	Integrated Circuits Catalogue 1978/79	Scan	PDF
74LS112C	Unknown	TTL Data Book 1980	Scan	PDF
74LS112DC	Fairchild Semiconductor	Dual JK Negative Edge Triggered Flip-Flop	Scan	PDF
74LS112FC	Fairchild Semiconductor	Dual JK Negative Edge Triggered Flip-Flop	Scan	PDF
74LS112M	Unknown	TTL Data Book 1980	Scan	PDF
74LS112PC	Fairchild Semiconductor	Dual JK Negative Edge Triggered Flip-Flop	Scan	PDF

74LS112 Datasheets Context Search

Catalog Datasheet	MFG & Type	PDF	Document Tags
74LS112A Abstract: 74LS112 SN54/74LS112A truth table NOT gate 74 SN54LSXXXJ SN74LSXXXD SN74LSXXXN JD16 Text: SN54/74LS112A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS112A dual JK flip-flop features individual J, K, clock, and asynchronous set and clear inputs to each flip-flop. When the clock goes HIGH, the inputs are enabled and data will be accepted. The logic level of the	Original	PDF	SN54/74LS112A 74LS112A 74LS112 SN54/74LS112A truth table NOT gate 74 SN54LSXXXJ SN74LSXXXD SN74LSXXXN JD16
74ls112a Abstract: SN54/74LS112A SN54LSXXXJ SN74LSXXXD SN74LSXXXN Text: SN54/74LS112A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS112A dual JK flip-flop features individual J, K, clock, and asynchronous set and clear inputs to each flip-flop. When the clock goes HIGH, the inputs are enabled and data will be accepted. The logic level of the	Original	PDF	SN54/74LS112A 74LS112A SN54/74LS112A SN54LSXXXJ SN74LSXXXD SN74LSXXXN
74LS121 Abstract: ICM7216 7216A pin diagram of ic 74ls90 ICM7216a intersil 8 digit counter ICM7216A Rin 11c90 ICM7216B intersil frequency counter Text: ICM7216A, ICM7216B, ICM7216D 8-Digit, Multi-Function, Frequency Counters/Timers August 1997 Features All Versions Description • Functions as a Frequency Counter DC to 10MHz The ICM7216A and ICM7216B are fully integrated Timer Counters with LED display drivers. They combine a high	Original	PDF	ICM7216A, ICM7216B, ICM7216D 10MHz) ICM7216A ICM7216B 10MHz 74LS121 ICM7216 7216A pin diagram of ic 74ls90 ICM7216a intersil 8 digit counter Rin 11c90 intersil frequency counter
74ls121 Abstract: 7216B IC 74LS90 FEATURES ICM7216 Application note circuit diagram of moving LED counter display pin diagram of ic 74ls90 ICM7216B common anode digital display data sheet IC 74LS90 datasheet 74LS90 Text: ICM7216B, ICM7216D 8-Digit, Multi-Function, Frequency Counters/Timers May 2001 Features All Versions Description • Functions as a Frequency Counter DC to 10MHz The ICM7216B is a fully integrated Timer Counters with LED display drivers. They combine a high frequency oscillator, a	Original	PDF	ICM7216B, ICM7216D 10MHz) ICM7216B 10MHz 74ls121 7216B IC 74LS90 FEATURES ICM7216 Application note circuit diagram of moving LED counter display pin diagram of ic 74ls90 common anode digital display data sheet IC 74LS90 datasheet 74LS90
74ls112 pin configuration Abstract: 74ls112 function table 74LS112 74S112 Text: Signetics 74LS112, S112 Flip-Flops Dual J-K Edge-Triggered Flip-Flop Product Specification Logic Products DESCRIPTION The '112 is a dual J-K negative edgetriggered flip-flop featuring individual J, K, Clock, Set and Reset inputs. The Set So and Reset (R q) inputs, when LOW,	OCR Scan	PDF	74LS112, 1N916, 1N3064, 500ns 500ns 74ls112 pin configuration 74ls112 function table 74LS112 74S112
Untitled Abstract: No abstract text available Text: SN 54LS112A , S N 54S 112, SN 74LS112A , S N 74S 112A DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP FLOPS W ITH PRESET AND CLEAR D 2 6 6 1 . APRIL 1 9 8 2 - REVISED M A R C H 1 9 8 8 Fully Buffered to Offer Maximum Isolation from External Disturbance r a a SN 54LS 112A , SN 54S 112 . . . J OR W PACKAGE	OCR Scan	PDF	54LS112A 74LS112A
74ls112 pin diagram Abstract: 74HC112 Text: GD54/74HC112, GD54/74HCT112 DUAL J-K FLIP-FLOPS WITH PRESET & CLEAR General Description These devices are identical in pinout to the 54/74LS112. They consist of two J-K flip-flops with individual J, K, CLOCK, PRESET, and CLEAR in puts. These flip-flops are edge sensitive to the clock	OCR Scan	PDF	GD54/74HC112, GD54/74HCT112 54/74LS112. 74ls112 pin diagram 74HC112
74ls112 pin diagram Abstract: 74LS112 74ls112 pin configuration 74ls112 function table 74ls112 waveform 74LS 74S112 N74LS112D N74LS112N N74S112D Text: 74LS112, S112 S ig n e tic s Flip-Flops Dual J-K Edge-Triggered Flip-Flop Product Specification Lo gic P roducts DESCRIPTION The '112 is a dual J-K negative edgetriggered flip-flop featuring individual J, K, Clock, Set and Reset inputs. The Set 3d and Reset (Rq) inputs, when LOW,	OCR Scan	PDF	74LS112, 1N916, 1N3064, 500ns 74ls112 pin diagram 74LS112 74ls112 pin configuration 74ls112 function table 74ls112 waveform 74LS 74S112 N74LS112D N74LS112N N74S112D
Untitled Abstract: No abstract text available Text: MITSUBISHI LSTTLs M 74LS112AP DUAL J-K N EG A TIVE EDGE-TRIGGERED F L IP FLOPS W IT H SET AND RESET DESCRIPTION The M 7 4L S 11 2A P is a semiconductor integrated circuit containing 2 J-K negative edge-triggered flip -flo p circuits w ith discrete terminals fo r clock input T , J and K inputs	OCR Scan	PDF	74LS112AP b2LHfl27 0013Sbl
Untitled Abstract: No abstract text available Text: GD54/74LS112 DUAL J-K NEGATIVE EDGE-TRIGGERED FLIP FLOPS WITH SET AND RESET Features Pin C o n fig u ra tio n • Negative edge-triggering • Diode clamped inputs • Independent input/output terminals for each flip-flop. • Direct set and reset inputs • Q and Q outputs	OCR Scan	PDF	GD54/74LS112
Untitled Abstract: No abstract text available Text: 112 CONNECTION DIAGRAM P IN O U T A 54S/74S112 t1" 00 \/&4LS/74LS112 b DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP DESCRIPTION — The '112 features individual J, K, C lo ck and asynchronous Set and C lear inputs to each flip-flop. When the clo ck goes HIGH, the inputs	OCR Scan	PDF	54S/74S112 4LS/74LS112 54/74LS 54/74S
74LS112A Abstract: No abstract text available Text: M MOTOROLA SN54/74LS112A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The S N 54/74LS112A dual JK flip-flop features individual J, K, clock, and asynchronous set and clear inputs to each flip-flop. When the clock goes HIGH, the inputs are enabled and data will be accepted. The logic level of the	OCR Scan	PDF	SN54/74LS112A 54/74LS112A 74LS112A
74ls112 pin diagram Abstract: 74ls112 pin configuration 74ls112 function table 74LS112 74S112 74ls112 waveform N74LS112N 1N916 74LS N74LS112D Text: Signetics 74LS112, S112 Flip-Flops Dual J-K Edge-Triggered Flip-Flop Product Specification Logic Products DESCRIPTION TYPE T h e '1 1 2 is a d u a l J - K n e g a tiv e e d g e - TY P IC A L f HAX trig g e r e d f lip - f lo p fe a tu r in g in d iv id u a l J,	OCR Scan	PDF	74LS112, 1N916, 1N3064, 500ns 74ls112 pin diagram 74ls112 pin configuration 74ls112 function table 74LS112 74S112 74ls112 waveform N74LS112N 1N916 74LS N74LS112D
Untitled Abstract: No abstract text available Text: LS TTL DN74LS Series D N 7 4 LS1 1 2 74LS112 i0 7 ^ IS ¡ ¡ ^ Dual J-K Negative Edge-Triggered Flip-Flops with Set and Reset H Description P -2 DN 74LS112 contains two negative-edge triggered J-K flipflop circuits, each w ith independent clock-CP, J, K, and	OCR Scan	PDF	DN74LS DN74LS112 74LS112

74LSOO Abstract: PRESET 1M 1S2074 HD74LS112 Text: H D 74LS112. Dual J-K Negative-edge-triggered Flip-Flops with Preset and Clear •BLOCK D IA G R A M (^) « P IN ARRANGEMENT ■RECOMMENDED OPERATING CONDITIONS Sym bol Item f 'l t 'k C lo c k fre q u e n c y C lo c k H igh min ty p m ax U n it - 30 M Hz	OCR Scan	PDF	HD74LS112. QQ14CI14 DG-14 06max 20-IU8 OG-16 DG-24 74LSOO PRESET 1M 1S2074 HD74LS112
74LS112P Abstract: 74LS112D 74ls112 pin diagram 74LS112PC 74LS112 74s112p 74LS112DC 54S112DM 74LS112F 74S112 Text: 112 C O N N E C T IO N D IA G R A M P IN O U T A /54S/74S112 ö ^ \yt4LS/74LS112 b / / c o t , cpi DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP IN PU TS O U TPU T @ tn @ tn + 1 J K Q L L H H L H L H L H Co Q Ü J c d , So Q T « ]c d 2 £ S d ì [4 tT\| cp 2 Qi T	OCR Scan	PDF	/54S/74S112 \/54LS/74LS112 54/74LS 54/74S S4/74LS 74LS112P 74LS112D 74ls112 pin diagram 74LS112PC 74LS112 74s112p 74LS112DC 54S112DM 74LS112F 74S112
M74LS112AP Abstract: JK flip flop IC flip flop T Toggle flip flop IC T flip flop IC toggle type flip flop ic M74LS76AP 20-PIN 2V75V Text: M IT S U B IS H I LSTTLs M 74LS112AP DUAL J-K NEGATIVE EDGE-TRIGGERED FLIP FLOPS W ITH SET AND RESET DESCRIPTION The M 7 4L S 11 2A P is a semiconductor integrated circuit containing 2 J-K negative edge-triggered flip -flo p circuits w ith discrete terminals fo r clock input T , J and K inputs	OCR Scan	PDF	M74LS112AP M74LS112AP 16-PIN 20-PIN JK flip flop IC flip flop T Toggle flip flop IC T flip flop IC toggle type flip flop ic M74LS76AP 2V75V
74LS112A Abstract: No abstract text available Text: M JW 0 T 0 f3 0 1 .X SN54/74LS112A D E S C R I P T I O N — The S N 5 4 L S /7 4 L S 1 1 2 A d u a l J K flip-flop features individual J, K, clock, and asynchronous set and clear inputs to each flip-flop. W h en the c lock goes HIGH, the inputs are enabled and data	OCR Scan	PDF	SN54/74LS112A 74LS112A
74LS412 Abstract: 74LS41 74ls112n 74LS112D 74ls112 pin configuration 74LS112 Text: 74LS112, S112 Signetics Flip-Flops Dual J-K Edge-Triggered Flip-Flop Product Specification Logic Products DESCRIPTION The '112 is a dual J-K negative edgetriggered flip-flop featuring individual J, K, Clock, Set and Reset inputs. The Set So and Reset (R q) inputs, when LOW,	OCR Scan	PDF	74LS112, 500ns 500ns 74LS412 74LS41 74ls112n 74LS112D 74ls112 pin configuration 74LS112
74ls112 function table Abstract: No abstract text available Text: TOSHIBA TC74HC112AP/AF/AFN TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HC112AP, TC74HC112AF, TC74HC112AFN Note The JEDEC SOP (FN) is not available in DUAL J - K FLIP-FLOP WITH PRESET AND CLEAR Japan The TC74HC112A is a high speed CMOS DUAL J - K FLIP	OCR Scan	PDF	TC74HC112AP/AF/AFN TC74HC112AP, TC74HC112AF, TC74HC112AFN TC74HC112A 16PIN DIP16-P-300-2 16PIN 200mil 74ls112 function table
74LS112 Abstract: TC74HC112AF TC74HC112AFN TC74HC112AP 74ls112 function table Text: TC74HC112AP/AF/AFN TOSHIBA TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC T C 74H C 112A P , T C 74H C 112A F , T C 74H C 112A F N DUAL J - K FLIP-FLO P WITH PRESET AND CLEAR Note The JEDEC SOP (FN) is not available in Japan The TC74HC112A is a high speed CMOS DUAL J -K FLIP	OCR Scan	PDF	TC74HC112AP/AF/AFN TC74HC112AP, TC74HC112AF, TC74HC112AFN TC74HC112A 16PIN DIP16-P-300-2 75MAX 735TYP 74LS112 TC74HC112AF TC74HC112AFN TC74HC112AP 74ls112 function table
Untitled Abstract: No abstract text available Text: 5QE D 44^503 G01341Q 5 HITACHI/ L0GIC/ARRAYS/MÉÎ1 0 H IT A C H I S e p t e m b e r , 1985 CMOS GATE ARRAYS i HD61 SERIES DESIGNER'S MANUAL AND PRODUCT SPECIFICATION HITACHI/ LOGIC/ARR'A YS/MEM SQE D • 4 4TLS03 0G13411 4 T -42-11-09 CMOS GATE ARRAYS HD61 SERIES	OCR Scan	PDF	G01341Q 4TLS03 0G13411 HD14070B 1407IB HD14556B HD14558B HD14560B HD14562B HD14072B
Untitled Abstract: No abstract text available Text: TC74HC112AP/AF/AFN DUAL J -K F L I P - F L O P W I T H PRESET A N D C L E A R The TC74HC112A is a high speed C M O S D U A L J - K F L IP FLO P fa b rica ted w ith silicon gate C 2 M O S technology. It achieves the high speed operation s im ila r to equivalent L S T T L w h ile m a in tain in g the C M O S low power	OCR Scan	PDF	TC74HC112AP/AF/AFN TC74HC112A TC74HC112AP/AF/AFN-3 TC74HC112AP/AF/AFN-4
Untitled Abstract: No abstract text available Text: TOSHIBA TC74HC112AP/AF/AFN TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HC112AP, TC74HC112AF, TC74HC112AFN Note The JEDEC SOP (FN) is not available in DUAL J - K FLIP-FLOP WITH PRESET AND CLEAR Japan The TC74HC112A is a high speed CMOS DUAL J - K FLIP	OCR Scan	PDF	TC74HC112AP/AF/AFN TC74HC112AP, TC74HC112AF, TC74HC112AFN TC74HC112A 16PIN DIP16-P-300-2 16PIN 200mil

Privacy Settings

74LS112 Search Results

74LS112 Result Highlights (5)

74LS112 Price and Stock

Texas Instruments SN74LS112ANSR

Texas Instruments SN74LS112AD

Texas Instruments SN74LS112AN

Rochester Electronics LLC 74LS112P-E

Rochester Electronics LLC SN74LS112AD

74LS112 Datasheets (14)

74LS112 Datasheets Context Search

74LS112A

74ls112a

74LS121

74ls121

74ls112 pin configuration

Untitled

74ls112 pin diagram

74ls112 pin diagram

Untitled

Untitled

Untitled

74LS112A

74ls112 pin diagram

Untitled

74LSOO

74LS112P

M74LS112AP

74LS112A

74LS412

74ls112 function table

74LS112

Untitled

Untitled

Untitled