CY7C611
Abstract: No abstract text available
Text: 7C611A CYPRESS SEMICONDUCTOR Features • SPARC processor optimized for em bedded control applications 32-Bit RISC Controller 136 32-bit registers — Eight overlapping windows o f 24 registers each — Dividing registers into seperate register banks allows fast context
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CY7C611A
40-ns
240-ns
32-bit
24-bit
7C611A
CY7C611
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cy7c611
Abstract: CY7C602A asi cypress CY7C157A CY7C611A 38R1
Text: 7C611A CYPRESS SEMICONDUCTOR Features • SPARC CD processor optimized for em bedded control applications • Reduced Instruction Set Computer RISC architecture — Simple format instructions — M ost instructions execute in a single cycle • Very high performance
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CY7C611A
32-Bit
40-ns
240-ns
24-bit
38-R-10003-A
CY7C611
CY7C602A
asi cypress
CY7C157A
38R1
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CY7C157A
Abstract: No abstract text available
Text: 7C611A CYPRESS SEMICONDUCTOR Features • SPARC processor optimized for em bedded control applications 32-Bit RISC Controller — Privileged instructions • 136 32-bit registers — Eight overlapping windows o f 24 registers each • Artificial intelligence support
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OCR Scan
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PDF
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CY7C611A
40-ns
240-ns
32-bit
24-bit
7C611A
CY7C61
CY7C157A
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