Untitled
Abstract: No abstract text available
Text: Traffic Manager Data Sheet 89TTM552 Preliminary Information* Description The 89TTM55x Traffic Manager chipset consists of a 89TTM552 aggregate-flow device and a 89TTM553 per-flow device. The 89TTM55x Traffic Manager manages bandwidth resources by shaping traffic to
|
Original
|
89TTM552
89TTM55x
89TTM553
89TTM55x
89TTM552,
1192-pin
89TTM552BL
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Traffic Manager Co-processor Data Sheet Description The 89TTM553 is a flow-based traffic management co-processor that can be used in conjunction with the 89TTM552. It has two major functional parts: the queue manager QM and the FLQ scheduler. The QM is responsible for all the non-bandwidth functions, which include managing up to 1 Million queuing structures,
|
Original
|
89TTM553
89TTM552.
89TTM553BL
960-pin
|
PDF
|
Flip-chip 1.8V SRAM
Abstract: 89TTM553 ZTM200
Text: Traffic Manager Co-processor Data Sheet Description 89TTM553 Preliminary Information* 89TTM55x Features Features The 89TTM553 is a flow-based traffic management co-processor that can be used in conjunction with the 89TTM552. It has two major functional parts: the queue manager QM and the
|
Original
|
89TTM553
89TTM55x
89TTM553
89TTM552.
89TTM553BL
960-pin
Flip-chip 1.8V SRAM
ZTM200
|
PDF
|
bap21
Abstract: 89TTM553 ZTM200 BAT23 BAU21
Text: Traffic Manager Data Sheet 89TTM552 Preliminary Information* Description The 89TTM55x Traffic Manager chipset consists of a 89TTM552 aggregate-flow device and a 89TTM553 per-flow device. The 89TTM55x Traffic Manager manages bandwidth resources by shaping traffic to
|
Original
|
89TTM552
89TTM55x
89TTM553
89TTM55x
89TTM552,
89TTM552
bap21
ZTM200
BAT23
BAU21
|
PDF
|
ZTM200
Abstract: 89TTM553
Text: Traffic Manager Co-processor Data Sheet Description The 89TTM553 is a flow-based traffic management co-processor that can be used in conjunction with the 89TTM552. It has two major functional parts: the queue manager QM and the FLQ scheduler. The QM is responsible for all the non-bandwidth functions, which include managing up to 1 Million queuing structures,
|
Original
|
89TTM553
89TTM552.
provid60-pin
89TTM553BL
960-pin
ZTM200
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Traffic Manager Co-processor Data Sheet Description The 89TTM553 is a flow-based traffic management co-processor that can be used in conjunction with the 89TTM552. It has two major functional parts: the queue manager QM and the FLQ scheduler. The QM is responsible for all the non-bandwidth functions, which include managing up to 1 Million queuing structures,
|
Original
|
89TTM553
89TTM552.
960-pin
89TTM553BL
|
PDF
|
vco 17.500mhz
Abstract: No abstract text available
Text: Traffic Manager Data Sheet 89TTM552 Preliminary Information* Description The 89TTM55x Traffic Manager chipset consists of a 89TTM552 aggregate-flow device and a 89TTM553 per-flow device. The 89TTM55x Traffic Manager manages bandwidth resources by shaping traffic to
|
Original
|
89TTM552
89TTM55x
89TTM552
89TTM553
89TTM552,
vco 17.500mhz
|
PDF
|
A31 cpcs
Abstract: cpcs c18
Text: Traffic Manager Co-processor Data Sheet Description 89TTM553 Preliminary Information* 89TTM55x Features The 89TTM553 is a flow-based traffic management co-processor that can be used in conjunction with the 89TTM552. It has two major functional parts: the queue manager QM and the
|
Original
|
89TTM553
89TTM553
89TTM552.
960-pin
89TTM553BL
A31 cpcs
cpcs c18
|
PDF
|
Untitled
Abstract: No abstract text available
Text: 89TTM552 Traffic Manager Data Sheet Preliminary Information* Description The 89TTM55x Traffic Manager chipset consists of a 89TTM552 aggregate-flow device and a 89TTM553 per-flow device. The 89TTM55x Traffic Manager manages bandwidth resources by shaping traffic to
|
Original
|
89TTM552
89TTM55x
89TTM553
89TTM55x
89TTM552,
1192-pin
89TTM552BL
|
PDF
|
VAA33
Abstract: AA36 ZSF200
Text: Switch Fabric Data Sheet 89TSF552 Preliminary Information* Description is configurable up to OC-192. Always non-blocking architecture across destination, traffic type cell, packet , and class of service (CoS). ◆ Supports up to 4 egress subports per switch port.
|
Original
|
89TSF552
OC-192.
89TSF
1517-pin
89TSF552BL
VAA33
AA36
ZSF200
|
PDF
|
Untitled
Abstract: No abstract text available
Text: 89TSF552 Switch Fabric Data Sheet Preliminary Information* Description is configurable up to OC-192. Always non-blocking architecture across destination, traffic type cell, packet , and class of service (CoS). ◆ Supports up to 4 egress subports per switch port.
|
Original
|
89TSF552
OC-192.
89TSF
1517-pin
89TSF552BL
|
PDF
|
VAA33
Abstract: cos v21 l10 aw26
Text: Switch Fabric Data Sheet 89TSF552 Preliminary Information* Description is configurable up to OC-192. Always non-blocking architecture across destination, traffic type cell, packet , and class of service (CoS). ◆ Supports up to 4 egress subports per switch port.
|
Original
|
89TSF552
89TSF5xx
89TSF500
89TSF552
89TSF500
1517-pin
VAA33
cos v21 l10
aw26
|
PDF
|
ICS58
Abstract: analog delay line SAW ICS2008B saw filter 953 T51XXX OC192 V103 V104 V385 V386
Text: Timing Solutions continued Categor y Part Number Output Freq. MHz X / ÷ Options Vcc (V) Temp. Description Differentiators Programmable Clock Generators ICS2xx, ICS3xx, IDT5V98xx 49 kHz to 550 12-bit multiplier, 8-bit prescaler, 10-bit post divider 3.3
|
Original
|
IDT5V98xx
12-bit
10-bit
SF003,
SF004
SF007
SF0140
ICS58
analog delay line SAW
ICS2008B
saw filter 953
T51XXX
OC192
V103
V104
V385
V386
|
PDF
|
89TTM552BL
Abstract: 89TTM553BL
Text: Integrated Device Technology, Inc. 6024 Silver Creek Valley Road, San Jose, CA 95138 Phone #: 408 284-8200 PRODUCT DISCONTINUANCE NOTICE (PDN) PDN #: Issue Date: Contact: Title: Phone #: Fax #: E-mail: I-10-01 8-Jan-2010 Last Buy Deadline for Submission of Order:
|
Original
|
I-10-01
8-Jan-2010
18-Jun-2010
31-Dec-2010
89TTM552BL
89TTM553BL
FRA-2265-01
QCA-1795
89TTM552BL
89TTM553BL
|
PDF
|