8B/10B-SERIALIZER CODING EXAMPLE Search Results

8B/10B-SERIALIZER CODING EXAMPLE Result Highlights (5)

Part	Manufacturer	Description	Download
TC4511BP	Toshiba Electronic Devices & Storage Corporation	CMOS Logic IC, BCD-to-7-Segment Decoder, DIP16
CS-SAS2MUKPTR-000.5	Amphenol Cables on Demand	Amphenol CS-SAS2MUKPTR-000.5 External Mini-SAS Cable (Pull-Tab) - 4x Mini-SAS (SFF-8088) to 4x Mini-SAS (SFF-8088) 0.5m	Datasheet
CS-SAS2MUKPTR-002	Amphenol Cables on Demand	Amphenol CS-SAS2MUKPTR-002 External Mini-SAS Cable (Pull-Tab) - 4x Mini-SAS (SFF-8088) to 4x Mini-SAS (SFF-8088) 2m	Datasheet
CS-SAS2MUKPTR-006	Amphenol Cables on Demand	Amphenol CS-SAS2MUKPTR-006 External Mini-SAS Cable (Pull-Tab) - 4x Mini-SAS (SFF-8088) to 4x Mini-SAS (SFF-8088) 6m	Datasheet
CS-SASMINTOHD-002	Amphenol Cables on Demand	Amphenol CS-SASMINTOHD-002 2m (6.6') External 4x Mini-SAS to HD Mini-SAS Cable - 4x Mini-SAS HD (SFF-8644) to 4x Mini-SAS 26-pin (SFF-8088) Passive Copper Cable [28 AWG] - 6G SAS 2.1 / iPass+™ HD	Datasheet

8B/10B-SERIALIZER CODING EXAMPLE Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
8b/10b-Serializer Coding Example Abstract: IBM serdes ds92lv18 optical link DS92LV18 8b/10b-Serializer serdes 8b 10b Text: DesignCon 2004 SerDes Architectures and Applications Dave Lewis, National Semiconductor Corporation Abstract When most system designers look at serializer/deserializer SerDes devices, they often compare speed and power without considering how the SerDes works and what it	Original	8B/10B 8b/10b-Serializer Coding Example IBM serdes ds92lv18 optical link DS92LV18 8b/10b-Serializer serdes 8b 10b	PDF
8b/10b align Abstract: SGX52001-1 prbs pattern generator Text: 1. Introduction SGX52001-1.2 Introduction Stratix GX devices combine highly advanced 3.1875-gigabit-per-second Gbps four-channel gigabit transceiver blocks with one of the industry’s most advanced FPGA architectures. Stratix GX devices are manufactured	Original	SGX52001-1 1875-gigabit-per-second 8b/10b align prbs pattern generator	PDF
PM8351 Abstract: No abstract text available Text: PMC-Sierra,Inc. PM8351 OctalPHY 8-Channel 1.0-1.25 Gbps Transceiver FEATURES APPLICATIONS EXAMPLE ARCHITECTURE • Eight independent 1.0-1.25 Gbit/s transceivers • Ultra low power operation: 1.25 Watts typical • Integrated serializer/deserializer, clock	Original	PM8351 8B/10B	PDF
PM8351 Abstract: data layer serial to 802.3 serial link clock signal Text: PMC-Sierra,Inc. Preliminary PM8351 OctalPHY 8-Channel 1.0-1.25 Gbps Transceiver FEATURES APPLICATIONS EXAMPLE ARCHITECTURE • Eight independent 1.0-1.25 Gbps transceivers • Ultra low power operation: 1.25 Watts typical • Integrated serializer/deserializer, clock	Original	PM8351 8B/10B data layer serial to 802.3 serial link clock signal	PDF
serdes transceiver 1999 Abstract: PM8352 MDIO controller Text: OctalPHY 1G Product Overview Preliminary PM8352 OctalPHY® 1G 8 Channel Physical Layer Transceiver with Gigabit Ethernet PCS and Trunking for 1.0 TO 1.25 Gbit/s Interfaces Product Overview Preliminary Issue No. 1: July 2002 Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.	Original	PM8352 PMC-2021156, serdes transceiver 1999 PM8352 MDIO controller	PDF
aanetcom Abstract: pm8353 Text: PMC-Sierra,Inc. Preliminary PM8353 QuadPHY 4-Channel 1.0-1.25 Gbps Transceiver FEATURES • Four independent 1.0-1.25 Gbps transceivers • Ultra low power operation: 1.25 Watt typical • Integrated serializer/deserializer, clock synthesis, clock recovery, and 8B/10B	Original	PM8353 8B/10B 10-bit, PMC-2000673 aanetcom	PDF
pm8353 Abstract: serial link clock signal Text: PMC-Sierra,Inc. PM8353 QuadPHY 4-Channel 1.0-1.25 Gbps Transceiver FEATURES • Four independent 1.0-1.25 Gbit/s transceivers • Four secondary channels to support channel redundancy • Ultra low power operation: 1.25 Watt typical • Integrated serializer/deserializer, clock	Original	PM8353 8B/10B 10-bit, serial link clock signal	PDF
21Z01 Abstract: 21Z03 Text: 21Z03 QuadPHYTM 4 Channel 1.0625/1.25 Gbps SerDes Product Brief FEATURES APPLICATIONS • Four independent 1.0625/1.25 Gbit/s transceivers • High speed serial backplanes • Ultra low power operation: less than 1 Watt typical • Gigabit Ethernet links •	Original	21Z03 8B/10B 21Z01 21Z00 21Z01 21Z03	PDF
8B10B Abstract: LFX1200B-03FE680C RD1012 8B10B ansi encoder KXY 23 lc4128v-5t100c K2371 Text: 8b/10b Encoder/Decoder November 2002 Reference Design RD1012 Introduction Many serial data transmission standards utilize 8b/10b encoding to ensure sufficient data transitions for clock recovery. This reference design describes an encoder/decoder suitable for performing 8b/10b encoding/decoding	Original	8b/10b RD1012 LC4128V-5T100C 5000MX LC5512MV-5Q208C LFX1200B-03FE680C OR4E02-3BA352 8B10B LFX1200B-03FE680C RD1012 8B10B ansi encoder KXY 23 lc4128v-5t100c K2371	PDF
obsai Abstract: Serdes IEEE standard 424M 802.3-2005 Text: High-Speed SERDES Interfaces In High Value FPGAs A Lattice Semiconductor White Paper February 2009 Lattice Semiconductor 5555 Northeast Moore Ct. Hillsboro, Oregon 97124 USA Telephone: 503 268-8000 www.latticesemi.com 1 High-Speed SERDES Interfaces in High Value FPGAs	Original		PDF
lattice machxo lcmxo1200c Abstract: 8B10B LC51024MB-52F484C LCMXO1200C-3T100C LFECP6E-5T144C LFXP2-5E-5M132C RD1012 K2801 set-3b k2371 Text: 8b/10b Encoder/Decoder June 2010 Reference Design RD1012 Introduction Many serial data transmission standards utilize 8b/10b encoding to ensure sufficient data transitions for clock recovery. This reference design describes an encoder/decoder suitable for performing 8b/10b encoding/decoding	Original	8b/10b RD1012 LC4256B-3T100C LC51024MB-52F484C 1-800-LATTICE lattice machxo lcmxo1200c 8B10B LCMXO1200C-3T100C LFECP6E-5T144C LFXP2-5E-5M132C RD1012 K2801 set-3b k2371	PDF
21Z01 Abstract: No abstract text available Text: 21Z01 OctalPHY 8 Channel 1.0625/1.25 Gbps Serdes IC Product Brief FEATURES APPLICATIONS w Eight independent 1.0625/1.25 Gbit/s transceivers w High speed serial backplanes w Ultra low power operation: 1.25 Watts typical w Gigabit Ethernet links w Integrated serializer/deserializer, clock synthesis, clock	Original	21Z01 8B/10B 21Z01	PDF
xaui xgmii ip core altera Abstract: vhdl code for clock and data recovery P802 verilog code for 100 mbps ethernet synchronizer megafunction vhdl code for phy interface vhdl code for mac transmitter Text: Implementing 10 Gigabit Ethernet XAUI in Stratix GX Devices November 2002, ver. 1.0 Introduction Application Note 249 A main system bottleneck in high-speed communications equipment is data transmission from chip-to-chip and over backplanes. StratixTM GX devices help remedy the problem by supporting 3.125-gigabit per second	Original	125-gigabit 10-Gbps xaui xgmii ip core altera vhdl code for clock and data recovery P802 verilog code for 100 mbps ethernet synchronizer megafunction vhdl code for phy interface vhdl code for mac transmitter	PDF
custom transmitter diode Abstract: 64b/66b encoder 8b/10b scrambler gearbox CRC32 Text: 5. Custom Transceiver Configuration Datapath in Stratix V Devices SV52006-1.0 This chapter describes the custom transceiver configuration datapath in Stratix V devices for the 10G and standard physical coding sublayer PCS blocks. Table 5–1 lists the Altera® Transceiver PHY IP used, depending on the desired	Original	SV52006-1 10-Bit 20-Bit custom transmitter diode 64b/66b encoder 8b/10b scrambler gearbox CRC32	PDF

Untitled Abstract: No abstract text available Text: TLK2541 www.ti.com. SLLS779A – JANUARY 2008 – REVISED APRIL 2008 1 TO 2.6 GBPS TRANSCEIVER FEATURES 1 • 1 to 2.6 Gigabits Per Second Gbps	Original	TLK2541 SLLS779A 80-Pin 8-bit/10-bit	PDF
Untitled Abstract: No abstract text available Text: TLK2541 SLLS779B – JANUARY 2008 – REVISED APRIL 2008 www.ti.com 1 TO 2.6 GBPS TRANSCEIVER Check for Samples: TLK2541 FEATURES 1 • 2 • • • • • • • • • 1 to 2.6 Gigabits Per Second Gbps Serializer/Deserializer Independent Transmit/Receive Channels for	Original	TLK2541 SLLS779B 80-Pin 8-bit/10-bit	PDF
TK3723 Abstract: wizardlink epon TLK2541 Text: TLK2541 www.ti.com. SLLS779B – JANUARY 2008 – REVISED APRIL 2008 1 TO 2.6 GBPS TRANSCEIVER FEATURES 1 • 1 to 2.6 Gigabits Per Second Gbps	Original	TLK2541 SLLS779B 80-Pin 8-bit/10-bit TK3723 wizardlink epon TLK2541	PDF
Untitled Abstract: No abstract text available Text: TLK2541 SLLS779B – JANUARY 2008 – REVISED APRIL 2008 www.ti.com 1 TO 2.6 GBPS TRANSCEIVER Check for Samples: TLK2541 FEATURES 1 • 2 • • • • • • • • • 1 to 2.6 Gigabits Per Second Gbps Serializer/Deserializer Independent Transmit/Receive Channels for	Original	TLK2541 SLLS779B 80-Pin 8-bit/10-bit	PDF
B17C Abstract: 8b/10b align AGX52001-1 Text: 1. Arria GX Transceiver Architecture AGX52001-1.2 Introduction The Arria GX is a protocol-optimized FPGA family that leverages Altera ’s advanced multi-gigabit transceivers. The Arria GX transceiver blocks build on the success of the Stratix® II GX family and are optimally	Original	AGX52001-1 B17C 8b/10b align	PDF
TK3723 Abstract: Teknovus TLK2541 serdes wireless Text: TLK2541 SLLS779B – JANUARY 2008 – REVISED APRIL 2008 www.ti.com 1 TO 2.6 GBPS TRANSCEIVER Check for Samples: TLK2541 FEATURES 1 • 2 • • • • • • • • • 1 to 2.6 Gigabits Per Second Gbps Serializer/Deserializer Independent Transmit/Receive Channels for	Original	TLK2541 SLLS779B 80-Pin 8-bit/10-bit TK3723 Teknovus TLK2541 serdes wireless	PDF
TK3723 Abstract: wizardlink TLK2541 Text: TLK2541 www.ti.com. SLLS779B – JANUARY 2008 – REVISED APRIL 2008 1 TO 2.6 GBPS TRANSCEIVER FEATURES 1 • 1 to 2.6 Gigabits Per Second Gbps	Original	TLK2541 SLLS779B 80-Pin 8-bit/10-bit TK3723 wizardlink TLK2541	PDF
TK3723 Abstract: TLK2541 Text: TLK2541 www.ti.com. SLLS779A – JANUARY 2008 – REVISED APRIL 2008 1 TO 2.6 GBPS TRANSCEIVER FEATURES 1 • 1 to 2.6 Gigabits Per Second Gbps	Original	TLK2541 SLLS779A 80-Pin 8-bit/10-bit TK3723 TLK2541	PDF
TK3723 Abstract: No abstract text available Text: TLK2541 www.ti.com. SLLS779B – JANUARY 2008 – REVISED APRIL 2008 1 TO 2.6 GBPS TRANSCEIVER FEATURES 1 • 1 to 2.6 Gigabits Per Second Gbps	Original	TLK2541 SLLS779B 80-Pin 8-bit/10-bit TK3723	PDF
Untitled Abstract: No abstract text available Text: TLK2541 SLLS779B – JANUARY 2008 – REVISED APRIL 2008 www.ti.com 1 TO 2.6 GBPS TRANSCEIVER Check for Samples: TLK2541 FEATURES 1 • 2 • • • • • • • • • 1 to 2.6 Gigabits Per Second Gbps Serializer/Deserializer Independent Transmit/Receive Channels for	Original	TLK2541 SLLS779B 80-Pin 8-bit/10-bit	PDF

8B/10B-SERIALIZER CODING EXAMPLE Search Results

8B/10B-SERIALIZER CODING EXAMPLE Result Highlights (5)

8B/10B-SERIALIZER CODING EXAMPLE Datasheets Context Search

8b/10b-Serializer Coding Example

8b/10b align

PM8351

PM8351

serdes transceiver 1999

aanetcom

pm8353

21Z01

8B10B

obsai

lattice machxo lcmxo1200c

21Z01

xaui xgmii ip core altera

custom transmitter diode

Untitled

Untitled

TK3723

Untitled

B17C

TK3723

TK3723

TK3723

TK3723

Untitled