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    Cypress Semiconductor CY7C1415KV18-250BZXC

    NO WARRANTY
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    DigiKey CY7C1415KV18-250BZXC Tray 1,649 1
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    Cypress Semiconductor CY7C1414KV18-250BZXC

    NO WARRANTY
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    Cypress Semiconductor CY7C1420KV18-333BZI

    NO WARRANTY
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    DigiKey CY7C1420KV18-333BZI Tray 420 1
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    Infineon Technologies AG CY7C1441KV33-133AXI

    IC SRAM 36MBIT PARALLEL 100TQFP
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    Mouser Electronics CY7C1441KV33-133AXI 253
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    EBV Elektronik CY7C1441KV33-133AXI 12 Weeks 144
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    Cypress Semiconductor CY7C1420KV18-300BZXC

    NO WARRANTY
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    DigiKey CY7C1420KV18-300BZXC Tray 160 1
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    CY7C14 Datasheets (500)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    CY7C140 Cypress Semiconductor 1K x 8 Dual-Port Static RAM Original PDF
    CY7C140 Cypress Semiconductor 1K x 8 Dual-Port Static Ram Original PDF
    CY7C140-25DC Cypress Semiconductor Multiple Array MatriX High-Density EPLDs Scan PDF
    CY7C140-25LC Cypress Semiconductor Multiple Array MatriX High-Density EPLDs Scan PDF
    CY7C140-25LC Cypress Semiconductor 1024 x 8 Dual-Port Static RAM Scan PDF
    CY7C140-25PC Cypress Semiconductor Multiple Array MatriX High-Density EPLDs Scan PDF
    CY7C140-30DC Cypress Semiconductor 1024 x 8 Dual-Port Static RAM Scan PDF
    CY7C140-30DI Cypress Semiconductor 1024 x 8 Dual-Port Static RAM Scan PDF
    CY7C140-30LC Cypress Semiconductor 1024 x 8 Dual-Port Static RAM Scan PDF
    CY7C140-30PC Cypress Semiconductor 1K x 8 Dual-Port Static RAM Original PDF
    CY7C140-30PC Cypress Semiconductor 1K x 8 Dual-Port Static Ram Original PDF
    CY7C140-30PC Cypress Semiconductor 1K x 8 Dual-Port Static RAM Scan PDF
    CY7C140-30PC Cypress Semiconductor 1024 x 8 Dual-Port Static RAM Scan PDF
    CY7C140-30PI Cypress Semiconductor 1K x 8 Dual-Port Static RAM Original PDF
    CY7C140-30PI Cypress Semiconductor 1K x 8 Dual-Port Static Ram Original PDF
    CY7C140-30PI Cypress Semiconductor 1K x 8 Dual-Port Static RAM Scan PDF
    CY7C140-30PI Cypress Semiconductor 1024 x 8 Dual-Port Static RAM Scan PDF
    CY7C140-35DC Cypress Semiconductor Multiple Array MatriX High-Density EPLDs Scan PDF
    CY7C140-35DC Cypress Semiconductor 1024 x 8 Dual-Port Static RAM Scan PDF
    CY7C140-35DI Cypress Semiconductor 1024 x 8 Dual-Port Static RAM Scan PDF
    ...

    CY7C14 Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    bzx 850

    Abstract: bzx 850 30
    Text: CY7C1412AV18 CY7C1414AV18 36 Mbit QDR II SRAM Two Word Burst Architecture Features Functional Description • Separate independent read and write data ports ❐ Supports concurrent transactions ■ 250 MHz clock for high bandwidth ■ 2-word burst on all accesses


    Original     		CY7C1412AV18 CY7C1414AV18 CY7C1412AV18, CY7C1414AV18 bzx 850 bzx 850 30 PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C1460AV25 CY7C1462AV25 36-Mbit 1 M x 36/2 M × 18 Pipelined SRAM with NoBL Architecture 36-Mbit (1 M × 36/2 M × 18) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™


    Original     		CY7C1460AV25 CY7C1462AV25 36-Mbit CY7C1460AV25/CY7C1462AV25 CY7C14s PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C1423KV18/CY7C1424KV18 36-Mbit DDR II SIO SRAM Two-Word Burst Architecture 36-Mbit DDR II SIO SRAM Two-Word Burst Architecture Features Configurations • 36-Mbit density 2 M x 18, 1 M × 36 CY7C1423KV18 – 2 M × 18 ■ 333 MHz clock for high bandwidth


    Original     		CY7C1423KV18/CY7C1424KV18 36-Mbit CY7C1423KV18 CY7C1424KV18 PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C146-55JC 1/3 IL08 * C-MOS 16K (2048 x 8)-BIT STATIC RAM R IN 47 A10 48 INT R OUT 49 BUSY R IN 50 R/W R IN R IN 51 CE V DD (+5V) 52 L IN 1 CE 2 R/W L IN L IN 5 A10 3 BUSY L IN L IN 6 OE 4 INT L OUT L IN 7 A0 - TOP VIEW - 46 OE A1 L IN 8 A2 L IN


    Original     		CY7C146-55JC PDF

    CY7C1470BV33

    Abstract: No abstract text available
    Text: CY7C1470BV33 CY7C1472BV33 CY7C1474BV33 72-Mbit 2 M x 36/4 M × 18/1 M × 72 Pipelined SRAM with NoBL Architecture 72-Mbit (2 M × 36/4 M × 18/1 M × 72) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™


    Original     		CY7C1470BV33 CY7C1472BV33 CY7C1474BV33 72-Mbit CY7C1470BV33, CY7C1472BV33, CY7C1474BV33 PDF

    C133-10

    Abstract: C1336 C133-14 CY7C133 CY7C143 IDT7133 IDT7143
    Text: CY7C133 CY7C143 2K x 16 Dual-Port Static RAM Features Functional Description • True dual-ported memory cells which allow simultaneous reads of the same memory location • 2K x 16 organization • 0.65-micron CMOS for optimum speed/power • High-speed access: 25/35/55 ns


    Original     		CY7C133 CY7C143 65-micron CY7C133 CY7C133; 68-pin IDT7133 IDT7143 C133-10 C1336 C133-14 CY7C143 IDT7133 IDT7143 PDF

    CY7C1461V25

    Abstract: CY7C1463V25 CY7C1465V25
    Text: CY7C1461V25 CY7C1463V25 CY7C1465V25 PRELIMINARY 1M x 36/2M x 18/512K x 72 Flow-Thru SRAM with NoBL Architecture Features • Zero Bus Latency, no dead cycles between Write and Read cycles •Supports 133-MHz bus operations •1M x 36/2M × 18/512K × 72 common I/O


    Original     		CY7C1461V25 CY7C1463V25 CY7C1465V25 36/2M 18/512K 133-MHz 36/2M 18/512K 150-MHz CY7C1461V25 CY7C1463V25 CY7C1465V25 PDF

    CY7C1444V33

    Abstract: CY7C1444V33-300AC CY7C1444V33-300BGC CY7C1444V33-300BZC CY7C1445V33 CY7C1445V33-300AC CY7C1445V33-300BGC
    Text: CY7C1445V33 CY7C1444V33 PRELIMINARY 1M x 36/2M x 18 Pipelined DCD SRAM Features • • • • • • • • • • • • • • • • Fast clock speed: 300, 250, 200, and 167 MHz Provide high-performance 3-1-1-1 access rate Fast access time: 2.3, 2.7, 3.0, and 3.5 ns


    Original     		CY7C1445V33 CY7C1444V33 36/2M CY7C1444V33/CY7C1445V33 CY7C1444V33 CY7C1444V33-300AC CY7C1444V33-300BGC CY7C1444V33-300BZC CY7C1445V33 CY7C1445V33-300AC CY7C1445V33-300BGC PDF

    CY7C132

    Abstract: CY7C136 CY7C146
    Text: CY7C132/CY7C136 CY7C142/CY7C146 2K x 8 Dual-Port Static RAM Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location The CY7C132/CY7C136/CY7C142 and CY7C146 are high-speed CMOS 2K by 8 dual-port static RAMs. Two ports


    Original     		CY7C132/CY7C136 CY7C142/CY7C146 CY7C132/CY7C136/CY7C142 CY7C146 CY7C132/ CY7C136 16-bit CY7C132 PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C1413JV18 CY7C1415JV18 36-Mbit QDR II SRAM 4-Word Burst Architecture Features Configurations • Separate independent read and write data ports ❐ Supports concurrent transactions CY7C1413JV18 – 2M x 18 ■ 300-MHz clock for high bandwidth ■ 4-word burst for reducing address bus frequency


    Original     		CY7C1413JV18 CY7C1415JV18 36-Mbit CY7C1413JV18 300-MHz PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C1444AV33 36-Mbit 1 M x 36 Pipelined DCD Sync SRAM 36-Mbit (1 M × 36) Pipelined DCD Sync SRAM Functional Description Features • Supports bus operation up to 167 MHz ■ Available speed grade is 167 MHz ■ Registered inputs and outputs for pipelined operation


    Original     		CY7C1444AV33 36-Mbit 167-MHz PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C1460AV33 CY7C1462AV33 36-Mbit 1 M x 36/2 M × 18 Pipelined SRAM with NoBL Architecture 36-Mbit (1 M × 36/2 M × 18) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT ■


    Original     		CY7C1460AV33 CY7C1462AV33 36-Mbit PDF

    ATPA

    Abstract: 7130SA100P 24l01 7C263/4-35C 7164S15Y cy9122-25 7133SA35J 7142sa55 7130sa55p cy2149-45c
    Text: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CY2147-35C CY7C147-35C CY7C147-45C CY7C147-35C CY91L22-35C CY7C122-35C CY2147-45C CY2147-35C CY7C148-35C CY7C148-25C+ CY91L22-45C CY93L422AC CY2147-45C CY7C147-45C CY7C148-45C CY7C148-35C


    Original     		CY2147-35C CY7C147-35C CY7C147-45C CY91L22-35C CY7C122-35C CY2147-45C CY7C148-35C CY7C148-25C+ ATPA 7130SA100P 24l01 7C263/4-35C 7164S15Y cy9122-25 7133SA35J 7142sa55 7130sa55p cy2149-45c PDF

    CY7C1411BV18

    Abstract: CY7C1413BV18 CY7C1415BV18 CY7C1426BV18
    Text: CY7C1411BV18, CY7C1426BV18 CY7C1413BV18, CY7C1415BV18 36-Mbit QDR -II SRAM 4-Word Burst Architecture Features Configurations • Separate independent read and write data ports ❐ Supports concurrent transactions ■ 300 MHz clock for high bandwidth ■


    Original     		CY7C1411BV18, CY7C1426BV18 CY7C1413BV18, CY7C1415BV18 36-Mbit CY7C1411BV18 CY7C1413BV18 CY7C1411BV18 CY7C1413BV18 CY7C1415BV18 CY7C1426BV18 PDF

    cy7c131-55nc

    Abstract: ZT12 CY7C130 CY7C131 CY7C140 CY7C141 IDT7130 IDT7140
    Text: CY7C130/CY7C131 CY7C140/CY7C141 W CYPRESS Features • 0.8-micron CMOS for optimum speed/power • Automatic power-down • TTL compatible • Capable o f withstanding greater than 2001V electrostatic discharge • Fully asynchronous operation • Master CY7C130/CY7C131 easily ex­


    OCR Scan     		CY7C130/CY7C131 CY7C140/CY7C141 CY7C140/ CY7C141 CY7C130/ CY7C131; IDT7130 IDT7140 cy7c131-55nc ZT12 CY7C130 CY7C131 CY7C140 CY7C141 IDT7140 PDF

    ebe switches

    Abstract: CY7C130 CY7C131 CY7C140 CY7C141 7CJ41-25 7CI40-35
    Text: CYPRESS SEMICONDUCTOR 00 0 3 4 2 1 EbE D 5 • CY7C130/CY7C131 CY7C140/CY7C141 -Z Z A Z . o y n p rrQ C 1024 x 8 Dual-Port Static RAM SEMICONDUCTOR Features Functional Description • 0,8-micron CMOS for optimum speed/power • Automatic power-down • TTL-compatible


    OCR Scan     		CY7C130/CY7C131 CY7C140/CY7C141 20O1V CY7C140/ CY7C141 CY7C130/ CY7C131; CY7C130/CY7C131/CY7C140/ ebe switches CY7C130 CY7C131 CY7C140 CY7C141 7CJ41-25 7CI40-35 PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C130/CY7C131 CY7C140/CY7C141 CYPRESS SEMICONDUCTOR Features Functional Description • 0.8-micron CMOS for optimum speed/power • Automatic power-down • TTL compatible • Capable of withstanding greater than 2001V electrostatic discharge • Fully asynchronous operation


    OCR Scan     		CY7C130/CY7C131 CY7C140/CY7C141 CY7C130/CY7C131 CY7C140/ CY7C141 CY7C130/ CY7C131; CY7C130/CY 7C131/CY7C140/ PDF

    Untitled

    Abstract: No abstract text available
    Text: fax id: 5200 CY7C130/CY7C131 CY7C140/CY7C141 W CYPRESS 1K x 8 Dual-Port Static Ram Features Functional Description True Dual-Ported memory cells which allow simulta­ neous reads of the same memory location 1K x 8 organization 0.65-micron CMOS for optimum speed/power


    OCR Scan     		130/C 140/C 65-micron CY7C130/CY7C131 CY7C140/CY7C141 CY7C130/CY7C131; 48-pin CY7C130/140) 52-pin PDF

    Untitled

    Abstract: No abstract text available
    Text: fax id: 5201 CY7C132/CY7C136 CY7C142/CY7C146 W CYPRESS 2Kx8 Dual-Port Static RAM Features Functional Description True Dual-Ported memory cells which allow sim ulta­ neous reads of the same mem ory location 2K x 8 organization 0.65-micron CMOS for optimum speed/power


    OCR Scan     		CY7C132/CY7C136 CY7C142/CY7C146 65-micron CY7C132/CY7C136 CY7C132/CY7C136; 52-pin 48-pin CY7C132/142) PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C132/CY7C136 CY7C142/CY7C146 CYPRESS SEMICONDUCTOR 2K x 8 Dual-Port Static RAM Features Functional Description • 0.8-raicron CMOS for optimum speed/power • BÜSŸ output flag on CY7C132/ CY7C136; BUSY input on CY7C142/CY7C146 The CY7C132/CY 7C136/CY7C142/


    OCR Scan     		CY7C132/CY7C136 CY7C142/CY7C146 CY7C132/ CY7C136; CY7C132/CY 7C136/CY7C142/ 7C146 7C136 PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C148 CY7C149 CYPRESS IK x 4 Static RAM Features • TTL-compatible inputs and outputs • Automatic power-down when dese­ lected 7C148 • CMOS for optimum speed/power • 25-ns access time • Low active power — 440 mW (commercial) — 605 mW (military)


    OCR Scan     		CY7C148 CY7C149 7C148) 25-ns CY7C148 CY7C149 7C148 PDF

    Untitled

    Abstract: No abstract text available
    Text: fax id: 5205 C Y 7 C 145 ”• ■ ■ ¿¡¡P: C Y 7 C 144 CYPRESS 8K x 8/9 Dual-Port Static RAM with Sem, Int, Busy Features True Dual-Ported memory cells which allow sim ultaneous reads of the same m em ory location 8K x 8 organization CY7C144 8K x 9 organization (CY7C145)


    OCR Scan     		CY7C144) CY7C145) 65-micron 68-pin 64-pin 80-pin PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C148 CY7C149 CYPRESS SEMICONDUCTOR 1024x4 Static RAM Functional Description • Automatic power-down when d ese­ lected 7C148 TheC Y 7C 148 a n d CY 7C149 arehigh-perform ance C M O S static R A M s organized as 1024 by 4 bits. Easy m em ory expansion


    OCR Scan     		CY7C148 CY7C149 1024x4 7C148) 7C149 7C148 25-ns tACSlI14' PDF

    AS15H

    Abstract: C1484 7C149
    Text: CY7C148 CY7C149 IK x 4 Static RAM Features • TTL-compatible inputs and outputs • Automatic power-down when dese­ lected 7C148 • CMOS for optimum speed/power • 25-ns access time • Low active power — 440 mW (commercial) — 605 mW (military) • Low standby power (7C148)


    OCR Scan     		CY7C148 CY7C149 7C148) 25-ns AS15H C1484 7C149 PDF