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    XC7VH580T-HCG1155-2

    Abstract: No abstract text available
    Text: v LogiCORE IP ChipScope Pro IBERT for 7 Series GTZ Transceivers v2.0 DS878 December 18, 2012 Product Specification Introduction LogiCORE IP Facts Table The customizable LogiCORE IP ChipScope™ Pro Integrated Bit Error Ratio Test (IBERT) core for 7 series


    Original     		DS878 XC7VH580T-HCG1155-2 PDF

    XC7VH580T-HCG1155-2

    Abstract: prbs pattern generator using vhdl verilog prbs generator ibert XC7VH580T ChipScope IBERT
    Text: v LogiCORE IP ChipScope Pro IBERT for 7 Series GTZ Transceivers v2.0 DS878 October 16, 2012 Product Specification Introduction LogiCORE IP Facts Table The customizable LogiCORE IP ChipScope™ Pro Integrated Bit Error Ratio Test (IBERT) core for 7 series


    Original     		DS878 XC7VH580T-HCG1155-2 prbs pattern generator using vhdl verilog prbs generator ibert XC7VH580T ChipScope IBERT PDF

    HI-8788PQT

    Abstract: HI-8787 HI-8787PQI HI-8787PQT HI-8788 HI-8788PQI
    Text: HI-8787, HI-8788 FEATURES 26 - V+ 25 - 561 DATA 28 - 561 SYNC 27 - VCC 30 - D1 HI-8787PQI HI-8787PQT HI-8788PQI & HI-8788PQT D5 - 3 D6 - 4 D7 - 5 D8 - 6 D9 - 7 23 - TXAOUT 22 - V21 - PARITY ENB 20 - XMT RDY 19 - XMIT CLK 18 - RESET D10 - 8 D15 - 15 SLP1.5 - 16


    Original     		HI-8787, HI-8788 HI-8787PQI HI-8787PQT HI-8788PQI HI-8788PQT 16-bit HI-8788 32PTQS HI-8788PQT HI-8787 HI-8787PQI HI-8787PQT HI-8788PQI PDF

    Untitled

    Abstract: No abstract text available
    Text: HI-8787, HI-8788 FEATURES 26 - V+ 25 - 561 DATA 28 - 561 SYNC 27 - VCC 30 - D1 HI-8787PQI HI-8787PQT HI-8788PQI & HI-8788PQT D5 - 3 D6 - 4 D7 - 5 D8 - 6 D9 - 7 23 - TXAOUT 22 - V21 - PARITY ENB 20 - XMT RDY 19 - XMIT CLK 18 - RESET D10 - 8 D15 - 15 SLP1.5 - 16


    Original     		HI-8787, HI-8788 HI-8787 HI-8788 16-bit 32PTQS) PDF

    max 8788

    Abstract: ARINC 561 HI-8787 HI-8787PQI HI-8787PQT HI-8788 HI-8788PQI HI-8788PQT 8788
    Text: HI-8787, HI-8788 FEATURES 26 - V+ 25 - 561 DATA 28 - 561 SYNC 27 - VCC 30 - D1 HI-8787PQI HI-8787PQT HI-8788PQI & HI-8788PQT D5 - 3 D6 - 4 D7 - 5 D8 - 6 D9 - 7 23 - TXAOUT 22 - V21 - PARITY ENB 20 - XMT RDY 19 - XMIT CLK 18 - RESET D10 - 8 D15 - 15 SLP1.5 - 16


    Original     		HI-8787, HI-8788 HI-8787PQI HI-8787PQT HI-8788PQI HI-8788PQT 16-bit HI-8788 32PTQS max 8788 ARINC 561 HI-8787 HI-8787PQI HI-8787PQT HI-8788PQI HI-8788PQT 8788 PDF

    TA 8783 N

    Abstract: TA 8783 LHi 878 LHi 878 application ARINC 561 D5716 LHI 878 datasheet HI-8382 HI-8783 HI-8784
    Text: HI-8783, HI-8784, HI-8785 February 2000 PIN CONFIGURATIONS DESCRIPTION The HI-8783, HI-8784, and HI-8785 are system components for interfacing 8 bit parallel data to an ARINC 429 bus. The HI-8783 is a logic device only and requires a separate line driver circuit, such as the HI-8382 or HI8585. The HI-8784 and HI-8785 combine logic and line


    Original     		HI-8783, HI-8784, HI-8785 HI-8785 HI-8783 HI-8382 HI8585. HI-8784 TA 8783 N TA 8783 LHi 878 LHi 878 application ARINC 561 D5716 LHI 878 datasheet PDF

    TA 8783

    Abstract: No abstract text available
    Text: HI-8783, HI-8784, HI-8785 February 2006 ARINC INTERFACE DEVICE 8 bit parallel data converted to 429 & 561 serial data out PIN CONFIGURATIONS DESCRIPTION The HI-8783, HI-8784, and HI-8785 are system components for interfacing 8 bit parallel data to an ARINC 429


    Original     		HI-8783, HI-8784, HI-8785 HI-8785 HI-8783 HI-3182 HI-8585. HI-8784 TA 8783 PDF

    California Devices

    Abstract: No abstract text available
    Text: HI-8783, HI-8784, HI-8785 January 2006 ARINC INTERFACE DEVICE 8 bit parallel data converted to 429 & 561 serial data out PIN CONFIGURATIONS DESCRIPTION The HI-8783, HI-8784, and HI-8785 are system components for interfacing 8 bit parallel data to an ARINC 429


    Original     		HI-8783, HI-8784, HI-8785 HI-8785 HI-8783 HI-3182 HI-8585. HI-8784 California Devices PDF

    HI-3182

    Abstract: HI-8585 HI-8783 HI-8783PSI HI-8783PST HI-8784 HI-8784PSI HI-8784PST HI-8785 ARINC 561
    Text: HI-8783, HI-8784, HI-8785 September 2006 ARINC INTERFACE DEVICE 8 bit parallel data converted to 429 & 561 serial data out PIN CONFIGURATIONS DESCRIPTION The HI-8783, HI-8784, and HI-8785 are system components for interfacing 8 bit parallel data to an ARINC 429


    Original     		HI-8783, HI-8784, HI-8785 HI-8785 HI-8783 HI-3182 HI-8585. HI-8784 HI-8585 HI-8783PSI HI-8783PST HI-8784PSI HI-8784PST ARINC 561 PDF

    Untitled

    Abstract: No abstract text available
    Text: HI-8787, HI-8788 FEATURES 26 - V+ 25 - 561 DATA 28 - 561 SYNC 27 - VCC 30 - D1 HI-8787PQI HI-8787PQT HI-8788PQI & HI-8788PQT D5 - 3 D6 - 4 D7 - 5 D8 - 6 D9 - 7 23 - TXAOUT 22 - V21 - PARITY ENB 20 - XMT RDY 19 - XMIT CLK 18 - RESET D10 - 8 D15 - 15 SLP1.5 - 16


    Original     		HI-8787, HI-8788 HI-8787 HI-8788 16-bit 32PTQS PDF

    counter 7468

    Abstract: ARINC 561 arinc 407
    Text: HI-8783, HI-8784, HI-8785 March 2007 ARINC 429 & 561 INTERFACE DEVICE 8 Bit Parallel Data In / ARINC Serial Data Out PIN CONFIGURATIONS DESCRIPTION The HI-8783, HI-8784, and HI-8785 are system components for interfacing 8 bit parallel data to an ARINC 429


    Original     		HI-8783, HI-8784, HI-8785 HI-8785 HI-8783 HI-3182 HI-8585. HI-8784 counter 7468 ARINC 561 arinc 407 PDF

    Untitled

    Abstract: No abstract text available
    Text: HI-8787, HI-8788 FEATURES 26 - V+ 25 - 561 DATA 28 - 561 SYNC 27 - VCC 30 - D1 HI-8787PQI HI-8787PQT HI-8788PQI & HI-8788PQT D5 - 3 D6 - 4 D7 - 5 D8 - 6 D9 - 7 23 - TXAOUT 22 - V21 - PARITY ENB 20 - XMT RDY 19 - XMIT CLK 18 - RESET D10 - 8 D15 - 15 SLP1.5 - 16


    Original     		HI-8787, HI-8788 HI-8787 HI-8788 16-bit 32PTQS PDF

    counter 7468

    Abstract: TA 8783 8783 HI-8784PSI HI-3182 HI-8585 HI-8783 HI-8783PSI HI-8783PST HI-8784
    Text: HI-8783, HI-8784, HI-8785 February 2009 ARINC 429 & 561 INTERFACE DEVICE 8 Bit Parallel Data In / ARINC Serial Data Out PIN CONFIGURATIONS DESCRIPTION The HI-8783, HI-8784, and HI-8785 are system components for interfacing 8 bit parallel data to an ARINC 429


    Original     		HI-8783, HI-8784, HI-8785 HI-8785 HI-8783 HI-3182 HI-8585. HI-8784 counter 7468 TA 8783 8783 HI-8784PSI HI-8585 HI-8783PSI HI-8783PST PDF

    Untitled

    Abstract: No abstract text available
    Text: HI-8787, HI-8788 FEATURES 26 - V+ 25 - 561 DATA 28 - 561 SYNC 27 - VCC 30 - D1 HI-8787PQI HI-8787PQT HI-8788PQI & HI-8788PQT D5 - 3 D6 - 4 D7 - 5 D8 - 6 D9 - 7 23 - TXAOUT 22 - V21 - PARITY ENB 20 - XMT RDY 19 - XMIT CLK 18 - RESET D10 - 8 D15 - 15 SLP1.5 - 16


    Original     		HI-8787, HI-8788 HI-8787 HI-8788 16-bit 32PTQS PDF

    hi8785pst

    Abstract: No abstract text available
    Text: HI-8783, HI-8784, HI-8785 February 2003 ARINC INTERFACE DEVICE 8 bit parallel data converted to 429 & 561 serial data out PIN CONFIGURATIONS DESCRIPTION The HI-8783, HI-8784, and HI-8785 are system components for interfacing 8 bit parallel data to an ARINC 429


    Original     		HI-8783, HI-8784, HI-8785 HI-8785 HI-8783 HI-3182 HI-8585. HI-8784 hi8785pst PDF

    DLS-111

    Abstract: ARINC 561 TA 8783
    Text: HI-8783, HI-8784, HI-8785 August 2006 ARINC INTERFACE DEVICE 8 bit parallel data converted to 429 & 561 serial data out PIN CONFIGURATIONS DESCRIPTION The HI-8783, HI-8784, and HI-8785 are system components for interfacing 8 bit parallel data to an ARINC 429


    Original     		HI-8783, HI-8784, HI-8785 HI-8785 HI-8783 HI-3182 HI-8585. HI-8784 DLS-111 ARINC 561 TA 8783 PDF

    HI-8787

    Abstract: HI-8787PQI HI-8787PQT HI-8788 HI-8788PQI HI-8788PQT 8788p
    Text: HI-8787, HI-8788 January 2001 PIN CONFIGURATION DESCRIPTION The HI-8787 and HI-8788 are system components for interfacing 16 bit parallel data to an ARINC 429 bus. They combine logic and line driver on one chip. The HI-8787 has an output resistance of 37.5 ohms, and the HI-8788 has


    Original     		HI-8787, HI-8788 HI-8787 HI-8788 16-bit HI-8788PQI HI-8788PQT HI-8787PQI HI-8787PQT HI-8788PQI HI-8788PQT 8788p PDF

    ARINC 561

    Abstract: No abstract text available
    Text: HI-8787, HI-8788 FEATURES 26 - V+ 25 - 561 DATA 28 - 561 SYNC 27 - VCC 30 - D1 HI-8787PQI HI-8787PQT HI-8788PQI & HI-8788PQT D5 - 3 D6 - 4 D7 - 5 D8 - 6 D9 - 7 23 - TXAOUT 22 - V21 - PARITY ENB 20 - XMT RDY 19 - XMIT CLK 18 - RESET D10 - 8 D15 - 15 SLP1.5 - 16


    Original     		HI-8787, HI-8788 HI-8787 HI-8788 16-bit 32PTQS ARINC 561 PDF

    Untitled

    Abstract: No abstract text available
    Text: HI-8787, HI-8788 FEATURES 26 - V+ 25 - 561 DATA 28 - 561 SYNC 27 - VCC 30 - D1 HI-8787PQI HI-8787PQT HI-8788PQI & HI-8788PQT D5 - 3 D6 - 4 D7 - 5 D8 - 6 D9 - 7 23 - TXAOUT 22 - V21 - PARITY ENB 20 - XMT RDY 19 - XMIT CLK 18 - RESET D10 - 8 D15 - 15 SLP1.5 - 16


    Original     		HI-8787, HI-8788 HI-8787 HI-8788 16-bit 32PTQS PDF

    TA 8783

    Abstract: No abstract text available
    Text: HI-8783, HI-8784, HI-8785 June 2006 ARINC INTERFACE DEVICE 8 bit parallel data converted to 429 & 561 serial data out PIN CONFIGURATIONS DESCRIPTION The HI-8783, HI-8784, and HI-8785 are system components for interfacing 8 bit parallel data to an ARINC 429


    Original     		HI-8783, HI-8784, HI-8785 HI-8785 HI-8783 HI-3182 HI-8585. HI-8784 TA 8783 PDF

    LHi 878

    Abstract: TA 8783 N LHi 878 application TA 8783 HI-8784PSI HI-8784PST HI-8785 HI-8382 HI-8585 HI-8783
    Text: HI-8783, HI-8784, HI-8785 January 2001 PIN CONFIGURATIONS DESCRIPTION The HI-8783, HI-8784, and HI-8785 are system components for interfacing 8 bit parallel data to an ARINC 429 bus. The HI-8783 is a logic device only and requires a separate line driver circuit, such as the HI-8382 or HI-8585.


    Original     		HI-8783, HI-8784, HI-8785 HI-8785 HI-8783 HI-8382 HI-8585. HI-8784 LHi 878 TA 8783 N LHi 878 application TA 8783 HI-8784PSI HI-8784PST HI-8585 PDF

    we32100

    Abstract: 0TE15
    Text: Data Sheet T7102A-X.25/X.75 Protocol Controller Features • 24-bit address bus to address a 16-Mbyte address space ■ Independently programmable transmit and receive window size ■ Dual-channel DMA with standard interface, including DMA request, DMA acknowledge,


    OCR Scan     		T7102A-X 24-bit 16-Mbyte modulo-128 16-bit 32-bit J32562 DS87-84SMOS we32100 0TE15 PDF

    TCA 810

    Abstract: LK01 d6102 we32100
    Text: AT&T Data Sheet T7102A-X.25/X.75 Protocol Controller Features • 24-bit address bus to address a 16-Mbyte address space ■ Independently programmable transmit and receive window size ■ Dual-channel DMA with standard interface, including DMA request, DMA acknowledge,


    OCR Scan     		T7102A-X 24-bit 16-Mbyte modulo-128 16-bit 32-bit J32562 DS87-84SMOS TCA 810 LK01 d6102 we32100 PDF