HD74LS10 |
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Hitachi Semiconductor
|
Triple 3-input Positive NAND Gates |
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Original |
PDF
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HD74LS10 |
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Renesas Technology
|
Triple 3-Input Positive NAND Gates |
|
Original |
PDF
|
HD74LS10 |
|
Hitachi Semiconductor
|
Triple 3-Input Positive NAND Gates |
|
Scan |
PDF
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HD74LS107A |
|
Hitachi Semiconductor
|
Dual J-K Negative-edge-triggered Flip Flops |
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Original |
PDF
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HD74LS107A |
|
Renesas Technology
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Dual J-K Negative-edge-triggered Flip-Flops (with Clear) |
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Original |
PDF
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HD74LS107A |
|
Hitachi Semiconductor
|
Dual J-K Negative Edge Triggered Flip-Flops |
|
Scan |
PDF
|
HD74LS107AFP |
|
Renesas Technology
|
Dual J-K Flip-Flops with Clear |
|
Original |
PDF
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HD74LS107AFPEL |
|
Renesas Technology
|
Dual J-K Negative-edge-triggered Flip-Flops (with Clear) |
|
Original |
PDF
|
HD74LS107AP |
|
Renesas Technology
|
Dual J-K Negative-edge-triggered Flip-Flops (with Clear) |
|
Original |
PDF
|
HD74LS107AP |
|
Renesas Technology
|
Dual J-K Flip-Flops with Clear |
|
Original |
PDF
|
HD74LS107AP |
|
Hitachi Semiconductor
|
Dual J-K Negative-edge-triggered Flip-Flops (with Clear) |
|
Scan |
PDF
|
HD74LS107P |
|
Unknown
|
TTL Data Book 1980 |
|
Scan |
PDF
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HD74LS107P |
|
Unknown
|
J-K-Type Flip-Flop |
|
Scan |
PDF
|
HD74LS109 |
|
Hitachi Semiconductor
|
Dual J-K Positive-edge-triggered Flip-Flops(with Preset and Clear) |
|
Original |
PDF
|
|
HD74LS109A |
|
Hitachi Semiconductor
|
Dual J-K Positive-edge-triggered Flip Flops |
|
Original |
PDF
|
HD74LS109A |
|
Hitachi Semiconductor
|
Dual J-K Positive-edge-triggered Flip Flops |
|
Scan |
PDF
|
HD74LS109AP |
|
Hitachi Semiconductor
|
Dual J-K Positive Edge Triggered Flip-Flops (with preset and clear) |
|
Scan |
PDF
|
HD74LS109P |
|
Unknown
|
TTL Data Book 1980 |
|
Scan |
PDF
|
HD74LS10FP |
|
Renesas Technology
|
Triple 3-input NAND Gates |
|
Original |
PDF
|
HD74LS10FPEL |
|
Renesas Technology
|
Triple 3-Input Positive NAND Gates |
|
Original |
PDF
|