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    Rochester Electronics LLC MM74HCT14MX

    IC INVERT SCHMITT 6CH 1IN 14SOIC
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    DigiKey MM74HCT14MX Bulk 710,454 2,303
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    Rochester Electronics LLC MM74HCT14MXNL

    IC GATE XNOR 4CH 2-INP 14SOIC
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    DigiKey MM74HCT14MXNL Bulk 95,000 1,268
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    Rochester Electronics LLC MM74HCT14SJ

    IC INVERT SCHMITT 6CH 1INP 14SOP
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    DigiKey MM74HCT14SJ Tube 13,442 1,480
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    Rochester Electronics LLC MM74HCT14M

    IC INVERT SCHMITT 6CH 1IN 14SOIC
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    DigiKey MM74HCT14M Bulk 4,339 1,249
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    onsemi MM74HCT14N

    IC INVERT SCHMITT 6CH 1IN 14MDIP
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    MM74HCT14 Datasheets (36)

    Part
    ECAD Model
    Manufacturer
    Description
    Curated
    Datasheet Type
    PDF
    MM74HCT14 Fairchild Semiconductor Hex Inverting Schmitt Trigger Original PDF
    MM74HCT14 Fairchild Semiconductor Hex Inverting Schmitt Trigger Original PDF
    MM74HCT14 Fairchild Semiconductor Hex Inverting Schmitt Trigger Original PDF
    MM74HCT147 National Semiconductor 10-to-4 Line Priority Encoder Original PDF
    MM74HCT147J National Semiconductor 10-to-4 Line Priority Encoder Original PDF
    MM74HCT147J National Semiconductor 10-to-4 Line Priority Encoder Scan PDF
    MM74HCT148 National Semiconductor 8-3 Line Priority Encoder Original PDF
    MM74HCT148 National Semiconductor 8-3 Line Priority Encoder Scan PDF
    MM74HCT148N National Semiconductor 8-3 Line Priority Encoder Scan PDF
    MM74HCT149 National Semiconductor 8 Line to 8 Line Priority Encoder Original PDF
    MM74HCT149J National Semiconductor 8 Line to 8 Line Priority Encoder Scan PDF
    MM74HCT149N National Semiconductor 8 Line to 8 Line Priority Encoder Scan PDF
    MM74HCT14M Fairchild Semiconductor Hex Inverting Schmitt Trigger; Package: SOIC; No of Pins: 14; Container: Rail Original PDF
    MM74HCT14M Fairchild Semiconductor Hex Inverting Schmitt Trigger Original PDF
    MM74HCT14M Fairchild Semiconductor Hex Inverting Schmitt Trigger Scan PDF
    MM74HCT14M_NL Fairchild Semiconductor Hex Inverting Schmitt Trigger Original PDF
    MM74HCT14MTC Fairchild Semiconductor Hex Inverting Schmitt Trigger; Package: TSSOP; No of Pins: 14; Container: Rail Original PDF
    MM74HCT14MTC Fairchild Semiconductor Hex Inverting Schmitt Trigger Original PDF
    MM74HCT14MTC Fairchild Semiconductor Hex Inverting Schmitt Trigger Scan PDF
    MM74HCT14MTCX Fairchild Semiconductor Hex Inverting Schmitt Trigger; Package: TSSOP; No of Pins: 14; Container: Tape & Reel Original PDF

    MM74HCT14 Datasheets Context Search

    Catalog Datasheet
    Type
    Document Tags
    PDF

    16 line to 4 line priority encoder

    Abstract: 74HCT C1995 MM54HCT149 MM54HCT149J MM74HCT149 MM74HCT149J
    Text: MM54HCT149 MM74HCT149 8 Line to 8 Line Priority Encoder General Description This priority encoder is implemented in advanced silicongate CMOS technology It has the high noise immunity and low power consumption typical of CMOS circuits as well as the speeds and output drive similar to LS-TTL


    Original     		MM54HCT149 MM74HCT149 16 line to 4 line priority encoder 74HCT C1995 MM54HCT149J MM74HCT149 MM74HCT149J PDF

    74HCT

    Abstract: MM54HCT149 MM74HCT149
    Text: January 1988 Semiconductor MM54HCT149/MM74HCT149 8 Line to 8 Line Priority Encoder General Description This priority e ncoder is im plem ented in advanced silico n ­ gate CMOS technology. It has th e high noise im m unity and low pow e r consum ption typical o f C M OS circuits, as w ell as


    OCR Scan     		MM54HCT149/MM74HCT149 R07-R00. 74HCT MM54HCT149 MM74HCT149 PDF

    Untitled

    Abstract: No abstract text available
    Text: Revised February 1999 S E M [ C O N D U C T O R TM MM74HCT14 Hex Inverting Schmitt Trigger General Description Features The MM74HCT14 utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS, as well as the capability


    OCR Scan     		MM74HCT14 MM74HCT14 74HCT PDF

    356 schmitt trigger

    Abstract: 74HCT 74LS MM74HCT14 MM74HCT14M MM74HCT14MTC MM74HCT14MTCX MM74HCT14MX MM74HCT14SJ MM74HCT14SJX
    Text: MM74HCT14 Hex Inverting Schmitt Trigger Features Description ƒ ƒ ƒ ƒ ƒ ƒ ƒ The MM74HCT14 utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS, as well as the capability to drive 10 LS-TTL loads.


    Original     		MM74HCT14 MM74HCT14 74HCT 356 schmitt trigger 74LS MM74HCT14M MM74HCT14MTC MM74HCT14MTCX MM74HCT14MX MM74HCT14SJ MM74HCT14SJX PDF

    Untitled

    Abstract: No abstract text available
    Text: Semiconductor PRELIMINARY November 1995 & MM54HCT147/MM74HCT147 10-to-4 Line Priority Encoder General Description This priority encoder utilizes advanced silicon-gate CMOS technology. It has the high noise immunity and low power consumption typical of CMOS circuits, as well as the speeds


    OCR Scan     		MM54HCT147/MM74HCT147 10-to-4 PDF

    74HCTI

    Abstract: No abstract text available
    Text: Se mi co nd u > t PRELIM INARY O T February 1988 MM54HCT148/MM74HCT148 8 - 3 Line Priority Encoder General Description This priority encoder utilizes advanced silicon-gate CMOS technology. It has the high noise immunity and low power consumption typical of CMOS circuits, as well as the speeds


    OCR Scan     		MM54HCT148/MM74HCT148 74HCTI PDF

    Untitled

    Abstract: No abstract text available
    Text: Semiconductor PRELIMINARY N ovem ber 1995 MM54HCT147/MM74HCT147 10-to-4 Line Priority Encoder General Description T his p riority e n co d e r utilizes advanced silicon-gate CM OS technology. It has th e high noise im m unity and low pow er consum ption typical of CM OS circuits, as w ell as th e speeds


    OCR Scan     		MM54HCT147/MM74HCT147 10-to-4 input-534 PDF

    Untitled

    Abstract: No abstract text available
    Text: S E M IC O N D U C T O R Revised April 1999 TM MM74HCT14 Hex Inverting Schmitt Trigger General Description Features The M M 74H C T14 utilizes advanced silicon-gate C M OS technology to achieve the low pow er dissipation and high noise im m unity of standard C M O S, as well as the capability


    OCR Scan     		MM74HCT14 PDF

    74HCT

    Abstract: 74LS M14A MM74HCT14 MM74HCT14M MM74HCT14MTC MM74HCT14N MM74HCT14SJ MTC14 N14A
    Text: MM74HCT14 Hex Inverting Schmitt Trigger General Description Features The MM74HCT14 utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS, as well as the capability to drive 10 LS-TTL loads.


    Original     		MM74HCT14 MM74HCT14 74HCT 74LS M14A MM74HCT14M MM74HCT14MTC MM74HCT14N MM74HCT14SJ MTC14 N14A PDF

    Untitled

    Abstract: No abstract text available
    Text: MM54HCT149/MM74HCT149 8 Line to 8 Line Priority Encoder General Description This priority encoder is implemented in advanced silicongate CMOS technology. It has the high noise immunity and low power consumption typical of CMOS circuits, as well as the speeds and output drive similar to LS-TTL.


    OCR Scan     		MM54HCT149/MM74HCT149 PDF

    Untitled

    Abstract: No abstract text available
    Text: January 1988 Semiconductor MM54HCT149/MM74HCT149 8 Line to 8 Line Priority Encoder General Description This priority encoder is implemented in advanced silicongate CMOS technology. It has the high noise immunity and low power consumption typical of CMOS circuits, as well as


    OCR Scan     		MM54HCT149/MM74HCT149 PDF

    74HCT

    Abstract: 74LS M14A M14D MM74HCT14 MM74HCT14M MM74HCT14MTC MM74HCT14MX MM74HCT14N MM74HCT14SJ
    Text: Revised January 2005 MM74HCT14 Hex Inverting Schmitt Trigger General Description Features The MM74HCT14 utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS, as well as the capability


    Original     		MM74HCT14 MM74HCT14 74HCT 74LS M14A M14D MM74HCT14M MM74HCT14MTC MM74HCT14MX MM74HCT14N MM74HCT14SJ PDF

    74HCT

    Abstract: 74LS M14A M14D MM74HCT14 MM74HCT14M MM74HCT14MTC MM74HCT14SJ MTC14
    Text: Revised April 1999 E M IC O N D U C T G R T M MM74HCT14 Hex Inverting Schmitt Trigger General Description Features T he M M 74H C T14 utilizes advanced silicon-gate C M OS technology to achieve the low pow er dissipation and high noise im m unity of standard C M O S, as w ell as the capability


    OCR Scan     		MM74HCT14 MM74HCT14 74HCT 74LS M14A M14D MM74HCT14M MM74HCT14MTC MM74HCT14SJ MTC14 PDF

    Untitled

    Abstract: No abstract text available
    Text: R C H II- D • M IC O N D U C T O R r MM74HCT14 Hex Inverting Schmitt Trigger General Description Features The MM74HCT14 utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS, as well as the capability


    OCR Scan     		MM74HCT14 MM74HCT14 74HCT MM74HCT14MTC MTC14 MM74HCT14SJ MM74HCT14N PDF

    pin diagram of decimal to BCD priority encoder 7

    Abstract: 74HCT C1995 MM54HCT147 MM54HCT147J MM74HCT147 MM74HCT147J encoder truth table
    Text: November 1995 MM54HCT147 MM74HCT147 10-to-4 Line Priority Encoder General Description This priority encoder utilizes advanced silicon-gate CMOS technology It has the high noise immunity and low power consumption typical of CMOS circuits as well as the speeds


    Original     		MM54HCT147 MM74HCT147 10-to-4 pin diagram of decimal to BCD priority encoder 7 74HCT C1995 MM54HCT147J MM74HCT147 MM74HCT147J encoder truth table PDF

    Untitled

    Abstract: No abstract text available
    Text: Revised April 1999 E M I C Q N D U C T G R tm General Description Features The MM74HCT14 utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS, as well as the capability to drive 10 LS-TTL loads.


    OCR Scan     		MM74HCT14 MM74HCT14 74HCT PDF

    74HCT

    Abstract: 74LS M14A M14D MM74HCT14 MM74HCT14M MM74HCT14MTC MM74HCT14N MM74HCT14SJ MTC14
    Text: Revised February 1999 MM74HCT14 Hex Inverting Schmitt Trigger General Description Features The MM74HCT14 utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS, as well as the capability


    Original     		MM74HCT14 MM74HCT14 74HCT 74LS M14A M14D MM74HCT14M MM74HCT14MTC MM74HCT14N MM74HCT14SJ MTC14 PDF

    74HCT

    Abstract: C1995 MM54HCT148 MM74HCT148 N16E
    Text: February 1988 MM54HCT148 MM74HCT148 8 – 3 Line Priority Encoder General Description All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground This priority encoder utilizes advanced silicon-gate CMOS technology It has the high noise immunity and low power


    Original     		MM54HCT148 MM74HCT148 74HCT C1995 MM74HCT148 N16E PDF

    Fairchild 74LS

    Abstract: 1.50 MKT SCHMITT-TRIGGER 74HCT 74LS M14A M14D MM74HCT14 MM74HCT14M MM74HCT14MTC
    Text: MM74HCT14 Hex Inverting Schmitt Trigger Features General Description • Typical propagation delay: 13ns The MM74HCT14 utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS, as well as the


    Original     		MM74HCT14 MM74HCT14 74HCT Fairchild 74LS 1.50 MKT SCHMITT-TRIGGER 74LS M14A M14D MM74HCT14M MM74HCT14MTC PDF

    10-TO-4-LINE

    Abstract: No abstract text available
    Text: PRELIMINARY t O T November 1995 MM54HCT147/MM74HCT147 10-to-4 Line Priority Encoder General Description This priority encoder utilizes advanced silicon-gate CMOS technology. It has the high noise immunity and low power consumption typical of CMOS circuits, as well as the speeds


    OCR Scan     		54HCT147/M 74HCT14 10-to-4 MM54HCT147/MM74HCT147 10-TO-4-LINE PDF

    Untitled

    Abstract: No abstract text available
    Text: MM74HCT14 Hex Inverting Schmitt Trigger Features Description ̇ ̇ ̇ ̇ ̇ ̇ ̇ The MM74HCT14 utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS, as well as the capability to drive 10 LS-TTL loads.


    Original     		MM74HCT14 MM74HCT14 74HCT PDF

    Untitled

    Abstract: No abstract text available
    Text: PRELIM INARY Semicondu* t 0 Y February 1988 MM54HCT148/MM74HCT148 8 - 3 Line Priority Encoder General Description This priority encoder utilizes advanced silicon-gate CMOS technology. It has the high noise immunity and low power consumption typical of CMOS circuits, as well as the speeds


    OCR Scan     		MM54HCT148/MM74HCT148 PDF

    74HCT

    Abstract: MM54HCT148 MM74HCT148
    Text: PRELIM INARY Semicondu* t 0 T February 1988 MM54HCT148/MM74HCT148 8 -3 Line Priority Encoder General Description All inputs are protected from damage due to static dis­ charge by internal diode clamps to V cc arid ground. This priority encoder utilizes advanced silicon-gate CMOS


    OCR Scan     		MM54HCT148/MM74HCT148 74HCT MM54HCT148 MM74HCT148 PDF

    74HCT

    Abstract: MM54HCT147 MM74HCT147
    Text: Semiconductor PRELIMINARY November 1995 & MM54HCT147/MM74HCT147 10-to-4 Line Priority Encoder General Description This priority encoder utilizes advanced silicon-gate CMOS technology. It has the high noise immunity and low power consumption typical of CMOS circuits, as well as the speeds


    OCR Scan     		MM54HCT147/MM74HCT147 10-to-4 74HCT MM54HCT147 MM74HCT147 PDF