Untitled
Abstract: No abstract text available
Text: SN74AUC2G32 DUAL 2-INPUT POSITIVE-OR GATE www.ti.com SCES478C – AUGUST 2003 – REVISED JANUARY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
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PDF
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SN74AUC2G32
SCES478C
000-V
A114-A)
A115-A)
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Untitled
Abstract: No abstract text available
Text: SN74AUC2G32 DUAL 2-INPUT POSITIVE-OR GATE www.ti.com SCES478C – AUGUST 2003 – REVISED JANUARY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
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PDF
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SN74AUC2G32
SCES478C
000-V
A114-A)
A115-A)
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Marking Code TI OMAP
Abstract: SN74AUC2G32DCUR
Text: SN74AUC2G32 DUAL 2-INPUT POSITIVE-OR GATE www.ti.com SCES478C – AUGUST 2003 – REVISED JANUARY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
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PDF
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SN74AUC2G32
SCES478C
000-V
A114-A)
A115-A)
Marking Code TI OMAP
SN74AUC2G32DCUR
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A115-A
Abstract: C101 SN74AUC2G32 SN74AUC2G32DCUR
Text: SN74AUC2G32 DUAL 2-INPUT POSITIVE-OR GATE www.ti.com SCES478C – AUGUST 2003 – REVISED JANUARY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
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PDF
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SN74AUC2G32
SCES478C
000-V
A114-A)
A115-A)
A115-A
C101
SN74AUC2G32
SN74AUC2G32DCUR
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SN74AUC2G32DCUR
Abstract: No abstract text available
Text: SN74AUC2G32 DUAL 2-INPUT POSITIVE-OR GATE www.ti.com SCES478C – AUGUST 2003 – REVISED JANUARY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
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PDF
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SN74AUC2G32
SCES478C
000-V
A114-A)
A115-A)
SN74AUC2G32DCUR
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Untitled
Abstract: No abstract text available
Text: SN74AUC2G32 DUAL 2-INPUT POSITIVE-OR GATE www.ti.com SCES478C – AUGUST 2003 – REVISED JANUARY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
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PDF
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SN74AUC2G32
SCES478C
000-V
A114-A)
A115-A)
|
A115-A
Abstract: C101 SN74AUC2G32 SN74AUC2G32DCUR
Text: SN74AUC2G32 DUAL 2-INPUT POSITIVE-OR GATE www.ti.com SCES478C – AUGUST 2003 – REVISED JANUARY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
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PDF
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SN74AUC2G32
SCES478C
000-V
A114-A)
A115-A)
A115-A
C101
SN74AUC2G32
SN74AUC2G32DCUR
|
SN74AUC2G32DCUR
Abstract: No abstract text available
Text: SN74AUC2G32 DUAL 2-INPUT POSITIVE-OR GATE www.ti.com SCES478C – AUGUST 2003 – REVISED JANUARY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
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PDF
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SN74AUC2G32
SCES478C
000-V
A114-A)
A115-A)
SN74AUC2G32DCUR
|
Untitled
Abstract: No abstract text available
Text: SN74AUC2G32 DUAL 2-INPUT POSITIVE-OR GATE www.ti.com SCES478C – AUGUST 2003 – REVISED JANUARY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
|
PDF
|
SN74AUC2G32
SCES478C
000-V
A114-A)
A115-A)
|
SN74AUC2G32DCUR
Abstract: No abstract text available
Text: SN74AUC2G32 DUAL 2-INPUT POSITIVE-OR GATE www.ti.com SCES478C – AUGUST 2003 – REVISED JANUARY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
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PDF
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SN74AUC2G32
SCES478C
000-V
A114-A)
A115-A)
SN74AUC2G32DCUR
|
Untitled
Abstract: No abstract text available
Text: SN74AUC2G32 DUAL 2-INPUT POSITIVE-OR GATE www.ti.com SCES478C – AUGUST 2003 – REVISED JANUARY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
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PDF
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SN74AUC2G32
SCES478C
000-V
A114-A)
A115-A)
|
SN74AUC2G32DCUR
Abstract: No abstract text available
Text: SN74AUC2G32 DUAL 2-INPUT POSITIVE-OR GATE www.ti.com SCES478C – AUGUST 2003 – REVISED JANUARY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
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PDF
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SN74AUC2G32
SCES478C
000-V
A114-A)
A115-A)
SN74AUC2G32DCUR
|
us8 Package
Abstract: No abstract text available
Text: SN74AUC2G32 DUAL 2-INPUT POSITIVE-OR GATE www.ti.com SCES478C – AUGUST 2003 – REVISED JANUARY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
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PDF
|
SN74AUC2G32
SCES478C
000-V
A114-A)
A115-A)
us8 Package
|
Untitled
Abstract: No abstract text available
Text: SN74AUC2G32 DUAL 2-INPUT POSITIVE-OR GATE www.ti.com SCES478C – AUGUST 2003 – REVISED JANUARY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
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PDF
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SN74AUC2G32
SCES478C
000-V
A114-A)
A115-A)
|
|
|
Untitled
Abstract: No abstract text available
Text: SN74AUC2G32 DUAL 2-INPUT POSITIVE-OR GATE www.ti.com SCES478C – AUGUST 2003 – REVISED JANUARY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
|
PDF
|
SN74AUC2G32
SCES478C
000-V
A114-A)
A115-A)
|
SN74AUC2G32DCUR
Abstract: No abstract text available
Text: SN74AUC2G32 DUAL 2-INPUT POSITIVE-OR GATE www.ti.com SCES478C – AUGUST 2003 – REVISED JANUARY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
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PDF
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SN74AUC2G32
SCES478C
000-V
A114-A)
A115-A)
SN74AUC2G32DCUR
|
A115-A
Abstract: C101 SN74AUC2G32 SN74AUC2G32DCUR
Text: SN74AUC2G32 DUAL 2-INPUT POSITIVE-OR GATE www.ti.com SCES478C – AUGUST 2003 – REVISED JANUARY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
|
PDF
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SN74AUC2G32
SCES478C
000-V
A114-A)
A115-A)
A115-A
C101
SN74AUC2G32
SN74AUC2G32DCUR
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