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    SN54AHC32

    Abstract: SN74AHC32
    Text: SN54AHC32, SN74AHC32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SCLS247A – OCTOBER 1995 – REVISED MARCH 1996 D D D SN54AHC32 . . . J OR W PACKAGE SN74AHC32 . . . D, DB, N, OR PW PACKAGE TOP VIEW Operating Range 2-V to 5.5-V VCC EPIC  (Enhanced-Performance Implanted


    Original     		PDF SN54AHC32, SN74AHC32 SCLS247A SN54AHC32 JESD-17 MIL-STD-883C, 300-mil SN54AHC32 SN74AHC32

    SN74ALVCH162245

    Abstract: Schottky Barrier Diode Bus-Termination Array SN7400 CLOCKED SLLS210 SCAD001D TEXAS INSTRUMENTS SN7400 SERIES buffer SN74LVCC4245 sn74154 SDAD001C SN7497
    Text: Section 4 Logic Selection Guide ABT – Advanced BiCMOS Technology . . . . . . . . . . . . . . . . . . . . . . . . . . 4–3 ABTE/ETL – Advanced BiCMOS Technology/ Enhanced Transceiver Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–9


    Original     		PDF

    SN74HC02 Spice model

    Abstract: philips semiconductor data handbook SDAD001C SDFD001B SCAD001D SN7497 spice model SN74AHC14 spice Transistor Crossreference SLLS210 ci ttl sn74ls00
    Text: LOGIC OVERVIEW 1 FUNCTIONAL INDEX 2 FUNCTIONAL CROSSĆREFERENCE 3 DEVICE SELECTION GUIDE 4 3 LOGIC SELECTION GUIDE FIRST QUARTER 1997 IMPORTANT NOTICE Texas Instruments TI reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest


    Original     		PDF

    SN54AHC32

    Abstract: SN74AHC32
    Text: SN54AHC32, SN74AHC32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SCLS247A - OCTOBER 1995 - REVISED MARCH 1996 Operating Range 2-V to 5.5-V V qc • EPIC Enhanced-Performance Implanted CMOS Process • High Latch-Up Immunity Exceeds 250 mA Per JEDEC Standard JESD-17


    OCR Scan     		PDF SN54AHC32, SN74AHC32 SCLS247A- JESD-17 MIL-STD-883C, 300-mil AHC32 SN54AHC32 SN74AHC32

    Untitled

    Abstract: No abstract text available
    Text: SN54AHC32, SN74AHC32 QUADRUPLE 2-INPUT POSITIVE-OR GATES _ S C L S 2 4 7 A -O CTO BE R 1 9 9 5 - REVISED MARCH 1996 • Operating Range 2-V to 5.5-V V cc • EPIC Enhanced-Performance Implanted CMOS Process • High Latch-Up Immunity Exceeds 250 mA


    OCR Scan     		PDF SN54AHC32, SN74AHC32 JESD-17 MIL-STD-883C, 300-mll SN54AHC32 SN74AHC32