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    Murata Manufacturing Co Ltd GCM1885G2A100RA16J

    CAP CER 10PF 100V X8G 0603
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    DigiKey GCM1885G2A100RA16J Reel 10,000
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    Avnet Americas GCM1885G2A100RA16J Reel 14 Weeks 10,000
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    Mouser Electronics GCM1885G2A100RA16J
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    Murata Manufacturing Co Ltd GCM1885C2A100RA16J

    CAP CER 10PF 100V C0G/NP0 0603
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    DigiKey GCM1885C2A100RA16J Reel 10,000
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    Murata Manufacturing Co Ltd GCM1885G2A100RA16D

    CAP CER 10PF 100V X8G 0603
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    DigiKey GCM1885G2A100RA16D Reel 12,000
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    Avnet Americas GCM1885G2A100RA16D Reel 14 Weeks 4,000
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    Mouser Electronics GCM1885G2A100RA16D
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    Murata Manufacturing Co Ltd GCM1885C2A100RA16D

    CAP CER 10PF 100V C0G/NP0 0603
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    DigiKey GCM1885C2A100RA16D Reel 8,000
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    Avnet Americas GCM1885C2A100RA16D Reel 14 Weeks 4,000
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    Mouser Electronics GCM1885C2A100RA16D
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    Murata Manufacturing Co Ltd GRM1885C2A100RA01D

    CAP CER 10PF 100V C0G/NP0 0603
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    GRM1885C2A100RA01D Digi-Reel 1
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    GRM1885C2A100RA01D Cut Tape 1
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    A100RA Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: CY7C1460AV25 CY7C1462AV25 36-Mbit 1 M x 36/2 M × 18 Pipelined SRAM with NoBL Architecture 36-Mbit (1 M × 36/2 M × 18) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™


    Original     		PDF CY7C1460AV25 CY7C1462AV25 36-Mbit CY7C1460AV25/CY7C1462AV25 CY7C14s

    CY7C1355C

    Abstract: No abstract text available
    Text: CY7C1355C, CY7C1357C 9-Mbit 256 K x 36 / 512 K × 18 Flow-Through SRAM with NoBL Architecture 9-Mbit (256 K × 36 / 512 K × 18) Flow-through SRAM with NoBL™ Architecture Features Functional Description • No Bus Latency™ (NoBL™) architecture eliminates dead


    Original     		PDF CY7C1355C, CY7C1357C CY7C1355C/CY7C1357C CY7C1355C

    Untitled

    Abstract: No abstract text available
    Text: CY7C1352G 4-Mbit 256 K x 18 Pipelined SRAM with NoBL Architecture 4-Mbit (256 K × 18) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT™ devices ■ Internally self-timed output buffer control to eliminate the need


    Original     		PDF CY7C1352G CY7C1352G

    Untitled

    Abstract: No abstract text available
    Text: CY7C1347G 4-Mbit 128 K x 36 Pipelined Sync SRAM 4-Mbit (128 K × 36) Pipelined Sync SRAM Features Functional Description • Fully registered inputs and outputs for pipelined operation ■ 128 K × 36 common I/O architecture ■ 3.3 V core power supply (VDD)


    Original     		PDF CY7C1347G CY7C1347G

    CY7C1470BV33

    Abstract: No abstract text available
    Text: CY7C1470BV33 CY7C1472BV33 CY7C1474BV33 72-Mbit 2 M x 36/4 M × 18/1 M × 72 Pipelined SRAM with NoBL Architecture 72-Mbit (2 M × 36/4 M × 18/1 M × 72) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™


    Original     		PDF CY7C1470BV33 CY7C1472BV33 CY7C1474BV33 72-Mbit CY7C1470BV33, CY7C1472BV33, CY7C1474BV33

    CY7C1325G

    Abstract: CY7C1325G-133AXC CY7C1325G-133AXI CY7C1325G-133BGC CY7C1325G-133BGI CY7C1325G-133BGXC CY7C1325G-133BGXI
    Text: CY7C1325G PRELIMINARY 4-Mbit 256K x 18 Flow-Through Sync SRAM Functional Description[1] Features • 256K X 18 common I/O • 3.3V –5% and +10% core power supply (VDD) • 2.5V or 3.3V I/O supply (VDDQ) • Fast clock-to-output times — 6.5 ns (133-MHz version)


    Original     		PDF CY7C1325G 133-MHz 117-MHz 100-MHz 100-pin 119-ball CY7C1325G CY7C1325G-133AXC CY7C1325G-133AXI CY7C1325G-133BGC CY7C1325G-133BGI CY7C1325G-133BGXC CY7C1325G-133BGXI

    Untitled

    Abstract: No abstract text available
    Text: CY7C1386D CY7C1387D 18-Mbit 512 K x 36/1 M × 18 Pipelined DCD Sync SRAM 18-Mbit (512 K × 36/1 M × 18) Pipelined DCD Sync SRAM Features Functional Description • Supports bus operation up to 200 MHz ■ Available speed grades are 200, and 167 MHz ■


    Original     		PDF CY7C1386D CY7C1387D 18-Mbit

    CY7C1355C

    Abstract: No abstract text available
    Text: CY7C1355C, CY7C1357C 9-Mbit 256 K x 36 / 512 K × 18 Flow-Through SRAM with NoBL Architecture 9-Mbit (256 K × 36 / 512 K × 18) Flow-through SRAM with NoBL™ Architecture Functional Description Features • No Bus Latency™ (NoBL™) architecture eliminates dead


    Original     		PDF CY7C1355C, CY7C1357C 133-MHz CY7C1355C

    Untitled

    Abstract: No abstract text available
    Text: CY7C1444AV33 36-Mbit 1 M x 36 Pipelined DCD Sync SRAM 36-Mbit (1 M × 36) Pipelined DCD Sync SRAM Functional Description Features • Supports bus operation up to 167 MHz ■ Available speed grade is 167 MHz ■ Registered inputs and outputs for pipelined operation


    Original     		PDF CY7C1444AV33 36-Mbit 167-MHz

    Untitled

    Abstract: No abstract text available
    Text: CY7C1460AV33 CY7C1462AV33 36-Mbit 1 M x 36/2 M × 18 Pipelined SRAM with NoBL Architecture 36-Mbit (1 M × 36/2 M × 18) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT ■


    Original     		PDF CY7C1460AV33 CY7C1462AV33 36-Mbit

    Untitled

    Abstract: No abstract text available
    Text: CY7C1347G 4-Mbit 128 K x 36 Pipelined Sync SRAM 4-Mbit (128 K × 36) Pipelined Sync SRAM Features Functional Description • Fully registered inputs and outputs for pipelined operation ■ 128 K × 36 common I/O architecture ■ 3.3 V core power supply (VDD)


    Original     		PDF CY7C1347G 100-pin 119-ball

    CY7C1347G-133AXI

    Abstract: CY7C1347G-166BGC CY7C1347G CY7C1347G-200AXC CY7C1347G-200BGC CY7C1347G-225AXC CY7C1347G-250AXC CY7C1347G-250BGC
    Text: PRELIMINARY CY7C1347G 4-Mbit 128K x 36 Pipelined Sync SRAM Functional Description[1] Features • Fully registered inputs and outputs for pipelined operation • 128K by 36 common I/O architecture • 3.3V core power supply • 2.5V/3.3V I/O operation • Fast clock-to-output times


    Original     		PDF CY7C1347G 250-MHz 225-MHz 200-MHz 166-MHz 133-MHz 100-MHz 100-pin 119-pin 165-pin CY7C1347G-133AXI CY7C1347G-166BGC CY7C1347G CY7C1347G-200AXC CY7C1347G-200BGC CY7C1347G-225AXC CY7C1347G-250AXC CY7C1347G-250BGC

    Untitled

    Abstract: No abstract text available
    Text: CY7C1470BV33 CY7C1472BV33 CY7C1474BV33 72-Mbit 2 M x 36/4 M × 18/1 M × 72 Pipelined SRAM with NoBL Architecture 72-Mbit (2 M × 36/4 M × 18/1 M × 72) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™


    Original     		PDF CY7C1470BV33 CY7C1472BV33 CY7C1474BV33 72-Mbit

    Untitled

    Abstract: No abstract text available
    Text: CY7C1481BV25 72-Mbit 2 M x 36 Flow-Through SRAM 72-Mbit (2 M × 36) Flow-Through SRAM Features Functional Description • Supports 133 MHz bus operations ■ 2 M × 36 common I/O ■ 2.5 V core power supply (VDD) ■ 2.5 V I/O supply (VDDQ) ■ Fast clock to output time


    Original     		PDF CY7C1481BV25 72-Mbit CY7C1481BV25

    Untitled

    Abstract: No abstract text available
    Text: CY7C1354CV25 CY7C1356CV25 9-Mbit 256 K x 36/512 K × 18 Pipelined SRAM with NoBL Architecture 9-Mbit (256 K × 36/512 K × 18) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin-compatible with and functionally equivalent to ZBT™


    Original     		PDF CY7C1354CV25 CY7C1356CV25 CY7C1354CV25/CY7C1356CV25

    Untitled

    Abstract: No abstract text available
    Text: CY7C1351G 4-Mbit 128K x 36 Flow-through SRAM with NoBL Architecture Functional Description[1] Features • Can support up to 133-MHz bus operations with zero wait states — Data is transferred on every clock • Pin compatible and functionally equivalent to ZBT™


    Original     		PDF CY7C1351G 133-MHz 100-Pin 119-Ball

    Untitled

    Abstract: No abstract text available
    Text: CY7C1460AV33 CY7C1462AV33 36-Mbit 1 M x 36/2 M × 18 Pipelined SRAM with NoBL Architecture 36-Mbit (1 M × 36/2 M × 18) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT ■


    Original     		PDF CY7C1460AV33 CY7C1462AV33 36-Mbit CY7C1460AV33/CY7C1462AV33

    Untitled

    Abstract: No abstract text available
    Text: CY7C1381D, CY7C1381F CY7C1383D, CY7C1383F 18-Mbit 512 K x 36/1 M × 18 Flow-Through SRAM 18-Mbit (512 K × 36/1 M × 18) Flow Through SRAM Features Functional Description • Supports 133 MHz bus operations ■ 512 K × 36 and 1 M × 18 common I/O ■ 3.3 V core power supply (VDD)


    Original     		PDF CY7C1381D, CY7C1381F CY7C1383D, CY7C1383F 18-Mbit CY7C1381D/CY7C1381F/CY7C1383D/CY7C1383F

    CY7C1363C-133AJXI

    Abstract: No abstract text available
    Text: CY7C1361C, CY7C1363C 9-Mbit 256 K x 36/512 K × 18 Flow-Through SRAM 9-Mbit (256 K × 36/512 K × 18) Flow-through SRAM Features Functional Description • Supports 100 MHz, 133 MHz bus operations ■ Supports 100 MHz bus operations (Automotive) ■ 256 K × 36/512 K × 18 common I/O


    Original     		PDF CY7C1361C, CY7C1363C CY7C1361C/CY7C1363C CY7C1363C-133AJXI

    AN54908

    Abstract: CY7C1327G
    Text: CY7C1327G 4-Mbit 256 K x 18 Pipelined Sync SRAM 4-Mbit (256 K × 18) Pipelined Sync SRAM Features Functional Description The CY7C1327G SRAM[1] integrates 256 K × 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are


    Original     		PDF CY7C1327G CY7C1327G AN54908

    CY7C1325G

    Abstract: CY7C1325G-133AXC
    Text: CY7C1325G 4-Mbit 256 K x 18 Flow through Sync SRAM 4-Mbit (256 K × 18) Flow through Sync SRAM Features Functional Description • 256 K × 18 common I/O ■ 3.3 V core power supply (VDD) ■ 2.5 V or 3.3 V I/O power supply (VDDQ) ■ Fast clock-to-output times


    Original     		PDF CY7C1325G CY7C1325G CY7C1325G-133AXC

    Untitled

    Abstract: No abstract text available
    Text: CY7C68013A, CY7C68014A CY7C68015A, CY7C68016A EZ-USB FX2LP USB Microcontroller High-Speed USB Peripheral Controller EZ-USB FX2LP™ USB Microcontroller High Speed USB Peripheral Controller Features • USB 2.0 USB IF high speed certified TID # 40460272


    Original     		PDF CY7C68013A, CY7C68014A CY7C68015A, CY7C68016A

    cy7c1470v25

    Abstract: No abstract text available
    Text: CY7C1470V25 CY7C1472V25 CY7C1474V25 72-Mbit 2 M x 36/4 M × 18/1 M × 72 Pipelined SRAM with NoBL Architecture 72-Mbit (2 M × 36/4 M × 18/1 M × 72) Pipelined SRAM with NoBLTM Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™


    Original     		PDF CY7C1470V25 CY7C1472V25 CY7C1474V25 72-Mbit CY7C1470V25/CY7C1472V25/CY7C1474V25

    Untitled

    Abstract: No abstract text available
    Text: CY7C1381D CY7C1383D CY7C1383F 18-Mbit 512 K x 36/1 M × 18 Flow-Through SRAM 18-Mbit (512 K × 36/1 M × 18) Flow Through SRAM Features Functional Description • Supports 133 MHz bus operations ■ 512 K × 36 and 1 M × 18 common I/O ■ 3.3 V core power supply (VDD)


    Original     		PDF CY7C1381D CY7C1383D CY7C1383F 18-Mbit CY7C1381D/CY7C1383D/CY7C1383F