AS7C33128NTD18B Search Results

AS7C33128NTD18B Datasheets (13)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
AS7C33128NTD18B		Alliance Semiconductor	NTD Sync SRAM - 3.3V		Original	PDF
AS7C33128NTD18B-133TQC		Alliance Semiconductor	3.3V 128K x 18 Pipelined SRAM with NTD		Original	PDF
AS7C33128NTD18B-133TQCN		Alliance Semiconductor	3.3V 128K x 18 Pipelined SRAM with NTD		Original	PDF
AS7C33128NTD18B-133TQI		Alliance Semiconductor	3.3V 128K x 18 Pipelined SRAM with NTD		Original	PDF
AS7C33128NTD18B-133TQIN		Alliance Semiconductor	3.3V 128K x 18 Pipelined SRAM with NTD		Original	PDF
AS7C33128NTD18B-166TQC		Alliance Semiconductor	3.3V 128K x 18 Pipelined SRAM with NTD		Original	PDF
AS7C33128NTD18B-166TQCN		Alliance Semiconductor	3.3V 128K x 18 Pipelined SRAM with NTD		Original	PDF
AS7C33128NTD18B-166TQI		Alliance Semiconductor	3.3V 128K x 18 Pipelined SRAM with NTD		Original	PDF
AS7C33128NTD18B-166TQIN		Alliance Semiconductor	3.3V 128K x 18 Pipelined SRAM with NTD		Original	PDF
AS7C33128NTD18B-200TQC		Alliance Semiconductor	3.3V 128K x 18 Pipelined SRAM with NTD		Original	PDF
AS7C33128NTD18B-200TQCN		Alliance Semiconductor	3.3V 128K x 18 Pipelined SRAM with NTD		Original	PDF
AS7C33128NTD18B-200TQI		Alliance Semiconductor	3.3V 128K x 18 Pipelined SRAM with NTD		Original	PDF
AS7C33128NTD18B-200TQIN		Alliance Semiconductor	3.3V 128K x 18 Pipelined SRAM with NTD		Original	PDF

AS7C33128NTD18B Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
64KX32 Abstract: AS7C33128NTD18B AS7C33128PFD18B AS7C33128PFS18B Text: April 2005 AS7C33128NTD18B 3.3V 128Kx18 Pipelined SRAM with NTDTM Features • Organization: 131,072 words × 18 bits • NTD architecture for efficient bus operation • Fast clock speeds to 200 MHz • Fast clock to data access: 3.0/3.5/4.0 ns • Fast OE access time: 3.0/3.5/4.0 ns	Original	AS7C33128NTD18B 100-pin 64KX32 AS7C33128NTD18B AS7C33128PFD18B AS7C33128PFS18B	PDF
Untitled Abstract: No abstract text available Text: AS7C33128PFD18B May 2004 3.3V 128K x 18 pipeline burst synchronous SRAM Features • • • • • • • • • • • • • • • • Organization: 131,072 words × 18 bits Fast clock speeds to 166 MHz in LVTTL/LVCMOS Fast clock to data access: 3.5/4.0 ns	Original	AS7C33128PFD18B AS7C33128PFS18B) 100-pin	PDF
64KX32 Abstract: AS7C33128NTF18B AS7C33128PFD18B AS7C33128PFS18B Text: April 2005 AS7C33128NTF18B 3.3V 128K x 18 Flowthrough Synchronous SRAM with NTDTM Features • • • • • • • • • • • • • • • • Organization: 131,072 words x 18 bits NTD architecture for efficient bus operation Fast clock to data access: 7.5/8.0/10.0 ns	Original	AS7C33128NTF18B 100-pin 64KX32 AS7C33128NTF18B AS7C33128PFD18B AS7C33128PFS18B	PDF
Untitled Abstract: No abstract text available Text: AS7C33128PFS18B February 2004 3.3V 128K x 18 pipeline burst synchronous SRAM Features • • • • • • • Organization: 131,072 words × 18 bits Fast clock speeds to 166 MHz in LVTTL/LVCMOS Fast clock to data access: 3.5/4.0 ns Fast OE access time: 3.5/4.0 ns	Original	AS7C33128PFS18B 100-pin AS7C33128PFD18B)	PDF
Untitled Abstract: No abstract text available Text: AS7C33128PFS16B AS7C33128PFS18B October 2003 3.3V 128K x 16/18 pipeline burst synchronous SRAM Features •Byte write enables •Multiple chip enables for easy expansion •3.3V core power supply •2.5V or 3.3V I/O operation with separate VDDQ •30 mW typical standby power in power down mode	Original	AS7C33128PFS16B AS7C33128PFS18B 100-pin AS7C33128PFD16B/ AS7C33128PFD18B)	PDF
64KX32 Abstract: AS7C33128PFD18B AS7C33128PFS18B 64K32 Text: April 2005 AS7C3364NTD32B AS7C3364NTD36B 3.3V 64Kx32/36 Pipelined SRAM with NTDTM Features • Clock enable for operation hold • Multiple chip enables for easy expansion • 3.3V core power supply • 2.5V or 3.3V I/O operation with separate VDDQ • Self-timed write cycles	Original	AS7C3364NTD32B AS7C3364NTD36B 100-pin 64KX32 AS7C33128PFD18B AS7C33128PFS18B 64K32	PDF
64KX32 Abstract: AS7C33128PFD18B AS7C33128PFS18B Text: April 2005 AS7C3364NTF32B AS7C3364NTF36B 3.3V 64K x 32/36 Flowthrough Synchronous SRAM with NTDTM Features • • • • • • • • • • • • • • • • Organization: 65,536 words × 32 or 36 bits NTD architecture for efficient bus operation	Original	AS7C3364NTF32B AS7C3364NTF36B 100-pin 64KX32 AS7C33128PFD18B AS7C33128PFS18B	PDF