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Abstract: No abstract text available
Text: DATA SHEET MOS INTEGRATED CIRCUIT µPD98404 ADVANCED ATM SONET FRAMER DESCRIPTION The µPD98404 NEASCOT-P30TM is an LSI for ATM applications, which can be used in ATM adapter boards for connecting PCs or workstations to an ATM network and can also be used in ATM hubs and ATM switches. This LSI
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PD98404
PD98404
NEASCOT-P30TM
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Untitled
Abstract: No abstract text available
Text: DATA SHEET MOS INTEGRATED CIRCUIT µPD98404 ADVANCED ATM SONET FRAMER The µPD98404 NEASCOT-P30 is an LSI for ATM applications, which can be used in ATM adapter boards for connecting PCs or workstations to an ATM network and can also be used in ATM hubs and ATM switches. This LSI
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PD98404
PD98404
NEASCOT-P30
155-Mbps
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Untitled
Abstract: No abstract text available
Text: DATA SHEET MOS INTEGRATED CIRCUIT µPD98404 ADVANCED ATM SONET FRAMER DESCRIPTION The µPD98404 NEASCOT-P30 TM is an LSI for ATM applications, which can be used in ATM adapter boards for connecting PCs or workstations to an ATM network and can also be used in ATM hubs and ATM switches. This LSI
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PD98404
PD98404
NEASCOT-P30
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Untitled
Abstract: No abstract text available
Text: DATA SHEET MOS INTEGRATED CIRCUIT µPD98404 ADVANCED ATM SONET FRAMER DESCRIPTION The µPD98404 NEASCOT-P30 TM is an LSI for ATM applications, which can be used in ATM adapter boards for connecting PCs or workstations to an ATM network and can also be used in ATM hubs and ATM switches. This LSI
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PD98404
PD98404
NEASCOT-P30
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ic 313
Abstract: S3043 S3044
Text: DATA SHEET MOS INTEGRATED CIRCUIT µPD98414 2.4 Gbps ATM SONET FRAMER The µPD98414 NEASCOT-P70 is one of ATM LSIs and provides the functions of the TC sublayer of the SONET/SDH-base physical layer of the ATM protocol specified by the ATM Forum. Its main functions include a transmission function for mapping an ATM cell passed from a high-end ATM layer
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PD98414
NEASCOT-P70)
STS-48c/SDH
STM-16c
ic 313
S3043
S3044
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ic 313
Abstract: AC03 nec S3043 S3044 STM-16 A09 N03 IR202
Text: PRELIMINARY DATA SHEET MOS INTEGRATED CIRCUIT µPD98414 2.4G bps ATM SONET FRAMER The µPD98414 NEASCOT-P70 is one of ATM LSIs and provides the functions of the TC sublayer of the SONET/SDH-base physical layer of the ATM protocol specified by the ATM Forum.
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PD98414
NEASCOT-P70TM)
OC-48c/SDH
STM-16
ic 313
AC03 nec
S3043
S3044
A09 N03
IR202
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Untitled
Abstract: No abstract text available
Text: DATA SHEET MOS INTEGRATED CIRCUIT µPD98414 2.4 Gbps ATM SONET FRAMER The µPD98414 NEASCOT-P70 is one of ATM LSIs and provides the functions of the TC sublayer of the SONET/SDH-base physical layer of the ATM protocol specified by the ATM Forum. Its main functions include a transmission function for mapping an ATM cell passed from a high-end ATM layer
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PD98414
NEASCOT-P70ï
STS-48c/SDH
STM-16c
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S12736E
Abstract: MC10H350 UPD98411GN-MMU
Text: DATA SHEET MOS INTEGRATED CIRCUIT µPD98411 ATM QUAD SONET FRAMER The µPD98411 NEASCOT-P40 is one of ATM LSIs and provides the functions of the TC sublayer of the SONET/SDH-base physical layer of the ATM protocol specified by the ATM Forum. Its main functions include a
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PD98411
PD98411
NEASCOT-P40TM
155M-bps
NEASCOT-P40
S12736E
MC10H350
UPD98411GN-MMU
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MC10H350
Abstract: S12736E
Text: DATA SHEET MOS INTEGRATED CIRCUIT µPD98411 ATM QUAD SONET FRAMER The µPD98411 NEASCOT-P40 is one of ATM LSIs and provides the functions of the TC sublayer of the SONET/SDH-base physical layer of the ATM protocol specified by the ATM Forum. Its main functions include a
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PD98411
PD98411
NEASCOT-P40TM
155M-bps
NEASCOT-P40
MC10H350
S12736E
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S12736E
Abstract: MC10H350
Text: DATA SHEET MOS INTEGRATED CIRCUIT µPD98411 ATM QUAD SONET FRAMER The µPD98411 NEASCOT-P40 is one of ATM-LAN LSIs and provides the functions of the TC sublayer of the SONET/SDH-base physical layer of the ATM protocol specified by the ATM Forum. Its main functions include a
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PD98411
PD98411
NEASCOT-P40
155M-bps
S12953EJ4V0DS00
S12736E
MC10H350
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MC10H350
Abstract: S12736E
Text: DATA SHEET MOS INTEGRATED CIRCUIT µPD98411 ATM QUAD SONET FRAMER The µPD98411 NEASCOT-P40 is one of ATM-LAN LSIs and provides the functions of the TC sublayer of the SONET/SDH-base physical layer of the ATM protocol specified by the ATM Forum. Its main functions include a
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PD98411
PD98411
NEASCOT-P40
155M-bps
MC10H350
S12736E
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61535
Abstract: AN-523 rt022 arbiter decoder -1996 GFC01 "LCK"
Text: COBRA Device COnstant Bit Rate ATM Adaptation Layer 1 TXC-05427B DATA SHEET FEATURES DESCRIPTION COBRA COnstant Bit Rate ATM Adaptation Layer 1 is a four-channel VLSI device that implements all of the functions needed for circuit emulation over ATM. Both
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TXC-05427B
TXC-05427B-MB
61535
AN-523
rt022
arbiter decoder -1996
GFC01
"LCK"
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Cx2829
Abstract: ,national semiconductor Linear brief lb-3
Text: CX28250 ATM Physical Interface PHY Devices The CX28250 is an ATM-SONET Physical Layer (PHY) device with an integrated, PLL clock and data recovery (CDR) circuit. This device has optimized SONET framer functions for mapping ATM cells to SONET payloads for edge switch applications, and
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CX28250
53-byte
28250-DSH-002-A
CX28250
Cx2829
,national semiconductor Linear brief lb-3
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CRC-10
Abstract: PD98401AGD-MML
Text: DATA SHEET MOS INTEGRATED CIRCUIT µPD98401A ATM SAR CHIP DESCRIPTION The µPD98401A NEASCOT-S15TM is a high-performance SAR chip that segments and reassembles ATM cells. This chip can interface with an ATM network when it is included in a workstation, computer, front-end processor,
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PD98401A
NEASCOT-S15TM)
PD98401A
PD98401,
S12054E
CRC-10
PD98401AGD-MML
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CRC-10
Abstract: PD98401AGD-MML
Text: DATA SHEET MOS INTEGRATED CIRCUIT µPD98401A ATM SAR CHIP DESCRIPTION The µPD98401A NEASCOT-S15TM is a high-performance SAR chip that segments and reassembles ATM cells. This chip can interface with an ATM network when it is included in a workstation, computer, front-end processor,
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PD98401A
NEASCOT-S15TM)
PD98401A
PD98401,
S12054E
CRC-10
PD98401AGD-MML
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CRC-10
Abstract: PD98401AGD-MML
Text: DATA SHEET MOS INTEGRATED CIRCUIT µPD98401A ATM SAR CHIP DESCRIPTION The µPD98401A NEASCOT-S15TM is a high-performance SAR chip that segments and reassembles ATM cells. This chip can interface with an ATM network when it is included in a workstation, computer, front-end processor,
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PD98401A
NEASCOT-S15TM)
PD98401A
PD98401,
S12054E
CRC-10
PD98401AGD-MML
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Cx2829
Abstract: TXC24 0x46-RXLIN "network interface cards" Trec Part Numbering System GR
Text: CX28250 ATM Physical Interface PHY Devices The CX28250 is an ATM-SONET Physical Layer (PHY) device with an integrated, PLL clock and data recovery (CDR) circuit. This device has optimized SONET framer functions for mapping ATM cells to SONET payloads for edge switch applications, and
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CX28250
53-byte
CX28250
500035D
Cx2829
TXC24
0x46-RXLIN
"network interface cards"
Trec Part Numbering System GR
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B56A
Abstract: Cx2829 J311 B21AD
Text: CX28250 ATM Physical Interface PHY Devices The CX28250 is an ATM-SONET Physical Layer (PHY) device with an integrated, PLL clock and data recovery (CDR) circuit. This device has optimized SONET framer functions for mapping ATM cells to SONET payloads for edge switch applications, and
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CX28250
53-byte
28250-DSH-002-B
CX28250
B56A
Cx2829
J311
B21AD
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CX2829
Abstract: J119 J512 A1020 transistor a1633 d705 led CX28250-23 CX28250-26 GR-253-CORE 24V to 15V REGULATOR IC
Text: CX28250 ATM Physical Interface PHY Devices The CX28250 is an ATM-SONET Physical Layer (PHY) device with an integrated, PLL clock and data recovery (CDR) circuit. This device has optimized SONET framer functions for mapping ATM cells to SONET payloads for edge switch applications, and
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CX28250
CX28250
53-byte
TXZ02
28250-DSH-002-A
CX2829
J119
J512
A1020 transistor
a1633
d705 led
CX28250-23
CX28250-26
GR-253-CORE
24V to 15V REGULATOR IC
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Untitled
Abstract: No abstract text available
Text: DATA SHEET MOS INTEGRATED CIRCUIT µPD98402A LOCAL ATM SONET FRAMER The µPD98402A is one of the ATM-LAN LSIs and incorporates the TC sublayer function in the SONET/SDHbased physical layer of the ATM protocol. The main functions of the µPD98402A include a transmit function for
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PD98402A
PD98402A
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WR22
Abstract: RT046
Text: COBRA Device COnstant Bit Rate ATM Adaptation Layer 1 TXC-05427C FEATURES DESCRIPTION • Four-channel AAL1 segmentation and reassembly COBRA COnstant Bit Rate ATM Adaptation Layer 1 is a four-channel VLSI device that implements all of the functions needed for circuit emulation over ATM. Both
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TXC-05427C
TXC-05427C-MB
WR22
RT046
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UPD98402
Abstract: ir35-203-2
Text: DATA SHEET MOS INTEGRATED CIRCUIT µPD98402A LOCAL ATM SONET FRAMER The µPD98402A is one of the ATM-LAN LSIs and incorporates the TC sublayer function in the SONET/SDHbased physical layer of the ATM protocol. The main functions of the µPD98402A include a transmit function for
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PD98402A
PD98402A
UPD98402
ir35-203-2
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rt043
Abstract: VCI07
Text: COBRA Device COnstant Bit Rate ATM Adaptation Layer 1 TXC-05427C FEATURES DESCRIPTION • Four-channel AAL1 segmentation and reassembly COBRA COnstant Bit Rate ATM Adaptation Layer 1 is a four-channel VLSI device that implements all of the functions needed for circuit emulation over ATM. Both
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TXC-05427C
rt043
VCI07
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Untitled
Abstract: No abstract text available
Text: COBRA Device Constant Bit Rate ATM Adaptation Layer 1 TXC-05427B DATA SHEET FEATURES = nFsrm PTinN — - = COBRA C onstant Bit Bate ATM Adaptation Layer 1 is a four-channel VLSI device that implements all of the functions needed for circuit emulation over ATM. Both
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TXC-05427B
TXC-05427B-MB
1DD41S2
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