atmel AT28C512
Abstract: AT28C512 Figaro application note AT28C256 AT40K AT40K05 AT40K10 AT40K20 AT40K40 bitstream
Text: AT40K Check Function on Configuration Description The AT40K family supports a check function in mode 2 configuration SRAM data a write verify . This is accomplished by normally initiating a configuration download while driving CHECK low. Instead of writing the contents of the bitstream to the memory, the contents of the memory are read and compared to the bitstream on a byte-bybyte basis in the configuration logic. Any differences are reported by driving the INIT
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Original
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AT40K
04/01/xM
atmel AT28C512
AT28C512
Figaro application note
AT28C256
AT40K05
AT40K10
AT40K20
AT40K40
bitstream
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PDF
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atmel AT28C512
Abstract: AT17C010 AT17C128 AT17C256 AT17C512 AT17C65 AT40K AT40K05 AT40K10 AT40K20
Text: AT40K Series Configuration Configuration is the process by which a design is loaded into an AT40K series field programmable gate array FPGA . AT40K series devices are SRAM based and can be configured any number of times. The entire device or select portions can be configured. Sections can be configured while others continue to operate undisturbed. Full
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Original
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AT40K
1009B
atmel AT28C512
AT17C010
AT17C128
AT17C256
AT17C512
AT17C65
AT40K05
AT40K10
AT40K20
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PDF
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atmel AT28C512
Abstract: AT28C512 AT40K20 AT17C010 AT17C128 AT17C256 AT17C512 AT40K AT40K05 AT40K10
Text: AT40K Series Configuration Configuration is the process by which a design is loaded into an AT40K series field programmable gate array FPGA . AT40K series devices are SRAM based and can be configured any number of times. The entire device or select portions can be configured. Sections can be
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Original
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AT40K
01/99/xM
atmel AT28C512
AT28C512
AT40K20
AT17C010
AT17C128
AT17C256
AT17C512
AT40K05
AT40K10
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PDF
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