25e5
Abstract: GR253-CORE GR-253 TMPR28051 VT13 GR-253 J0 byte length 14
Text: Advisory August 5, 1999 TMPR28051 STS-1/AU-3 STM-0 Mapper Device Advisory for Version 5 of the Device Register Architecture (RA) Map RA-1. Reset Bit The software reset bit (bit 0) of register 0x00 is not functional. RA-2. Transmit Path AIS Insert Bit The TXPAISINS bit (bit 5) of register 0x01 produces both AIS-P and AIS-L.
|
Original
|
TMPR28051
DS99-068SONT
DS98-100TIC)
25e5
GR253-CORE
GR-253
VT13
GR-253 J0 byte length 14
|
PDF
|
GR-253
Abstract: TMPR28051
Text: Advisory August 5, 1999 TMPR28051 STS-1/AU-3 STM-0 Mapper Device Advisory for Version 5 of the Device Register Architecture (RA) Map RA-1. Reset Bit The software reset bit (bit 0) of register 0x00 is not functional. RA-2. Transmit Path AIS Insert Bit The TXPAISINS bit (bit 5) of register 0x01 produces both AIS-P and AIS-L.
|
Original
|
TMPR28051
DS02-245BBAC
DS99-068SONT)
GR-253
|
PDF
|
OC139
Abstract: No abstract text available
Text: Data Sheet March 1997 microelectronics group Lucent Technologies Bell Labs Innovations TMPR28051 STS-1/AU-3 Mapper Features Configurable TU-12 slot selection for E1 drop Overall Device: Detects AU-3 loss of H4 multiframe, AIS-P, and RDI-P • PLL-free receive operation when used with Lucent
|
OCR Scan
|
TMPR28051
T7690
insert734
DS97-211TIC
DS97-114TIC)
OC139
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Data Sheet March 1997 microelectronics group Lucent Technologies Bell Labs Innovations TMPR28051 STS-1/AU-3 Mapper Features Configurable TU-12 slot selection for E1 drop Overall Device: Detects AU-3 loss of H4 multiframe, AIS-P, and RDI-P • PLL-free receive operation when used with Lucent
|
OCR Scan
|
TMPR28051
TU-12
T7690
TU-12
|
PDF
|
GR-253
Abstract: T7690 TMPR28051 co-toc BIP 109 S3685 DS15LB
Text: Data Sheet March 1997 mi c r o e l e c t r o n i c s group Lucent Technologies Bell Labs Innovations TMPR28051 S TS-1/A U -3 M apper Features • Configurable TU-12 slot selection for E1 drop Overall Device: ■ Detects AU-3 loss of H4 multiframe, AIS-P, and
|
OCR Scan
|
TMPR28051
T7690
005002b
002Mfl2b
GR-253
co-toc
BIP 109
S3685
DS15LB
|
PDF
|
Untitled
Abstract: No abstract text available
Text: tm ah PHAST-3N Device S w it c h STM-1/STS-3/STS-3C SDH/SONET Overhead Terminator TXC-06103 -X FEATURES DESCRIPTION • Serial SDH/SONET line interface - Pseudo-ECL interface with clock recovery and synthesis • Parallel SDH/SONET line interface
|
OCR Scan
|
TXC-06103
64-byte
TXC-04001B
TXC-04252,
TU-12s)
TXC-04002B
PREVIEWTXC-06Ã
03-MA
|
PDF
|
Untitled
Abstract: No abstract text available
Text: OmniBER OTN 10G J7230A communications performance analyzer Technical specifications Effective 1st March 2003 G.709 Table of Contents Introduction . 4
|
Original
|
J7230A
5988-3653EN
|
PDF
|
GR-1230
Abstract: No abstract text available
Text: XPI Solutions for Optical/Transmission Communications Test Equipment Data Sheet J2126A/J2127A Transmission Test Sets A family of field portable transmission test sets for applications to 10Gb/s SONET: OC-192, OC-48, OC-12, OC-3, OC-1, STS-3, STS-1 SDH: STM-64, STM-16, STM-4, STM-1, STM-0
|
Original
|
J2126A/J2127A
10Gb/s
OC-192,
OC-48,
OC-12,
STM-64,
STM-16,
34Mb/s,
140Mb/s
10BASE-T,
GR-1230
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Agilent Technologies OmniBER OTN Communications Performance Analyzers J7232A & J7230B Technical Data Sheet Powerful SONET/SDH testers, ideal for testing next generation SONET/ SDH devices and modules. OmniBER OTN Communications Performance Analyzers Key Features
|
Original
|
J7232A
J7230B
256ms
|
PDF
|
PM5320-NI
Abstract: iso 3309 TA-TSY-000191 G-747
Text: us t, 20 04 09 :3 3: 07 PM ARROW 155 ASSP Telecom Standard Product Data Sheet Released es da y, 10 Au g PM5320 gi es , In c. on Tu ARROW 155 Released Issue No. 2: July 2004 Do wn lo ad ed by Sc o tt E st es of i 2T ec h no lo ASSP Telecom Standard Product Data
|
Original
|
PMC-2031159,
PM5320
196-pin
PM5320-NI
PM5320-NI
iso 3309
TA-TSY-000191
G-747
|
PDF
|
jat52
Abstract: TA-TSY-000191 PM5319 PM5319-NI PMC-2030860
Text: us t, 20 04 09 :2 1: 24 PM ARROW 622 ASSP Telecom Standard Product Data Sheet Released es da y, 10 Au g PM5319 gi es , In c. on Tu ARROW 622 Released Issue No. 2: July 2004 Do wn lo ad ed by Sc o tt E st es of i 2T ec h no lo ASSP Telecom Standard Product Data Sheet
|
Original
|
PMC-2031158,
PM5319
196-pin
PM5319-NI
jat52
TA-TSY-000191
PM5319
PM5319-NI
PMC-2030860
|
PDF
|
Untitled
Abstract: No abstract text available
Text: 6: 07 AM ARROW 12xETEC ASSP Telecom Standard Product Data Sheet Released us t, 20 04 11 :1 PM5385 Tu es da y, 03 Au g ARROW 12xETEC Data Sheet Released Issue No. 4: April 2004 Do wn lo ad ed by Sa nj iv Sh ar m ao fR SB SY ST EM S on Twelve channel E3/T3/STS-1E EC-1
|
Original
|
12xETEC
PM5385
12xETEC
PMC-2030120,
|
PDF
|
Untitled
Abstract: No abstract text available
Text: POP-3 Device tm ah S w it c h x - 5 STM-1/STS-3/STS-3C SDH/SONET POH Terminator with Telecom Bus Interface TXC-06303 TECHNICAL OVERVIEW PRODUCT PREVIEW FEATURES DESCRIPTION • The TranSwitch POP-3 TXC-06303 is an STM -1/S TS 3/S T S -3c path overhead processing device that provides a
|
OCR Scan
|
TXC-06303
TXC-06303)
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Agilent Technologies OmniBER OTN Jitter Analyzer J7231B Technical Data Sheet Accurate, repeatable jitter measurements for SONET/SDH/OTN interfaces. OmniBER OTN Jitter Key Features • Fully complies and exceeds the requirements of ITU-T O.172 for SONET/SDH Jitter generation &
|
Original
|
J7231B
10Gb/s,
|
PDF
|
|
|
9718h
Abstract: 11973H VC12 LEVEL ONE COMMUNICATIONS SXT6051 SXT framer HT 648 Decoder Rx 9802h
Text: DATA SHEET MAY 1998 Revision 1.1 SXT6051 STM-1/0 SDH Overhead Terminator General Description Features The SXT6051 Overhead Terminator implements the Regenerator Section Termination, Multiplexer Section Termination and Higher Order Path Termination in STM-0
|
Original
|
SXT6051
SXT6051
51Mb/s)
155mB/s)
SXT6251
9718h
11973H
VC12
LEVEL ONE COMMUNICATIONS
SXT framer
HT 648 Decoder Rx
9802h
|
PDF
|
AU-AIS
Abstract: Digital Alarm Clock by using ttl LXT e2 LXT6251A marking cod A2 regenerator in optical D4D12 LXT6051 LXT6051QE SSI 7200
Text: LXT6051 STM-1/0 SDH Overhead Terminator Datasheet The LXT6051 Overhead Terminator implements the Regenerator Section Termination, Multiplexer Section Termination and Higher Order Path Termination in STM-0 51Mb/s and STM-1 (155Mb/s) multiplexers. It provides micro-controller access for performance monitoring,
|
Original
|
LXT6051
LXT6051
51Mb/s)
155Mb/s)
LXT6251A
AU-AIS
Digital Alarm Clock by using ttl
LXT e2
LXT6251A
marking cod A2
regenerator in optical
D4D12
LXT6051QE
SSI 7200
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Datasheet JUNE 1999 Revision 2.0 LXT6051 STM-170 SDH Overhead Terminator General Description The LXT6051 Overhead Terminator implements the Regenerator Section Termination, Multiplexer Section Termination and Higher Order Path Termination in STM-0 51Mb/s and STM-1 (155Mb/s) multiplexers. It provides
|
OCR Scan
|
LXT6051
STM-170
LXT6051
51Mb/s)
155Mb/s)
LXT6251
|
PDF
|
ALY SMD
Abstract: PVC AM22 density PVC AM3 W23 ABIT AL8 Series SMD MARKING CODE ALY gu 81 y2 smd code smd marking STPA STM-16 LIU SMD ALY
Text: :50 AM SUNI-12xJET ASSP Telecom Standard Product Data Sheet Preliminary gu on da y, 12 Au S/UNI-12xJET st, 20 02 04 :20 PM5383 Data Sheet Preliminary Issue No. 2: July 2002 Do wn loa de d by ah m ed me tw aly of sil ico ne xp er to nM Saturn User Network Interface Device
|
Original
|
SUNI-12xJET
S/UNI-12xJET
PM5383
PMC-2010376,
ALY SMD
PVC AM22 density
PVC AM3 W23
ABIT AL8 Series
SMD MARKING CODE ALY
gu 81
y2 smd code
smd marking STPA
STM-16 LIU
SMD ALY
|
PDF
|
TE19M
Abstract: i80C186 T4240 PXB43202
Text: ICs for Communications Synchronous Digital Hierarchy Transceiver SDHT PXB 4240 Version 1.2 Preliminary Data Sheet 10.96 T4240-XV12-P1-7600 Edition 10.96 This edition was realized using the software system FrameMaker. Published by Siemens AG, Bereich Halbleiter, MarketingKommunikation, Balanstraße 73,
|
Original
|
T4240-XV12-P1-7600
TE19M
i80C186
T4240
PXB43202
|
PDF
|
k1r smd
Abstract: PXB43202 T4240-XV12-P1-7600 T4240
Text: ICs for Communications Synchronous Digital Hierarchy Transceiver SDHT PXB 4240 Version 1.2 Preliminary Data Sheet 10.96 T4240-XV12-P1-7600 Edition 10.96 This edition was realized using the software system FrameMaker. Published by Siemens AG, Bereich Halbleiter, MarketingKommunikation, Balanstraße 73,
|
Original
|
T4240-XV12-P1-7600
k1r smd
PXB43202
T4240-XV12-P1-7600
T4240
|
PDF
|
672l
Abstract: DCC-13 TXC-06965 GR-1230
Text: PHAST -48V Device DATA SHEET PRODUCT PREVIEW DESCRIPTION FEATURES The PHAST®-48V is a highly integrated, versatile, linearly-scalable device that implements a strictly non-blocking full availability cross connect switch and framing/mapping/pointer processing from the TU11/VT1.5 level through VC4-16c/STS-48c. The PHAST-48V can be
|
Original
|
STM-16/OC-48
TXC-06965
STM16/STS-48
STM-16/STS-48
VC-4-16c
STS-12c
STS-48c
TXC-06965-MB,
672l
DCC-13
GR-1230
|
PDF
|
Untitled
Abstract: No abstract text available
Text: PM PM5344 a a i a PMC-Sierra, Inc. FEATURES Monolithic SONET/SDH Path overhead Terminating Transceiver for use in STS-1, STS-3 or STM-1 applications, operating at rates up to 155.52 Mbit/s. Maps one or three STS-1 AU3 payloads or a single STS-3c (AU4) payload to the system timing refer
|
OCR Scan
|
PM5344
tranSTS-12/STM-4
STS-12
PMC-940309
|
PDF
|
BIP 109
Abstract: No abstract text available
Text: TOSHIBA Quad Physical Layer Controller 1 9 9 7 T C 3 5 8 2 3 F P R E L I M I N A R Y R E V I S I O N D A T A TOSHIBA AMERICA ELECTRONIC COMPONENTS, I NC 0. 4 B O O K 199 7 Toshiba Am erica Electronic Com ponents, Inc. Published in O ctober, 199 7 T o s h ib a p ro d u c ts d e s c rib e d in th is d o c u m e n t a re n o t a u th o riz e d fo r use as c ritic a l c o m p o n e n ts in life s u p p o rt s y s te m s w ith o u t th e w ritte n c o n s e n t o f th e a p p ro p ria te o ffic e r o f T o s h ib a
|
OCR Scan
|
P31861097
BIP 109
|
PDF
|
DTC24
Abstract: AU-AIS MTC27 vc-4 digital cross connect 226 35K 2x4 TTL demultiplexer Digital Alarm Clock by ttl Digital Alarm Clock by using ttl P03H GR-253-CORE
Text: IXF6151 28 T1/E1 Mapper Datasheet The IXF6151 28 T1/E1 Mapper performs asynchronous mapping and demapping of 28 T1 and/ or E1 PDH signals into SDH or SONET. The PDH side interfaces with T1/E1 LIUs and framers via NRZ Clock and Data, while the SDH/ SONET side uses a standard Telecom bus interface.
|
Original
|
IXF6151
IXF6151
LXT6051
51Mb/s
155Mb/s
GR-253-CORE.
DTC24
AU-AIS
MTC27
vc-4 digital cross connect
226 35K
2x4 TTL demultiplexer
Digital Alarm Clock by ttl
Digital Alarm Clock by using ttl
P03H
GR-253-CORE
|
PDF
|
