Dose
Abstract: No abstract text available
Text: Standard Products UT82CRH51A USART Preliminary Data Sheet December 9, 1999 FEATURES INTRODUCTION q Synchronous and asynchronous operation q Synchronous 5-8 bit characters; internal or external character synchronization; automatic synchronization insertion
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UT82CRH51A
MIL-STD-883
MIL-PRF-38535.
XLN-589
MIL-STD-1835.
36-pin
MILPRF-38535.
68-pin
Dose
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HDMI to scart converter
Abstract: single chip converter for HDMI to cvbs ic W9864G6PH-7 k4H561638J-LCB3 single chip converter for HDMI to cvbs VGA to HDMI converter ic ADV7842 HDMI to dp converter ic H5DU1262GTR-E3C hdmi rx cvbs rgb 1080p BGA 256
Text: Dual HDMI Fast Switching Receiver with 12-Bit, 170 MHz Video and Graphics Digitizer and 3D Comb Filter Decoder ADV7842 Vertical peaking and horizontal peaking filters Robust synchronization extraction for poor video source Advanced VBI data slicer General
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12-Bit,
ADV7842
256-ball,
1080p
sYCC601,
36-/30-bit
24-bit
ADV7842KBCZ-5
ADV7842KBCZ-5P
ADV7842
HDMI to scart converter
single chip converter for HDMI to cvbs ic
W9864G6PH-7
k4H561638J-LCB3
single chip converter for HDMI to cvbs
VGA to HDMI converter ic
HDMI to dp converter ic
H5DU1262GTR-E3C
hdmi rx cvbs rgb 1080p BGA 256
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M8085
Abstract: No abstract text available
Text: M8251A PROGRAMMABLE COMMUNICATION INTERFACE Military • Synchronous and Asynchronous Operation ■ Synchronous 5-8 Bit Characters; Internal or External Character Synchronization; Automatic Sync Insertion ■ Asynchronous 5 -8 Bit Characters; Clock Rate—1,16, or 64 Times Baud
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M8251A
M82S1A
S310N
M8085
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TSOP35D25
Abstract: TSAL6200
Text: TSOP35D25 Vishay Semiconductors IR Receiver Modules for 3D Synchronization Signals FEATURES • Center frequency at 25 kHz to reduce interference with IR remote control signals at 30 kHz to 56 kHz • Package can be used with IR emitters with wavelength 830 nm as well as standard 940 nm
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TSOP35D25
18-Jul-08
TSOP35D25
TSAL6200
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8251 microprocessor block diagram
Abstract: 8251 UNIVERSAL SYNCHRONOUS ASYNCHRONOUS RECEIVER operation of 8251 microprocessor 8251 microprocessor applications
Text: 8251A 8251A Programmable Communication Interface ÌAPX86 Family MILITARY INFORMATION DISTINCTIVE CHARACTERISTICS SMD/DESC qualified Synchronous and asynchronous operation Synchronous 5 - 8-bit characters; internal or external character synchronization; automatic sync insertion
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APX86
28-pin
J-941
16tcY6.
8251 microprocessor block diagram
8251 UNIVERSAL SYNCHRONOUS ASYNCHRONOUS RECEIVER
operation of 8251 microprocessor
8251 microprocessor applications
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TSHG8400
Abstract: TSOP35D25 10klux
Text: TSOP35D25 Vishay Semiconductors IR Receiver Modules for 3D Synchronization Signals FEATURES • Center frequency at 25 kHz to reduce interference with IR remote control signals at 30 kHz to 56 kHz • Package can be used with IR emitters with wavelength 830 nm as well as standard 940 nm
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TSOP35D25
2002/95/EC
11-Mar-11
TSHG8400
TSOP35D25
10klux
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HDB3 matlab
Abstract: block diagram prbs generator in matlab matlab pn sequence generator HP54502A
Text: DART Device Advanced E3/DS3 Receiver/Transmitter TXC-02030 FEATURES DESCRIPTION • Single LIU for E3 and DS3 The Dual-market Advanced E3/DS3 Receiver/Transmitter DART device performs the receive and transmit line interface functions required for transmission of E3
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TXC-02030
TXC-02030-MB
HDB3 matlab
block diagram prbs generator in matlab
matlab pn sequence generator
HP54502A
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prbs pattern generator
Abstract: 7seg5 XRT83VSH28 XRT83VSH28IB
Text: XRT83VSH28 PRELIMINARY 8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT AUGUST 2006 REV. P1.0.0 GENERAL DESCRIPTION The on-chip clock synthesizer generates an E1 clock reference. The XRT83VSH28 is a fully integrated 8-channel short-haul line interface unit LIU that operates from
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XRT83VSH28
XRT83VSH28
prbs pattern generator
7seg5
XRT83VSH28IB
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XRT83SL314
Abstract: XRT83SL314IB
Text: xr XRT83SL314 14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT MARCH 2005 REV. 1.0.1 GENERAL DESCRIPTION Additional features include RLOS, a 16-bit LCV counter for each channel, AIS, QRSS generation/ detection, Network Loop Code generation/detection, TAOS, DMO, and diagnostic loopback modes.
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XRT83SL314
14-CHANNEL
16-bit
XRT83SL314
14-channel
XRT83SL314IB
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k241
Abstract: No abstract text available
Text: 3. Custom Mode SGX52003-1.2 Introduction The Custom mode of the Stratix GX device includes the following features: • ■ ■ ■ ■ Serial data rate range from 500 Mbps to 3.1875 Gbps Input reference clock range from 25 to 650 MHz Parallel interface width of 8, 10, 16, or 20-bit support
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SGX52003-1
20-bit
8B/10B
10-bit,
16-bit,
k241
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LCV14
Abstract: LCV11 dmos6 XRT83SL216 XRT83SL216IB
Text: xr XRT83SL216 PRELIMINARY 16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT DECEMBER 2005 REV. P1.0.3 GENERAL DESCRIPTION APPLICATIONS The XRT83SL216 is a fully integrated 16-channel E1 short-haul LIU which optimizes system cost and performance by offering key design features. The
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XRT83SL216
16-CHANNEL
XRT83SL216
LCV14
LCV11
dmos6
XRT83SL216IB
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pin diagram of ic 7495 shift register
Abstract: No abstract text available
Text: Advance Data Sheet January 2000 TA16-Type 2.5 Gbits/s Translight Transponder with 16-Channel 155 Mbits/s Multiplexer/Demultiplexer Applications • Telecommunications: — Inter- and intraoffice SONET/SDH — Subscriber loop — Metropolitan area networks
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TA16-Type
16-Channel
OC-48/STM-16
16-bit
2000Lucent
DS99-306LWP-2
DS99-306LWP-1)
pin diagram of ic 7495 shift register
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1H-01
Abstract: XRT83VSH314 XRT83VSH314IB 75E11
Text: XRT83VSH314 14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT SEPTEMBER 2006 REV. 1.0.1 GENERAL DESCRIPTION for external timing 8kHz, 1.544Mhz, 2.048Mhz, nxT1/J1, nxE1 . The XRT83VSH314 is a fully integrated 14-channel short-haul line interface unit (LIU) that operates from
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XRT83VSH314
14-CHANNEL
544Mhz,
048Mhz,
XRT83VSH314
14-channel
1H-01
XRT83VSH314IB
75E11
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2.45 GHz single chip transmitter
Abstract: serdes transceiver 1999 ps-1250 f1
Text: Gigabit Ethernet SerDes Circuit with Differential PECL Clock Inputs HDMP-1637A SerDes Features • IEEE 802.3z Gigabit Ethernet Compatible, Supports 1250 MBd Gigabit Ethernet • Based on X3T11 “10 Bit Specification” • Low Power Consumption • 10 mm 64-pin PQFP Package
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HDMP-1637A
X3T11
64-pin
HDMP-1637A
HDMP-1637A.
5968-5119E
2.45 GHz single chip transmitter
serdes transceiver 1999
ps-1250 f1
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AM 770 DENSITY TRANSMITTER
Abstract: T12xx 8829C
Text: DEVICE SPECIFICATION SO N E T /SD H /AT M OC-12 T R AN SM ITTER AND RECEIVER FEATURES • Complies with ANSI, Bellcore, and ITU-T specifications • On-chip high-frequency PLL for clock generation and clock recovery • Supports 622.08 Mbit/s OC-12/STM-4
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OC-12
S3017/S3018
OC-12/STM-4)
S3017/S3018
SONETOC-12
w/DW0045-28
w/DW0045-29
AM 770 DENSITY TRANSMITTER
T12xx
8829C
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RGB888-to-YUV444
Abstract: gmZan1 C3020-DSR-01C gmzrx1 GM3020-H YUV444 schematic diagram dvi to composite 3020h EB422 Genesis Microchip osd
Text: DATA SHEET gm3020-NH/gm3020-H Sections in this document and all other related documentation that mention HDCP refer only to the gm3020-H HDCP-enabled chip. All other sections apply to both the gm3020-H chip and the gm3020-HN (non-HDCP) chip. C3020-DAT-01F
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gm3020-NH/gm3020-H
gm3020-H
gm3020-H
gm3020-HN
C3020-DAT-01F
gm3020-NH/gm3020-H
C3020-DAT00
gm3020-NH
RGB888-to-YUV444
gmZan1
C3020-DSR-01C
gmzrx1
YUV444
schematic diagram dvi to composite
3020h
EB422
Genesis Microchip osd
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Untitled
Abstract: No abstract text available
Text: W tin t H E W L E T T milHM P A C K A R D Fibre Channel Transceiver Chip Technical Data HDMP-1536 Transceiver HDMP-1546 Transceiver Features Description • ANSI X3.230-1994 Fibre Channel Com patible FC-0 • Supports Full Speed (1062.5 MBd) Fibre Channel
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HDMP-1536
HDMP-1546
10-Bit
HDMP-1536,
10x10
HDMP-1546,
14x14
HDMP-1536/46
HDMP-1536
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dmo 365 r
Abstract: dmo 365 isolation transformer TX15 xn03 xn06 850C XRT83VSH316 XRT83VSH316IB
Text: XRT83VSH316 PRELIMINARY 16-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT JULY 2007 REV. P1.0.3 GENERAL DESCRIPTION for external timing 8kHz, 1.544Mhz, 2.048Mhz, nxT1/J1, nxE1 . The XRT83VSH316 is a fully integrated 16-channel short-haul line interface unit (LIU) that operates from
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XRT83VSH316
16-CHANNEL
544Mhz,
048Mhz,
XRT83VSH316
16-channel
dmo 365 r
dmo 365
isolation transformer TX15
xn03
xn06
850C
XRT83VSH316IB
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circuit diagram of PPM transmitter and receiver
Abstract: 2TD12 S2052 S2052B S2052C K28-5 gigabit media converter 27 mhz transmitter and receiver report 1E121 clock multiplier TTL 60 duty cycle
Text: DEVICE SPECIFICATION S2052 S2052 FIBRE CHANNEL AND GIGABIT ETHERNET TRANSCEIVER BiCMOS PECL CLOCK FIBRE CHANNEL AND GENERATOR GIGABIT ETHERNET TRANSCEIVER FEATURES • Functionally compliant with ANSI X3T11 Fibre Channel physical and transmission protocol
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S2052
X3T11
10-bit
800mW
circuit diagram of PPM transmitter and receiver
2TD12
S2052
S2052B
S2052C
K28-5
gigabit media converter
27 mhz transmitter and receiver report
1E121
clock multiplier TTL 60 duty cycle
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SX1231
Abstract: No abstract text available
Text: SX1231 WIRELESS & SENSING PRODUCTS DATASHEET SX1231 Transceiver Low Power Integrated UHF Transceiver VR_DIG RC Oscillator Mixers RFIO RSSI AFC GND Division by 2, 4 or 6 VR_PA Tank Inductor Loop Filter PA_BOOST PA1&2 Frac-N PLL Synthesizer GENERAL DESCRIPTION
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SX1231
SX1231
100nA
16-MS
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dmo 365 r
Abstract: dmo 365
Text: XRT83VSH316 16-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT FEBRUARY 2009 REV. 1.0.1 GENERAL DESCRIPTION for external timing 8kHz, 1.544Mhz, 2.048Mhz, nxT1/J1, nxE1 . The XRT83VSH316 is a fully integrated 16-channel short-haul line interface unit (LIU) that operates from
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XRT83VSH316
16-CHANNEL
XRT83VSH316
dmo 365 r
dmo 365
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Untitled
Abstract: No abstract text available
Text: » M DEVICE SPECIFICATION C C FIBR E C H A N N E L AN D G IG A B IT ETH ER N ET TR AN SC EIVER FEATURES • • • • • • • • • • • • • • Functionally compliant with ANSI X3T11 Fibre Channel physical and transmission protocol standards and IEEE 802.3Z Gigabit Ethernet
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S2052
X3T11
10-bit
800mW
S2052
--30V
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EP20K1000E
Abstract: EP20K400E EP20K600E 10226-1A10VE ldvs connector altlvds_tx vhdl code for lvds driver vhdl code for lvds receiver
Text: Using LVDS in APEX 20KE Devices July 2001, ver. 1.1 Application Note 120 Introduction Because complex designs continually demand more bandwidth, designers need a high-performance solution that offers fast data transfer and low power consumption. To address this need, Altera has
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2258J
Abstract: open LVDS deserialization IP JB 2256
Text: PRELIMINARY SPECIFICATION > 4 M C SO N E T/SD H /A TM OC-48 1 :8 RECEIVER FEATURES • Micro-power Bipolar technology • Complies with ANSI, Bellcore, and ITU-T specifications • Supports 2.4 Gbps OC-48 • 8-bit LVDS data path • Compact 100 TQFP/TEP package
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S3042
OC-48
OC-48)
S3042
OC-48
2258J
open LVDS deserialization IP
JB 2256
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