baudrate
Abstract: TSEG11 brp1 C166 AP2925 EF08h 0x6f00
Text: Microcontrollers ApNote AP2925 CAN Baudrate Detection with Infineon CAN devices This paper describes two different methods to detect the CAN baudrate with Infineon CAN devices. These methods allow non-initialized CAN nodes to connect to a running CAN system, although the current baudrate is not known. Hereby the running CAN system is not
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AP2925
0F030H
0FF30H
004AFH;
baudrate
TSEG11
brp1
C166
AP2925
EF08h
0x6f00
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TSEG11
Abstract: C166 C166 INFINEON 004AFH
Text: Microcontrollers ApNote AP2925 CAN Baudrate Detection with Infineon CAN devices This paper describes two different methods to detect the CAN baudrate with Infineon CAN devices. These methods allow non-initialized CAN nodes to connect to a running CAN system, although the current baudrate is not known. Hereby the running CAN system is not
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AP2925
0F030H
0FF30H
004AFH;
TSEG11
C166
C166 INFINEON
004AFH
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82C900
Abstract: No abstract text available
Text: Product Brief The SAK 82C900 is a stand-alone CAN-controller con- taining two independently running Full-CAN nodes according to the V2.0 part B active CAN specification at a maximum baudrate of 1 Mbaud each. 32 independent message objects are available and can be assigned to both nodes. This product can
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82C900
82C900
B158-H7693-G1-X-7600
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3BNB
Abstract: 81C90 AP2923
Text: Microcontrollers ApNote AP2923 : Additional file AP292302.EXE available SAE 81C90/91 - CAN Bit Timing Calculation: CP_81C90.EXE This document describes how to install and to use the "CP_81C90.EXE" tool. "CP_81C90.EXE" facilitates the CAN Bit Timing Calculation for the SAE 81C90\91 by automatically proposing register configurations to reach a given bus baudrate.
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AP2923
AP292302
81C90/91
81C90
81C90\91
81C90/91
AP2923
3BNB
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baudrate
Abstract: AP3227 FDE1
Text: Microcontrollers ApNote AP3227 : Additional file AP322701.EXE available ASC Serial Interface Async. Baudrate Calculation with the Fractional Divider The Asynchronous/Synchronous Serial Interface of the 32-bit microcontrollers allows programming of the desired baudrate very precisely in asynchronous modes, depending on
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AP3227
AP322701
32-bit
AP3227
baudrate
FDE1
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AP2423
Abstract: No abstract text available
Text: Microcontrollers ApNote AP2423 : Additional file AP242301.EXE available New ASC Serial Interface Async. Baudrate Calculation with the Fractional Divider The new ASC Asynchronous/Synchronous Serial Interface allows programming of the desired baudrate very precisely in asynchronous modes, depending on the CPU clock rate.
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AP2423
AP242301
AP2423
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XC164CM
Abstract: XC164cs xc166 XC164D XC167CI P-TQFP-144-19 XC16x
Text: A p p l i c a t io n N o t e , V 1 . 1 , J a n u a ry 2 0 0 9 AP16092 X C 16 x CAN Bootstrap Loader M i cro c on tr oller s XC16x Revision History: 2009-01 V 1.1 Previous Version: V1.0, 2006-03 Page Subjects major changes since last revision 5 update for XC164CM
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AP16092
XC16x
XC164CM
XC16x
XC164CM=
0x0000;
MSGDRL10
MSGDRH10
0x1554;
XC164CM
XC164cs
xc166
XC164D
XC167CI
P-TQFP-144-19
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STM32F2
Abstract: RM0033 stm32f20 SMT32F AN3430 STM32F2xx reference manual STM32F217IGH6 SMT32F2 stm32f207igh6 stm32f20x
Text: AN3430 Application note How to achieve the lowest current consumption with STM32F2xx Introduction In embedded microcontroller applications, designers and developers have specific tasks to solve and their solutions are influenced by the resources that are available and the
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AN3430
STM32F2xx
STM32F2xx
STM32F2
RM0033
stm32f20
SMT32F
AN3430
STM32F2xx reference manual
STM32F217IGH6
SMT32F2
stm32f207igh6
stm32f20x
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167CR
Abstract: AP1641 C167CR siemens C167CR C167-CR quanta
Text: Microcontrollers ApNote AP1641 : Additional file AP164102.EXE available C167CR - CAN Bit Timing Calculation: CP_167CR.EXE This document describes how to install and to use the "CP_167CR.EXE" tool. "CP_167CR" facilitates the CAN Bit Timing Calculation for the C167CR by automatically proposing
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AP1641
AP164102
C167CR
167CR
167CR"
C167CR
AP1641
siemens C167CR
C167-CR
quanta
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ASC CAPACITOR SP
Abstract: oen 8613 20 108 046f C163 C165 C166 embedded dram control 127DH C163-24D C167 Bootstrap SYSCON
Text: C163-24D Target Specification Target Specification 1998-11-04 @ 17:44 Microcomputer Components 16-bit CMOS Single-chip Microcontroller with embedded DRAM C163-24D Target Specification About this document This document was created in Adobe FrameMaker 5.5 by George Lewbel at Siemens
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C163-24D
16-bit
100-pin
ASC CAPACITOR SP
oen 8613 20
108 046f
C163
C165
C166
embedded dram control
127DH
C167 Bootstrap SYSCON
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AMBA APB bus protocol
Abstract: structural design of a 9 bit parity generator rx data path interface in vhdl interface of rs232 to UART in VHDL fifo vhdl Inicore asynchronous fifo vhdl
Text: iAP-FUART 16f APB t lian p m co data sheet A AMB Features: • AMBA (APB) compliant interface • 16bytes fifo for read and write data • Interrupts and status register • World’s fastest transmission rates: 1200bps to 115.2kbps with Accuracy Better than 0.1% from 1MHz Clock!
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16fPB)
16bytes
1200bps
RS-232
AMBA APB bus protocol
structural design of a 9 bit parity generator
rx data path interface in vhdl
interface of rs232 to UART in VHDL
fifo vhdl
Inicore
asynchronous fifo vhdl
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USART code examples
Abstract: FMC16FX
Text: Fujitsu Microelectronics Europe Application Note MCU-AN-300229-E-V13 F²MC-16FX FAMILY 16-BIT MICROCONTROLLER ALL SERIES CLOCK CALIBRATION APPLICATION NOTE CLOCK CALIBRATION Revision History Revision History Date 2006-12-11 2007-07-22 2007-09-24 2007-09-27
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MCU-AN-300229-E-V13
MC-16FX
16-BIT
200kbps.
autocorr-v10
USART code examples
FMC16FX
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RDR05
Abstract: MB91467 MB91460 12500bps
Text: Fujitsu Microelectronics Europe Application Note MCU-AN-300083-E-V11 FR FAMILY 32-BIT MICROCONTROLLER MB91460 CLOCK CALIBRATION APPLICATION NOTE CLOCK CALIBRATION Revision History Revision History Date 2008-02-26 2008-04-24 Issue V1.0, First draft, HPi V1.1, typo in title page corrected, MSt
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MCU-AN-300083-E-V11
32-BIT
MB91460
12500bps.
RDR05
MB91467
MB91460
12500bps
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CH-2555
Abstract: No abstract text available
Text: Features: The iniUART is an innovative, flexible implementation of an UART Universal Asynchronous Receiver Transmitter . The iniUART implements the RS-232 serial protocol, provides the interface between a microprocessor and a serial port or between the system and a standard serial port.
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RS-232
CH-2555
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VERILOG Digitally Controlled Oscillator
Abstract: vhdl code for DCO verilog code for uart apb vhdl code for 4 bit even parity generator uart verilog code vhdl code for 8 bit ODD parity generator uart vhdl code fpga
Text: D a ta s h e e t UART MODULE Revision 2.8.1 INICORE INC. 5600 Mowry School Road Suite 180 Newark, CA 94560 t: 510 445 1529 f: 510 656 0995 e: [email protected] www.inicore.com C O P Y R IG H T 2 0 0 1 - 2 0 0 4 , IN IC O R E , IN C . U A R T m o d u le D a ta s h e e t
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AN112
Abstract: C8051F020 C8051F022 C51 Family f02x 8051F AN11 C8051F021 C8051F023 C8051F300
Text: A N 112 UART I N - A P P L I C A T I O N C O D E L O A D I N G E X A M P L E S Relevant Devices transfer of code from the host to its program memory. This application needs the ability to do the folThis application note applies to the following lowing tasks:
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communicaC8051F020,
C8051F021,
C8051F022,
C8051F023,
C8051F300,
C8051F301,
C8051F302,
C8051F303.
AN112
C8051F020
C8051F022
C51 Family
f02x
8051F
AN11
C8051F021
C8051F023
C8051F300
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AN3756
Abstract: AN3499 S08SG32 DEMO9S08SG32AUTO MC9S08SG32 S08 Freescale S08SG clock synchronization S08S S08AC
Text: Freescale Semiconductor Application Note Document Number: AN3756 Rev. 0, 10/2008 Using and Synchronizing the S08’s Internal Clock for LIN Slave Implementations for LIN Rev 2.x implementations by: Yves BRIANT Global Sales and Marketing (GSM) Reliable communication via the asynchronous LIN
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AN3756
AN3756
AN3499
S08SG32
DEMO9S08SG32AUTO
MC9S08SG32
S08 Freescale
S08SG
clock synchronization
S08S
S08AC
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AMBA APB bus protocol
Abstract: interface of rs232 to UART in VHDL rx data path interface in vhdl AMBA APB UART fifo vhdl baud rate generator vhdl vhdl synchronous bus Inicore
Text: iAP-UART 16f APB t lian p m co data sheet A AMB Features: • AMBA (APB) compliant interface • 16bytes fifo for read and write data • Interrupts and status register • Configurable Transfer Rate: 1200bps to 115.2kbps with Accuracy Better than 0.1% from 8MHz Clock!
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16bytes
1200bps
AMBA APB bus protocol
interface of rs232 to UART in VHDL
rx data path interface in vhdl
AMBA APB UART
fifo vhdl
baud rate generator vhdl
vhdl synchronous bus
Inicore
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baudrate
Abstract: UART DESIGN
Text: iniUART data sheet Features: • Configurable Transfer Rate: 1200bps to 115.2kbps with Accuracy Better than 0.1% from 8MHz Clock! • Data Format: 7, 8 Bits • Parity Enable, Odd/Even, Error Detection • Stop Bit: 1, 2 Bits • Format Check • 3-Point Input Sampling, Glitch Rejection
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1200bps
391-DS-14
baudrate
UART DESIGN
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Frequency Generator 1MHz
Abstract: Inicore 392-DS-10
Text: iniFUART data sheet Features: • Configurable Transfer Rate: 1200bps to 115.2kbps with Accuracy Better than 0.15% from 1MHz Clock! • Data Format: 7, 8 Bits • Parity Enable, Odd/Even, Error Detection • Stop Bit: 1, 2 Bits • Format Check • Glitch Rejection
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1200bps
RS-232
16bit
64kbps,
13ppm.
170ppm.
392-DS-10
Frequency Generator 1MHz
Inicore
392-DS-10
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baud rate generator vhdl
Abstract: No abstract text available
Text: iniUART data sheet Features: • Configurable Transfer Rate: 1200bps to 115.2kbps with Accuracy Better than 0.1% from 8MHz Clock! • Data Format: 7, 8 Bits • Parity Enable, Odd/Even, Error Detection • Stop Bit: 1, 2 Bits • Format Check • 3-Point Input Sampling, Glitch Rejection
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1200bps
391-DS-14
baud rate generator vhdl
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c8051f12x
Abstract: C8051F02x baudrate CEX5 f02x P74OUT C8051F023 C8051F120 C8051F121 C8051F122
Text: AN131 PORTING CONSIDERATIONS FROM ‘F02X TO ‘F12X Relevant Devices Clocking This application note applies to the following devices: The main differences in clocking between the C8051F02x series and the C8051F12x series include an on-chip calibrated 24.5 MHz internal
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AN131
C8051F02x
C8051F12x
C8051F020,
C8051F021,
C8051F022,
C8051F023,
C8051F120,
C8051F121,
C8051F122,
baudrate
CEX5
f02x
P74OUT
C8051F023
C8051F120
C8051F121
C8051F122
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C513AO
Abstract: C513AO-2E C500 C513A C513AO-L SAB-C501 siemens trio ttl C505C S3 TRIO 64
Text: SAB-C501 Since April 1, 1999, Siemens Semiconductor is Infineon Technologies. The next revision of this document will be updated accordingly. C513AO 8-Bit CMOS Microcontroller User’s Manual 05.99 h de . s n e r/ m to e c i .s du w n o w c /: /w emi ttp S
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SAB-C501
C513AO
AG1999.
C513AO
C513AO-2E
C500
C513A
C513AO-L
SAB-C501
siemens trio ttl
C505C
S3 TRIO 64
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ixxat usb-to-can
Abstract: AT91SAM7X JTAG Programmer AT91BOOTDLL usb-to-can AT91SAM7X256 jlink-arm ixxat ixxat usb-to-can compact pAT91BootDLL 0xFFFFF240
Text: AT91 In-system Programmer ISP . User Guide Table of Contents Section 1 Introduction . 1-1
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6224D
28-Jul-06
ixxat usb-to-can
AT91SAM7X JTAG Programmer
AT91BOOTDLL
usb-to-can
AT91SAM7X256
jlink-arm
ixxat
ixxat usb-to-can compact
pAT91BootDLL
0xFFFFF240
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