RF-310T-11400
Abstract: cdm 12.1 laser l1210 RF-300CH CDM 12.3blc Philips cd loader L1210 rf310t11400 CDM 12.6 Philips RF-500TB-12560 tda1371
Text: C ON T E N T S 1 INTRODUCTION _ 1.1 2 C D S YS T E M S O L U T I O N S CD-ROM block-decoders _ 3.19 CD encoder _ 3.21 CD-Recordable _ 3.22 DACs, ADCs and ADDAs _ 3.27
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CCA110
SCB44
RF-310T-11400
cdm 12.1 laser
l1210
RF-300CH
CDM 12.3blc Philips
cd loader L1210
rf310t11400
CDM 12.6 Philips
RF-500TB-12560
tda1371
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Untitled
Abstract: No abstract text available
Text: INTEGRATED CIRCUITS DATA SHEET 74AHC273; 74AHCT273 Octal D-type flip-flop with reset; positive-edge trigger Product specification File under Integrated Circuits, IC06 2002 Oct 30 Philips Semiconductors Product specification Octal D-type flip-flop with reset;
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74AHC273;
74AHCT273
EIA/JESD22-A114-A
EIA/JESD22-A115-A
EIA/JESD22-C101
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7ahct273
Abstract: 74AHC273 74AHC273D 74AHC273PW 74AHCT273 74AHCT273D
Text: INTEGRATED CIRCUITS DATA SHEET 74AHC273; 74AHCT273 Octal D-type flip-flop with reset; positive-edge trigger Product specification File under Integrated Circuits, IC06 1999 Sep 01 Philips Semiconductors Product specification Octal D-type flip-flop with reset;
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74AHC273;
74AHCT273
74AHC/AHCT273
EIA/JESD22-A114-A
EIA/JESD22-A115-A
EIA/JESD22-C101
245002/01/pp20
7ahct273
74AHC273
74AHC273D
74AHC273PW
74AHCT273
74AHCT273D
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74AUP1G57
Abstract: 74AUP1G57GF 74AUP1G57GM 74AUP1G57GW JESD22-A114-C transistor VT 209 M CDM 12.6 Philips
Text: 74AUP1G57 Low-power configurable multiple function gate Rev. 01. — 16 January 2006 Preliminary data sheet 1. General description The 74AUP1G57 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.
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74AUP1G57
74AUP1G57
74AUP1G57GF
74AUP1G57GM
74AUP1G57GW
JESD22-A114-C
transistor VT 209 M
CDM 12.6 Philips
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CDM 12.4 Philips
Abstract: No abstract text available
Text: 74ABT16244A 16-bit buffer/line driver; 3-state Rev. 05 — 10 February 2006 Product data sheet 1. General description The 74ABT16244A high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT16244A is a 16-bit buffer that is ideal for driving bus lines. The device features
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74ABT16244A
16-bit
74ABT16244A
CDM 12.4 Philips
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74AHC244
Abstract: No abstract text available
Text: INTEGRATED CIRCUITS DATA SHEET 74AHC244; 74AHCT244 Octal buffer/line driver; 3-state Product specification Supersedes data of 1999 Feb 24 File under Integrated Circuits, IC06 1999 Sep 28 Philips Semiconductors Product specification Octal buffer/line driver; 3-state
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74AHC244;
74AHCT244
EIA/JESD22-A114-A
EIA/JESD22-A115-A
EIA/JESD22-C101
245002/03/pp16
74AHC244
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817 BN
Abstract: 74AHC245 74AHC245D 74AHC245PW 74AHCT245
Text: INTEGRATED CIRCUITS DATA SHEET 74AHC245; 74AHCT245 Octal bus transceiver; 3-state Product specification Supersedes data of 1998 Sep 21 File under Integrated Circuits, IC06 1999 Sep 28 Philips Semiconductors Product specification Octal bus transceiver; 3-state
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74AHC245;
74AHCT245
EIA/JESD22-A114-A
EIA/JESD22-A115-A
EIA/JESD22-C101
245002/02/pp20
817 BN
74AHC245
74AHC245D
74AHC245PW
74AHCT245
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ahct541
Abstract: 74AHC541 74AHC541D 74AHC541PW 74AHCT541 74AHCT541D
Text: INTEGRATED CIRCUITS DATA SHEET 74AHC541; 74AHCT541 Octal buffer/line driver; 3-state Product specification Supersedes data of 1998 Sep 21 File under Integrated Circuits, IC06 1999 Nov 24 Philips Semiconductors Product specification Octal buffer/line driver; 3-state
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74AHC541;
74AHCT541
EIA/JESD22-A114-A
EIA/JESD22-A115-A
EIA/JESD22-C101
74AHC/AHCT541
245002/02/pp16
ahct541
74AHC541
74AHC541D
74AHC541PW
74AHCT541
74AHCT541D
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74AUP1G04
Abstract: 74AUP1G04GF 74AUP1G04GM 74AUP1G04GW JESD22-A114-C MO-203
Text: 74AUP1G04 Low-power inverter Rev. 02 — 28 June 2006 Product data sheet 1. General description The 74AUP1G04 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall
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74AUP1G04
74AUP1G04
74AUP1G04GF
74AUP1G04GM
74AUP1G04GW
JESD22-A114-C
MO-203
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001aaf022
Abstract: No abstract text available
Text: 74AUP1G04 Low-power inverter Rev. 02.00 — 16 May 2006 Product data sheet 1. General description The 74AUP1G04 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall
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74AUP1G04
74AUP1G04
001aaf022
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74AUP1G34
Abstract: 74AUP1G34GM 74AUP1G34GW JESD22-A114-C MO-203
Text: 74AUP1G34 Low-power buffer Rev. 01 — 4 August 2005 Product data sheet 1. General description The 74AUP1G34 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall
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74AUP1G34
74AUP1G34
74AUP1G34GM
74AUP1G34GW
JESD22-A114-C
MO-203
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74AUP1G04
Abstract: 74AUP1G04GM 74AUP1G04GW JESD22-A114-C MO-203
Text: 74AUP1G04 Low-power inverter Rev. 01 — 18 July 2005 Product data sheet 1. General description The 74AUP1G04 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall
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74AUP1G04
74AUP1G04
74AUP1G04GM
74AUP1G04GW
JESD22-A114-C
MO-203
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74AUP1G34GF
Abstract: 74AUP1G34 74AUP1G34GM 74AUP1G34GW JESD22-A114-C MO-203
Text: 74AUP1G34 Low-power buffer Rev. 02 — 4 July 2006 Product data sheet 1. General description The 74AUP1G34 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall
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74AUP1G34
74AUP1G34
74AUP1G34GF
74AUP1G34GM
74AUP1G34GW
JESD22-A114-C
MO-203
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SOT353-1
Abstract: No abstract text available
Text: 74AUP1G34 Low-power buffer Rev. 02.mm — 16 May 2006 Product data sheet 1. General description The 74AUP1G34 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall
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74AUP1G34
74AUP1G34
SOT353-1
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ua 709 cp
Abstract: 74AHCT377 74AHC377 74AHC377D 74AHC377PW 74AHCT377D
Text: INTEGRATED CIRCUITS DATA SHEET 74AHC377; 74AHCT377 Octal D-type flip-flop with data enable; positive-edge trigger Product specification File under Integrated Circuits, IC06 2000 Aug 15 Philips Semiconductors Product specification Octal D-type flip-flop with data enable;
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74AHC377;
74AHCT377
EIA/JESD22-A114-A
EIA/JESD22-A115-A
EIA/JESD22-C101
74AHC/AHCT377
74AHC/AH
613507/01/pp20
ua 709 cp
74AHCT377
74AHC377
74AHC377D
74AHC377PW
74AHCT377D
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74AHC374D
Abstract: 74AHC374 74AHC374PW 74AHCT374 74AHCT374D
Text: INTEGRATED CIRCUITS DATA SHEET 74AHC374; 74AHCT374 Octal D-type flip-flop; positive edge-trigger; 3-state Product specification Supersedes data of 1998 Dec 11 File under Integrated Circuits, IC06 1999 Sep 28 Philips Semiconductors Product specification 74AHC374;
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74AHC374;
74AHCT374
EIA/JESD22-A114-A
EIA/JESD22-A115-A
EIA/JESD22-C101
74AHC/AHCT374
245002/02/pp20
74AHC374D
74AHC374
74AHC374PW
74AHCT374
74AHCT374D
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74AHC373
Abstract: 74AHC373D 74AHC373PW 74AHCT373 74AHCT373D
Text: INTEGRATED CIRCUITS DATA SHEET 74AHC373; 74AHCT373 Octal D-type transparent latch; 3-state Product specification Supersedes data of 1998 Dec 11 File under Integrated Circuits, IC06 1999 Nov 23 Philips Semiconductors Product specification Octal D-type transparent latch; 3-state
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74AHC373;
74AHCT373
74AHC/AHCT373
EIA/JESD22-A114-A
EIA/JESD22-A115-A
EIA/JESD22-C101
245002/02/pp20
74AHC373
74AHC373D
74AHC373PW
74AHCT373
74AHCT373D
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74AUP2G04
Abstract: 74AUP2G04GF 74AUP2G04GM 74AUP2G04GW JESD22-A114-C
Text: 74AUP2G04 Low-power dual inverter Rev. 01. — 16 January 2006 Preliminary data sheet 1. General description The 74AUP2G04 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall
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74AUP2G04
74AUP2G04
74AUP2G04GF
74AUP2G04GM
74AUP2G04GW
JESD22-A114-C
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CT3244A
Abstract: 1B4 SMD 1B3 SMD ct324 active suspension sensor CBT3244A CBT3244ABQ JESD22-A114 JESD22-A115 JESD78
Text: CBT3244A Octal bus switch with quad output enables Rev. 02 — 15 September 2005 Product data sheet 1. General description The CBT3244A provides eight bits of high-speed TTL-compatible bus switching in a standard '244 device pinout. The low ON-state resistance of the switch allows connections
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CBT3244A
CBT3244A
CT3244A
1B4 SMD
1B3 SMD
ct324
active suspension sensor
CBT3244ABQ
JESD22-A114
JESD22-A115
JESD78
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74aup2g34gw
Abstract: No abstract text available
Text: 74AUP2G34 Low-power dual buffer Rev. 01.00 — 16 January 2006 Preliminary data sheet 1. General description The 74AUP2G34 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall
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74AUP2G34
74AUP2G34
74aup2g34gw
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Untitled
Abstract: No abstract text available
Text: CBT3244A Octal bus switch with quad output enables Rev. 02 — 15 September 2005 Product data sheet 1. General description The CBT3244A provides eight bits of high-speed TTL-compatible bus switching in a standard '244 device pinout. The low ON-state resistance of the switch allows connections
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CBT3244A
CBT3244A
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SO20 Package
Abstract: 74AHC244 octal schmitt SOT360-1 74AHC244D 74AHC244PW 74AHCT244 74AHCT244D 74AHCT244PW SO20
Text: 74AHC244; 74AHCT244 Octal buffer/line driver; 3-state Rev. 04 — 10 February 2006 Product data sheet 1. General description The 74AHC244; 74AHCT244 is a high-speed Si-gate CMOS device. The 74AHC244; 74AHCT244 has octal non-inverting buffer/line drivers with 3-state
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74AHC244;
74AHCT244
74AHCT244
74AHC244
EIA/JESD22-A114-C
AHCT244
SO20 Package
octal schmitt
SOT360-1
74AHC244D
74AHC244PW
74AHCT244D
74AHCT244PW
SO20
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Untitled
Abstract: No abstract text available
Text: 74LVC573A Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state Rev. 04.00 — 18 May 2006 Product data sheet 1. General description The 74LVC573A consists of eight D-type transparent latches, featuring separate D-type inputs for each latch and 3-state true outputs for bus-oriented applications. A Latch
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74LVC573A
74LVC573A
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74AUP1G125
Abstract: 74AUP1G125GF 74AUP1G125GM 74AUP1G125GW JESD22-A114-C MO-203 marking A1 TRANSISTOR
Text: 74AUP1G125 Low-power buffer/line driver; 3-state Rev. 02 — 30 June 2006 Product data sheet 1. General description The 74AUP1G125 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all
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74AUP1G125
74AUP1G125
74AUP
74AUP1G125GF
74AUP1G125GM
74AUP1G125GW
JESD22-A114-C
MO-203
marking A1 TRANSISTOR
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