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    CLOCK DOWN Search Results

    CLOCK DOWN Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TB67S539FTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Bipolar Type/Vout(V)=40/Iout(A)=2/Clock Interface Visit Toshiba Electronic Devices & Storage Corporation
    TB67S149AFTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Unipolar Type/Vout(V)=84/Iout(A)=3/Clock Interface Visit Toshiba Electronic Devices & Storage Corporation
    TB67S549FTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Bipolar Type/Vout(V)=40/Iout(A)=1.5/Clock Interface Visit Toshiba Electronic Devices & Storage Corporation
    TB67S589FTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver / Bipolar Type / Vout(V)=50 / Iout(A)=3.0 / CLK input type / VQFN32 Visit Toshiba Electronic Devices & Storage Corporation
    TB67S589FNG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver / Bipolar Type / Vout(V)=50 / Iout(A)=3.0 / CLK input type / HTSSOP28 Visit Toshiba Electronic Devices & Storage Corporation

    CLOCK DOWN Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Clock ic

    Abstract: No abstract text available
    Text: CLOCK IC DECISION TREE CLOCK IC Clock Generator PLL Computing Server Mobile Network/Consumer Desktop Clock Multiplier PCI Express LVPECL Spread Spectrum Clock Generator Input Frequency DIE Voltage Spread Input Multiplication VCXO IC 2.5V With PLL Down 3.3V


    Original     		PDF TREE-09-2008 Clock ic

    Untitled

    Abstract: No abstract text available
    Text: RC001 RC001 Redundant Clock Module Positive ECL Compatible Differential Output U.S. Patent 6,970,045 Rev E Description The Redundant Clock Module is intended to supply highly reliable fixed clock reference. • Clock Redundancy • Zero Downtime • HALT/HASS Verified


    Original     		PDF RC001 RC001 -55oC 125oC

    Untitled

    Abstract: No abstract text available
    Text: RC001 RC001 Redundant Clock Module Positive ECL Compatible Differential Output U.S. Patent 6,970,045 Rev E Description The Redundant Clock Module is intended to supply highly reliable fixed clock reference. • Clock Redundancy • Zero Downtime • HALT/HASS Verified


    Original     		PDF RC001 RC001 -55oC 125oC

    AN1545

    Abstract: MPC9993 MPC99J93
    Text: Freescale Semiconductor Technical Data MPC99J93 DATA Rev 3, SHEET 05/2005 Intelligent Dynamic Clock Switch Intelligent Dynamic Clock Switch IDCS PLL Clock Driver (IDCS) PLL Clock Driver MPC99J93 MPC99J93 The MPC99J93 is a PLL clock driver designed specifically for redundant clock


    Original     		PDF MPC99J93 MPC99J93 199707558G AN1545 MPC9993

    Untitled

    Abstract: No abstract text available
    Text: DATA SHEET MPC99J93 Freescale Semiconductor Technical Data Rev 3, 05/2005 MPC99J93 Intelligent Dynamic Clock Switch Intelligent Dynamic IDCS PLL Clock Driver Clock Switch MPC99J93 (IDCS) PLL Clock Driver The MPC99J93 is a PLL clock driver designed specifically for redundant clock


    Original     		PDF MPC99J93 MPC99J93 32-Lead 199707558G

    Untitled

    Abstract: No abstract text available
    Text: Freescale Semiconductor Technical Data DATAMPC9993 SHEET Rev 3, 06/2005 Intelligent Dynamic Clock Switch Intelligent Dynamic Clock Switch IDCS PLL Clock Driver (IDCS) PLL Clock Driver MPC9993 MPC9993 The MPC9993 is a PLL clock driver designed specifically for redundant clock


    Original     		PDF MPC9993 32-Lead MPC9993Pacific 199707558G

    AN1545

    Abstract: MC88915 MPC9448 MPC9993
    Text: DATA SHEET MPC9993 Freescale Semiconductor Technical Data Rev 3, 06/2005 MPC9993 Intelligent Dynamic Clock Switch Intelligent Dynamic IDCS PLL Clock Driver Clock Switch MPC9993 (IDCS) PLL Clock Driver The MPC9993 is a PLL clock driver designed specifically for redundant clock


    Original     		PDF MPC9993 MPC9993 199707558G AN1545 MC88915 MPC9448

    M600

    Abstract: No abstract text available
    Text: MoBL Clock M300/M600 Three-PLL Programmable Clock Generator for Portable Applications Features Benefits • Device Operating Voltage Options: ❐ MoBL Clock M300 Family: 1.8V ❐ MoBL Clock M600 Family: 2.5V, 3.0V, or 3.3V ■ Selectable clock output voltages for both MoBL Clock M300


    Original     		PDF M300/M600 16-pin M600

    ti 6346

    Abstract: 440LX CDC9441
    Text: CDC9441 PC CLOCK SYNTHESIZER/DRIVER WITH SDRAM CLOCK SUPPORT SCAS578 – AUGUST 1996 D D D D D D DL PACKAGE TOP VIEW Clock Generation for Intel 440LX Chipset Four CPU Clock Outputs With Programmable Frequency Twelve SDRAM Clock Outputs Seven PCI Clock Outputs


    Original     		PDF CDC9441 SCAS578 440LX 318-MHz 31818-MHz SDRAM11 SDRAM10 CDC9441 ti 6346

    M8000

    Abstract: LF24A M4000 JESD22-A114E MO-220
    Text: MoBL Clock M4000/M8000 Four-PLL Programmable Clock Generator for Portable Applications Features Benefits • Device Operating Voltage Options: ❐ MoBL Clock M4000 Family: 1.8V ❐ MoBL Clock M8000 Family: 2.5V, 3.0V, or 3.3V ■ Selectable clock output voltages for both MoBL Clock M4000


    Original     		PDF M4000/M8000 M4000 M8000 M4000 M8000: LF24A JESD22-A114E MO-220

    Untitled

    Abstract: No abstract text available
    Text: CDC5806 THREE PLLs BASED CLOCK GENERATOR FOR DIGITAL TV APPLICATIONS SCAS760A − MARCH 2004 − REVISED MAY 2004 features D High Performance Clock Generator D Clock Input Compatible With D D Max D PLLs are Powered Down, if No Valid D D D REF_IN Clock < 5 MHz) is Detected or the


    Original     		PDF CDC5806 SCAS760A 54-MHz

    100mhz crystal decoupling

    Abstract: No abstract text available
    Text: 19-5214; Rev 0; 4/10 Spread-Spectrum Clock Generators The MAX31C80/MAX31D80 are spread-spectrum clock generators that contain a phase-locked loop PLL that generates a 2MHz to 134MHz clock from an input clock or crystal. The PLL can provide a spread-spectrum down-dithered (MAX31D80) or center-dithered


    Original     		PDF MAX31C80/MAX31D80 134MHz MAX31D80) MAX31C80) 10-pin -40NC 125NC MAX31C80/MAX31D80 100mhz crystal decoupling

    Untitled

    Abstract: No abstract text available
    Text: 19-5214; Rev 0; 4/10 Spread-Spectrum Clock Generators The MAX31C80/MAX31D80 are spread-spectrum clock generators that contain a phase-locked loop PLL that generates a 2MHz to 134MHz clock from an input clock or crystal. The PLL can provide a spread-spectrum down-dithered (MAX31D80) or center-dithered


    Original     		PDF MAX31C80/MAX31D80 134MHz MAX31D80) MAX31C80) 10-pin -40NC 125NC a1033 MAX31C80/MAX31D80

    M3000

    Abstract: LF24A M6000 MO-220
    Text: MoBL Clock M3000/M6000 Three-PLL Programmable Clock Generator for Portable Applications Features Benefits • Device Operating Voltage Options: ❐ MoBL Clock M3000 Family: 1.8V ❐ MoBL Clock M6000 Family: 2.5V, 3.0V, or 3.3V ■ Selectable clock output voltages for both MoBL Clock M3000


    Original     		PDF M3000/M6000 M3000 M6000 M3000 M6000: LF24A MO-220

    Untitled

    Abstract: No abstract text available
    Text: EQUAD Up/Down Clock to Quadrature Encoder Page 1 of 4 Description The EQUAD converts any clock source into optical encoder quadrature outputs. When up clock / down clock mode is selected via DIP SW1 up-clocks generate an A leads B quadrature sequence and down clocks generate a B leads A


    Original     		PDF

    Untitled

    Abstract: No abstract text available
    Text: CY27020 Spread Spectrum Clock Generator Spread Spectrum Clock Generator Features Functional Description • Supports clock requirements for printers The CY27020 clock generator provides a low EMI clock output for printers. It features spread spectrum technology, a


    Original     		PDF CY27020 CY27020 48-MHz

    CL1101

    Abstract: CL1502 610 108 001 PHSOSCK17/M16/M26/M36 SL 100 power transistor sl 100 transistor YN 2 SL 220 CL117 CL166 PHSOSCK17
    Text: INPUT CLOCK DRIVERS Cell List Cell Name Function Description PMSCKDC 2/4/6/8 2.5V CMOS Level Input Clock Driver PMSCKDCD(2/4/6/8) 2.5V CMOS Level Input Clock Driver with Pull-Down PMSCKDCU(2/4/6/8) 2.5V CMOS Level Input Clock Driver with Pull-Up PMSCKDS(2/4/6/8)


    Original     		PDF STDH150 CL1101 CL1502 610 108 001 PHSOSCK17/M16/M26/M36 SL 100 power transistor sl 100 transistor YN 2 SL 220 CL117 CL166 PHSOSCK17

    application notes of TF 513

    Abstract: PHSOSCK17 PHSOSCK27 STD130
    Text: INPUT CLOCK DRIVERS Cell List Cell Name Function Description PSCKDC 2/4/6/8 1.8V CMOS Level Input Clock Driver PSCKDCD(2/4/6/8) 1.8V CMOS Level Input Clock Driver with Pull-Down PSCKDCU(2/4/6/8) 1.8V CMOS Level Input Clock Driver with Pull-Up PSCKDS(2/4/6/8)


    Original     		PDF STD130 application notes of TF 513 PHSOSCK17 PHSOSCK27 STD130

    CL 2181

    Abstract: SL 1088 PHSOSCK17 PHSOSCK27
    Text: INPUT CLOCK DRIVERS Cell List Cell Name Function Description PSCKDC 2/4/6/8 1.8V CMOS Level Input Clock Driver PSCKDCD(2/4/6/8) 1.8V CMOS Level Input Clock Driver with Pull-Down PSCKDCU(2/4/6/8) 1.8V CMOS Level Input Clock Driver with Pull-Up PSCKDS(2/4/6/8)


    Original     		PDF STD131 CL 2181 SL 1088 PHSOSCK17 PHSOSCK27

    Untitled

    Abstract: No abstract text available
    Text: xr XRK79993 INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER DECEMBER 2004 REV. 1.0.0 GENERAL DESCRIPTION The XRK79993 is a PLL clock driver designed specifically for redundant clock tree designs. The device receives two differential LVPECL clock signals


    Original     		PDF XRK79993 XRK79993

    Untitled

    Abstract: No abstract text available
    Text: ICS2694 Integrated Circuit Systems, Inc. Motherboard Clock Generator Features Applications • Low cost - eliminates multiple oscillators and Count Down Logic • CPU clock and Co-processor clock • Hard Disk and Floppy Disk clock Primary VCO has 16 Mask Programmable frequencies


    OCR Scan     		PDF ICS2694 ICS2694-004 ICS2494244

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Low Skew CMOS PLL Clock Driver With Power-Down/Power-Up Feature The MC88920 Clock Driver utilizes phase-locked loop technology to lock its low skew outputs’ frequency and phase onto an input reference clock. It is designed to provide clock distribution for CISC microprocessor


    OCR Scan     		PDF MC88920 MC68/EC/LC030/040 330ft MC88920 20-PIN THEMC88920 BR1333

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Low S kew CMOS PLL Clock Driver MC88921 With Power-Down/Power-Up Feature The MC88921 Clock Driver utilizes phase-locked loop technology to lock its low skew outputs' frequency and phase onto an input reference clock. It Is designed to provide clock distribution for CISC microprocessor


    OCR Scan     		PDF MC88921 MC88921 20-PIN THATISNECESSARYTOUSETHEMC88921 BR1333 MC88921/Pentium

    Untitled

    Abstract: No abstract text available
    Text: CDC2582 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH DIFFERENTIAL LVPECL CLOCK INPUTS _SCAS379B - FEBRUARY 1993 - REVISED FEBRUARY 1996 Low Output Skew for Clock-Dlstrlbutlon and Clock-Generatlon Applications Operates at 3.3-V Vcc Distributes Differential LVPECL Clock


    OCR Scan     		PDF CDC2582 SCAS379B SCAS379B-FEBRUARY 6S5303»