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    CMOS FAN OUT BUFFER Search Results

    CMOS FAN OUT BUFFER Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    7UL2T125FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL2T126FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL1G07FU Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Non-Inverter Buffer (Open Drain), USV, -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    TCR5RG28A Toshiba Electronic Devices & Storage Corporation LDO Regulator, Fixed Output, 2.8 V, 500 mA, WCSP4F Visit Toshiba Electronic Devices & Storage Corporation
    TCR3DM18 Toshiba Electronic Devices & Storage Corporation LDO Regulator, Fixed Output, 1.8 V, 300 mA, DFN4 Visit Toshiba Electronic Devices & Storage Corporation

    CMOS FAN OUT BUFFER Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    28-pin SSOP

    Abstract: CM74 CM74CB2 CM74CB218 PMC-2031577
    Text: CM74CB2 LSB 2x8 Preliminary Low-Voltage Low-Skew Dual 1-to-8 Buffer FEATURES PMC-Sierra’s CM74CB218 is a monolithic CMOS high-speed clock buffer. It contains two matched 1-to-8 fan-out buffers, designed for low outputto-output skews. The inputs can be connected together to form a single 1-to16 fan-out buffer.


    Original     		PDF CM74CB2 CM74CB218 1-to16 28-pin PMC-2031577 28-pin SSOP CM74 CM74CB2 PMC-2031577

    CD4001 Application

    Abstract: CD4001 national CD4002 AN-377 cmos logic gate cd40012 CD4001 cd4001 applications C1995 cmos inverter gates application
    Text: Introduction Transfer Characteristics The immunity of a CMOS logic gate to noise signals is a function of many variables such as individual chip differences fan-in and fan-out stray inductance and capacitance supply voltage location of the noise shape of the noise


    Original     		PDF

    CD40014

    Abstract: CD4001 application note CD4001 Application CD4001 cd4002 fairchild CD4001 ON CD4002 CD4001 datasheet AN-377 cd4001 fairchild
    Text: Fairchild Semiconductor Application Note 377 July 1984 Introduction The immunity of a CMOS logic gate to noise signals is a function of many variables, such as individual chip differences, fan-in and fan-out, stray inductance and capacitance, supply voltage, location of the noise, shape of the noise signal, and temperature. Moreover, the immunity of a system of


    Original     		PDF

    Lead Free reflow soldering profile BGA

    Abstract: AN01026 LQFP32 MS-026 PCK946 PCK946BD qa1 smd
    Text: PCK946 Low voltage 1 : 10 CMOS clock driver Rev. 01 — 13 December 2005 Product data sheet 1. General description The PCK946 is a low voltage CMOS 1 : 10 clock buffer. The 10 outputs can be configured into a standard fan-out buffer or into 1x and 1⁄2× combinations. The ten outputs were


    Original     		PDF PCK946 PCK946 Lead Free reflow soldering profile BGA AN01026 LQFP32 MS-026 PCK946BD qa1 smd

    Untitled

    Abstract: No abstract text available
    Text: CM74CB218 LSB 2x8 Preliminary Low-Voltage Low-Skew Dual 1-to-8 Buffer FEATURES PMC-Sierra’s CM74CB218 is a monolithic CMOS high-speed clock buffer. It contains two matched 1-to-8 fan-out buffers, designed for low outputto-output skews. The inputs can be


    Original     		PDF CM74CB218 CM74CB218 1-to16 28-pin PMC-2031577

    Untitled

    Abstract: No abstract text available
    Text: CM74CB218 Preliminary LSB 2x8 Data Sheet 12 AM A member of the PMC CLK Family 2: Low-Voltage Low-Skew Dual 1-to-8 Buffer 5 02 :3 PMC-Sierra’s CM74CB218 is a monolithic CMOS high-speed clock buffer. It contains two matched 1to-8 fan-out buffers, designed for low output-to-output skews. The inputs can be connected together to


    Original     		PDF CM74CB218 1-to-16 28-pin PMC-2030820,

    Untitled

    Abstract: No abstract text available
    Text: CM74CB218 Preliminary LSB 2x8 Data Sheet 12 PM A member of the PMC CLK Family 3: Low-Voltage Low-Skew Dual 1-to-8 Buffer 5 12 :4 PMC-Sierra’s CM74CB218 is a monolithic CMOS high-speed clock buffer. It contains two matched 1to-8 fan-out buffers, designed for low output-to-output skews. The inputs can be connected together to


    Original     		PDF CM74CB218 1-to-16 28-pin PMC-2030820,

    Untitled

    Abstract: No abstract text available
    Text: CM74CB218 Preliminary LSB 2x8 Data Sheet 33 AM A member of the PMC CLK Family 1: Low-Voltage Low-Skew Dual 1-to-8 Buffer 5 11 :3 PMC-Sierra’s CM74CB218 is a monolithic CMOS high-speed clock buffer. It contains two matched 1to-8 fan-out buffers, designed for low output-to-output skews. The inputs can be connected together to


    Original     		PDF CM74CB218 1-to-16 MO-137B 28-pin PMC-2030820,

    Untitled

    Abstract: No abstract text available
    Text: CM74CB218 Preliminary LSB 2x8 Data Sheet 54 AM A member of the PMC CLK Family 7: Low-Voltage Low-Skew Dual 1-to-8 Buffer 20 The CM74CB218 is packaged in a space-saving 28-pin SSOP package. 04 01 :1 PMC-Sierra’s CM74CB218 is a monolithic CMOS high-speed clock buffer. It contains two matched 1to-8 fan-out buffers, designed for low output-to-output skews. The inputs can be connected together to


    Original     		PDF CM74CB218 28-pin 1-to-16 PMC-2030820,

    Untitled

    Abstract: No abstract text available
    Text: CM74CB218 Preliminary LSB 2x8 Data Sheet 02 AM A member of the PMC CLK Family 3: Low-Voltage Low-Skew Dual 1-to-8 Buffer 20 The CM74CB218 is packaged in a space-saving 28-pin SSOP package. 04 09 :1 PMC-Sierra’s CM74CB218 is a monolithic CMOS high-speed clock buffer. It contains two matched 1to-8 fan-out buffers, designed for low output-to-output skews. The inputs can be connected together to


    Original     		PDF CM74CB218 28-pin 1-to-16 PMC-2030820,

    Untitled

    Abstract: No abstract text available
    Text: CM74CB218 Preliminary LSB 2x8 Data Sheet 44 AM A member of the PMC CLK Family 6: Low-Voltage Low-Skew Dual 1-to-8 Buffer 20 The CM74CB218 is packaged in a space-saving 28-pin SSOP package. 04 07 :1 PMC-Sierra’s CM74CB218 is a monolithic CMOS high-speed clock buffer. It contains two matched 1to-8 fan-out buffers, designed for low output-to-output skews. The inputs can be connected together to


    Original     		PDF CM74CB218 28-pin 1-to-16 PMC-2030820,

    Untitled

    Abstract: No abstract text available
    Text: CM74CB218 Preliminary LSB 2x8 Data Sheet 40 AM A member of the PMC CLK Family 7: Low-Voltage Low-Skew Dual 1-to-8 Buffer 20 The CM74CB218 is packaged in a space-saving 28-pin SSOP package. 04 12 :4 PMC-Sierra’s CM74CB218 is a monolithic CMOS high-speed clock buffer. It contains two matched 1to-8 fan-out buffers, designed for low output-to-output skews. The inputs can be connected together to


    Original     		PDF CM74CB218 28-pin 1-to-16 PMC-2030820,

    buffer cmos 1.8V

    Abstract: idt 20 PIN SOIC CMOS TTL fan IN and fan OUT
    Text: ADVANCED TIMING SOLUTIONS FAN OUT BUFFERS Fan Out Buffers IN 01 02 03 04 05 06 07 08 09 010 Control Logic Fan Out Buffers are designed for high-speed clock distribution where signal quality and skew are critical. The buffers can also allow single point-to-point


    Original     		PDF 5T905 5T907 5T915 IDT5T9070 IDT5T9050 IDT49FCT3805/A IDT49FCT805 IDT49FCT805BT/CT buffer cmos 1.8V idt 20 PIN SOIC CMOS TTL fan IN and fan OUT

    551MILF

    Abstract: 551MLF ICS551 ICS551MILF ICS551MLF ICS551MLN clock buffer IDT package Marking Diagram
    Text: DATASHEET ICS551 1 TO 4 CLOCK BUFFER Description Features The ICS551 is a low cost, high-speed single input to four output clock buffer. Part of IDT’s ClockBlocksTM family, this is our lowest cost, small clock buffer. • • • • • • • • •


    Original     		PDF ICS551 ICS551 ICS552-02B 551MILF 551MLF ICS551MILF ICS551MLF ICS551MLN clock buffer IDT package Marking Diagram

    ICS551MILF

    Abstract: ICS551MLF 551MILF 551MLF ICS551 ICS551M ICS551MI ICS551MLN ICS551MILFT
    Text: DATASHEET ICS551 1 TO 4 CLOCK BUFFER Description Features The ICS551 is a low cost, high-speed single input to four output clock buffer. Part of ICS’ ClockBlocksTM family, this is our lowest cost, small clock buffer. • • • • • • • • • •


    Original     		PDF ICS551 ICS551 ICS552-02B 199707558G ICS551MILF ICS551MLF 551MILF 551MLF ICS551M ICS551MI ICS551MLN ICS551MILFT

    551MLF

    Abstract: 551MILF
    Text: DATASHEET ICS551 1 TO 4 CLOCK BUFFER Description Features The ICS551 is a low cost, high-speed single input to four output clock buffer. Part of IDT’ ClockBlocksTM family, this is our lowest cost, small clock buffer. • Low skew 250 ps outputs • Pb-free packaging available


    Original     		PDF ICS551 ICS552-02B outputs51 551MLF 551MILF

    Untitled

    Abstract: No abstract text available
    Text: DATASHEET ICS551 1 TO 4 CLOCK BUFFER Description Features The ICS551 is a low cost, high-speed single input to four output clock buffer. Part of ICS’ ClockBlocksTM family, this is our lowest cost, small clock buffer. • Low skew 250 ps outputs • Pb-free packaging available


    Original     		PDF ICS551 ICS552-02B 199707558G

    IDT5T30553

    Abstract: IDT marking code soic 5T30553DCGI IDT5T30 IDT5T30553DCG
    Text: DATASHEET IDT5T30553 LOW SKEW 1 TO 4 CLOCK BUFFER Description Features The IDT5T30553 is a low skew, single input to four output, clock buffer. • • • • • • IDT makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize


    Original     		PDF IDT5T30553 IDT5T30553 IDT marking code soic 5T30553DCGI IDT5T30 IDT5T30553DCG

    IDT marking code soic

    Abstract: No abstract text available
    Text: DATASHEET LOW SKEW 1 TO 4 CLOCK BUFFER I DT 5 T 3 0 5 5 3 Description Features The IDT5T30553 is a low skew, single input to four output, clock buffer. • • • • • • IDT makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize


    Original     		PDF IDT5T30553 IDT marking code soic

    553MILF

    Abstract: 553MI 553m 553MLF ICS553 ICS552-02 553-MI
    Text: DATASHEET ICS553 LOW SKEW 1 TO 4 CLOCK BUFFER Description Features The ICS553 is a low skew, single input to four output, clock buffer. Part of IDT’s ClockBlocksTM family, this is our lowest skew, small clock buffer. • • • • • • • • See the ICS552-02 for a 1 to 8 low skew buffer. For


    Original     		PDF ICS553 ICS553 ICS552-02 MK74CBxxx 553MILF 553MI 553m 553MLF 553-MI

    IDT5T30553

    Abstract: 5T30553 clock buffer idt 20 PIN SOIC
    Text: DATASHEET IDT5T30553 LOW SKEW 1 TO 4 CLOCK BUFFER Description Features The IDT5T30553 is a low skew, single input to four output, clock buffer. • • • • • • IDT makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize


    Original     		PDF IDT5T30553 IDT5T30553 5T30553 clock buffer idt 20 PIN SOIC

    QD03

    Abstract: No abstract text available
    Text: MDU28C data delay devices,vinc DUAL, HCMOS-INTERFACED FIXED DELAY LINE SERIES MDU28C FEATURES PACKAGES Two independent delay lines Fits standard 8-pin DIP socket Low profile Auto-insertable Input & outputs fully CMOS interfaced & buffered 10 T2L fan-out capability


    OCR Scan     		PDF MDU28C MDU28C) MDU28C-XX MDU28C-XXA1 DU28C-xxB1 MDU28C-XXMD1 MDU28C-series QD03

    Untitled

    Abstract: No abstract text available
    Text: Design Considerations The LCX family was designed to alleviate many of the drawbacks that are common to current low-voltage logic circuits. LCX combines the low static power consumption and the high noise margins of CMOS with a high fan-out, low input loading and a 50U transmission line drive capability.


    OCR Scan     		PDF BR1339

    Untitled

    Abstract: No abstract text available
    Text: Design Considerations The LCX fam ily was designed to alleviate many of the drawbacks that are common to current low -voltage logic circuits. LCX combines the low static power consumption and the high noise margins of CMOS with a high fan-out, low input loading and a 5 0 ii transmission line drive capability.


    OCR Scan     		PDF BR1339