DDR PHY ASIC
Abstract: MIPS64 RM9000x2
Text: RM9222 RM9000x2GL Preliminary RM9222 RM9000x2GL Integrated Multiprocessor FEATURES CACHE AND I/O COHERENCY The RM9222 RM9000x2GL Integrated Multiprocessor builds on the success of PMC-Sierra's next generation MIPSbased RM9000 Family processors by providing features specifically suited for
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RM9222
RM9000x2GL
RM9222
RM9000x2GL
RM9000
PMC-2021862
DDR PHY ASIC
MIPS64
RM9000x2
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corelis controller
Abstract: MIPS64 ethernet mac
Text: RM9222 Released RM9222 Integrated Multiprocessor FEATURES CACHE AND I/O COHERENCY The RM9222 Integrated Multiprocessor builds on the success of PMC-Sierra's next generation MIPS-based E9K processors by providing features specifically suited for network processing applications. It provides:
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RM9222
RM9222
GPI-8/16
PMC-2021862
corelis controller
MIPS64
ethernet mac
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Untitled
Abstract: No abstract text available
Text: RM9100A Released AM Integrated Microprocessor E9000 CORE CACHE AND I/O COHERENCY PMC-Sierra’s RM9100A Integrated Processor is a high performance 64-bit MIPS-based microprocessor with integrated memory and I/O interfaces. It is a single-core version of the RM9200A
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RM9100A
E9000
RM9100A
64-bit
RM9200A
16-KByte,
256-KByte,
64-entry
PMC-2040955
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ddr ram
Abstract: No abstract text available
Text: RM9222 Preliminary RM9222 Integrated Multiprocessor FEATURES CACHE AND I/O COHERENCY The RM9222 Integrated Multiprocessor builds on the success of PMC-Sierra's next generation MIPS-based E9K processors by providing features specifically suited for network processing applications. It provides:
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RM9222
RM9222
GPI-8/16
PMC-2021862
ddr ram
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l2 cache design in verilog
Abstract: 476FP tag l2 ibm+powerpc+476fp powerpc 476FP
Text: A high-performance, on-chip system bus that supports coherency in multiple-core designs IBM CoreConnect PLB6 On-Chip System Bus Architectural features Highlights Support for concurrent traffic on read and write data buses Support for concurrent transfers on all segments
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128-bit
l2 cache design in verilog
476FP
tag l2
ibm+powerpc+476fp
powerpc 476FP
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RM9224
Abstract: DDR PHY ASIC MIPS64 "network interface cards" 896-pin pmc
Text: RM9224 Released RM9224 Integrated Multiprocessor FEATURES CACHE AND I/O COHERENCY The RM9224 Integrated Multiprocessor builds on the success of PMC-Sierra's next generation MIPS-based E9K processors by providing features specifically suited for network processing applications. It provides:
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RM9224
RM9224
PMC-2021863
DDR PHY ASIC
MIPS64
"network interface cards"
896-pin pmc
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API NETWORKS
Abstract: rm5200 sysad RM9000x2 Integrated Multiprocessor
Text: RM9000x2 Preliminary RM9000x2 Integrated Multiprocessor FEATURES DUAL CPU CORES CACHE AND I/O COHERENCY The RM9000x2™ Integrated Multiprocessor is PMC-Sierra's next generation high performance MIPS processor. The RM9000x2 follows in the footsteps of the very successful PMC-Sierra
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RM9000x2
RM9000x2
RM9000x2TM
RM7000TM
RM5200TM
MIPS64TM
RM9000,
RM7000,
API NETWORKS
rm5200
sysad
RM9000x2 Integrated Multiprocessor
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Marvell
Abstract: MIPS64 RM9100A RM9200A 64120A 64-ENTRY
Text: RM9100A Released Integrated Microprocessor FEATURES E9000 CORE CACHE AND I/O COHERENCY PMC-Sierra’s RM9100A Integrated Processor is a high performance 64-bit MIPS-based microprocessor with integrated memory and I/O interfaces. It is a single-core version of the RM9200A
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RM9100A
E9000
RM9100A
64-bit
RM9200A
16-KByte,
256-KByte,
64-entry
PMC-2040955
Marvell
MIPS64
RM9200A
64120A
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API NetWorks
Abstract: Marvell MIPS64 RM9200A E9000
Text: RM9200A Released Integrated Multiprocessor FEATURES DUAL E9000 CORES CACHE AND I/O COHERENCY PMC-Sierra’s RM9200A Integrated Processor is a high performance 64-bit MIPS-based dual-microprocessor with integrated memory and I/O interfaces. Each core provides:
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RM9200A
E9000
RM9200A
64-bit
16-Kbyte,
256-Kbyte,
64-Entry
PMC-2040956
API NetWorks
Marvell
MIPS64
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Untitled
Abstract: No abstract text available
Text: RM9224 Preliminary RM9224 Integrated Multiprocessor FEATURES CACHE AND I/O COHERENCY The RM9224 Integrated Multiprocessor builds on the success of PMC-Sierra's next generation MIPS-based E9K processors by providing features specifically suited for network processing applications. It provides:
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RM9224
RM9224
PMC-2021863
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FLOATING POINT Co Processor
Abstract: No abstract text available
Text: RM9100A Released PM Integrated Microprocessor E9000 CORE CACHE AND I/O COHERENCY PMC-Sierra’s RM9100A Integrated Processor is a high performance 64-bit MIPS-based microprocessor with integrated memory and I/O interfaces. It is a single-core version of the RM9200A
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RM9100A
RM9100A
64-bit
RM9200A
E9000
MIPS64
16-KByte,
PMC-2040955
FLOATING POINT Co Processor
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Marvell
Abstract: MIPS64 RM9100A RM9200A
Text: RM9100A Released AM Integrated Microprocessor E9000 CORE CACHE AND I/O COHERENCY PMC-Sierra’s RM9100A Integrated Processor is a high performance 64-bit MIPS-based microprocessor with integrated memory and I/O interfaces. It is a single-core version of the RM9200A
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RM9100A
E9000
RM9100A
64-bit
RM9200A
16-KByte,
256-KByte,
64-entry
PMC-2040955
Marvell
MIPS64
RM9200A
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RM7000
Abstract: API NETWORKS hypertransport Marvell MIPS64 RM5200
Text: RM9000x2 Preliminary AM RM9000x2 Integrated Multiprocessor DUAL CPU CORES CACHE AND I/O COHERENCY The RM9000x2™ Integrated Multiprocessor is PMC-Sierra's next generation high performance MIPS processor. The RM9000x2 follows in the footsteps of the very successful PMC-Sierra
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RM9000x2
RM9000x2
RM9000x2TM
RM7000TM
RM5200TM
16-Kbyte,
256-Kbyte,
Br8555
RM9000,
RM7000
API NETWORKS
hypertransport
Marvell
MIPS64
RM5200
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Untitled
Abstract: No abstract text available
Text: RM9100A Released PM Integrated Microprocessor E9000 CORE CACHE AND I/O COHERENCY PMC-Sierra’s RM9100A Integrated Processor is a high performance 64-bit MIPS-based microprocessor with integrated memory and I/O interfaces. It is a single-core version of the RM9200A
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RM9100A
E9000
RM9100A
64-bit
RM9200A
16-KByte,
256-KByte,
64-entry
PMC-2040955
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Marvell
Abstract: MIPS64 RM-90 RM9000x2 Integrated Multiprocessor E9000
Text: RM9000x1 Preliminary RM9000x1 Integrated Microprocessor FEATURES E9000 CPU CORE CACHE AND I/O COHERENCY PMC-Sierra’s RM9000x1 Integrated Processor is a high performance 64-bit MIPS -based microprocessor with integrated memory and I/O interfaces. It is a single-core version of the
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RM9000x1
RM9000x1
E9000
RM9000x1TM
64-bit
RM9000x2TM
16-KByte,
256-KByte,
64-Entry
PMC-2021479
Marvell
MIPS64
RM-90
RM9000x2 Integrated Multiprocessor
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marvell ethernet switch
Abstract: Marvell MIPS64
Text: RM9100 Released RM9100 Integrated Microprocessor FEATURES E9000 CORE CACHE AND I/O COHERENCY PMC-Sierra’s RM9100 Integrated Processor is a high performance 64-bit MIPS -based microprocessor with integrated memory and I/O interfaces. It is a single-core version of the RM9100™
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RM9100
RM9100
E9000
RM9100TM
64-bit
RM9100TM
16-KByte,
256-KByte,
64-entry
PMC-2021479
marvell ethernet switch
Marvell
MIPS64
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MC68349FT25A
Abstract: mc68349 users manual TH 9437 MC68349FT25 MC68330 MC68340 MC68349 VT100
Text: Freescale Semiconductor, Inc. Hardware resets are held off until completion of the current operand transfer in order to maintain operand coherency. The processor resets at the end of the bus cycle in which the last portion of the operand is transferred, or after the bus monitor has timed out. The bus monitor operates for this specific case whether it is enabled or
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SIM49
MC68349FT25A
mc68349 users manual
TH 9437
MC68349FT25
MC68330
MC68340
MC68349
VT100
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litton cpu
Abstract: MX 232 military multichip litton military mcm cpu MCP-96 cpu guidance litton mcm military mcm I960 mx
Text: MILITARY MULTICHIP MODULES LITTON GUIDANCE & CONTROL SYSTEMS i960 MC/MX CPU Computers Using Silicon Substrate MCMs • ■ ■ ■ ■ ■ ■ ■ ■ ■ 10-38 MIPs Microminiaturized Computers With Processor, Memory and I/O in Pin-Compatible Multichip
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MCP96)
MXP-96)
16-Bit
RS-232
MXP-96
MCP-96
litton cpu
MX 232
military multichip
litton
military mcm cpu
cpu guidance
litton mcm
military mcm
I960 mx
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MC9S08MP16
Abstract: SE161
Text: Freescale Semiconductor Mask Set Errata MSE9S08MP16_1M84P Rev. 1, 5/2009 Mask Set Errata for Mask 1M84P Introduction This report applies to mask 1M84P for these products: • MC9S08MP16 • MC9S08MP12 MCU Device Mask Set Identification The mask set is identified by a 5-character code consisting of a version number, a letter, two numerical digits, and
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MSE9S08MP16
1M84P
1M84P
MC9S08MP16
MC9S08MP12
0J27F.
MC9S08MP16
SE161
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MC9S08MP16
Abstract: MC9S08MP12
Text: Freescale Semiconductor Mask Set Errata MSE9S08MP16_0M84P Rev. 1, 05/2009 Mask Set Errata for Mask 0M84P Introduction This report applies to mask 0M84P for these products: • MC9S08MP16 • MC9S08MP12 MCU Device Mask Set Identification The mask set is identified by a 5-character code consisting of a version number, a letter, two numerical digits, and
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MSE9S08MP16
0M84P
0M84P
MC9S08MP16
MC9S08MP12
0J27F.
MC9S08MP16
MC9S08MP12
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uPD30710
Abstract: VR10000 Series VR12000A R12000 mips R2000 mips R2000 mips processor U12754E
Text: User’s Manual VR10000 Series 64-/32-bit Microprocessor µPD30700 VR10000™ µPD30700L (VR10000L™) µPD30710 (VR12000™) µPD30710A (VR12000A™) µPD30710L (VR12000L™) Document No. U10278EJ4V0UM00 (4th edition) Date Published March 2001 N CP(K)
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VR10000
64-/32-bit
PD30700
VR10000TM)
PD30700L
VR10000LTM)
PD30710
VR12000TM)
PD30710A
VR12000ATM)
uPD30710
VR10000 Series
VR12000A
R12000 mips
R2000 mips
R2000 mips processor
U12754E
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apn 2054
Abstract: buc ku MPC602 MPC60XBUSRM M-604 MPR601UMU-02 tcn ape MPR603EUM-01 MPC601EC
Text: Freescale Semiconductor, Inc. Freescale Semiconductor, Inc. MPC60XBUSRM 1/2004 Rev. 0.1 PowerPC Microprocessor Family: The Bus Interface for 32-Bit Microprocessors For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc.
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MPC60XBUSRM
32-Bit
CH370
apn 2054
buc ku
MPC602
MPC60XBUSRM
M-604
MPR601UMU-02
tcn ape
MPR603EUM-01
MPC601EC
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PR2000
Abstract: PR3000A MIPS R3000A R2000 mips processor
Text: PERFORMANCE INTEGRATED MIPS MODULE PIMM” FEATURES: • • bus snooper to assist In maintaining cache coherency in multiprocessor systems Single VLSI multichip module contains: • PR3000A CPU • PR3010A FPA ■ P4C92815 x4 Bicameral SCRAM contains: • 32 KBytes each of address latched
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PR3000A
PR3010A
PR3100A
P4C92815
40MHz
144-pin
MIL-STD-883C,
PR2000
MIPS R3000A
R2000 mips processor
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Cy7C601
Abstract: D6336 7C605
Text: CY7C605A r ^ p p rc c SEMICONDUCTOR Features • M ultiprocessing support • Pin-compatible with CY7C604A • Cache coherency protocol modeled af ter IEEE Futurebus • Separate virtual and physical cache tag memories — Each cache tag memory holds 2048
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CY7C604A
32-bit
36-bit
32-byte
CY7C605A
7C605A
7C601
Cy7C601
D6336
7C605
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