tcam
Abstract: R8A20410BG renesas tcam tcam renesas renesas CAM R8A2041 Xelerated tcam TCAM chip Xelerated ternary content addressable memory
Text: 20Mbit QUAD-Search Content Addressable Memory Features & Benefits 20Mbit density Supports large routing tables and enables low-cost, low-power, more reliable system designs 360 Million Searches per Second MSPS per table Delivers the industry’s highest packet look-up
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20Mbit
640-bit
0410/in-house/PF/SP
R10PF0001EU0100
tcam
R8A20410BG
renesas tcam
tcam renesas
renesas CAM
R8A2041
Xelerated tcam
TCAM chip
Xelerated
ternary content addressable memory
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netlogic CAM
Abstract: "Content Addressable Memory" Netlogic Content Addressable Memory NetLogic Microsystems Priority Encoder CAM "content addressable memory" search compare 01AEH 0127H 0927H
Text: NL81480A NL82480A 1K X 64 2K X 64 Content Addressable Memory NCAM Features • • • • • • • • • 1K or 2K x 64 CAM architecture with 16-bit I/O interface Dual configuration registers for rapid context switching Readable Device ID Fast operating mode with no wait states after a no-match
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NL81480A
NL82480A
16-bit
I/O15
44-Pin
120ns
netlogic CAM
"Content Addressable Memory"
Netlogic
Content Addressable Memory
NetLogic Microsystems
Priority Encoder CAM
"content addressable memory" search compare
01AEH
0127H
0927H
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content addressable memory low power
Abstract: "Content Addressable Memory"
Text: IDT 75K75150 Power Management Application Brief AN-288 Application Brief AN-288 IDT 75K75150 Power Management To request the full application note, please contact your local IDT Sales Representative or call 1-831-754-4555 Overview Application Note Topics IDT's 75K75150 provides advanced power management features
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75K75150
AN-288
DSC-6075/00
content addressable memory low power
"Content Addressable Memory"
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MCM69C233
Abstract: MPC8260
Text: Freescale Semiconductor, Inc. White Paper MCM69C233WP/D Rev. 2, 1/2003 Freescale Semiconductor, Inc. MPC8260 PowerQUICC IITM to CAM Interfacing – MCM69C233 Eric Jackson Technical Marketing, NCSD Networking & Computing Systems Group The purpose of this document is to provide the designer a hardware method of interfacing the
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MCM69C233WP/D
MPC8260
MCM69C233
MCM69C233
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ternary content addressable memory VHDL
Abstract: ARM1020E SMART ASIC bga ARM dual port SRAM compiler Samsung ASIC 0.13um standard cell library Standard Cell 0.13um System-On-Chip ASIC DSPG samsung lcd JTAG "content addressable memory" precharge
Text: V S MSUNG STDL150 ELECTRONICS STDL150 Standard Cell 0.13um System-On-Chip ASIC March 2003, V2.0 Features Analog cores - Ldrawn = 0.13um 1.5/2.5/3.3V Device 1.5/2.5/3.3V - Up to 45.8 million gates Interface - Power dissipation: 13nW/MHz@1.5V, 2SL, ND2 5.0V
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STDL150
STDL150
13nW/MHz
ARM920T/ARM940T,
ternary content addressable memory VHDL
ARM1020E
SMART ASIC bga
ARM dual port SRAM compiler
Samsung ASIC
0.13um standard cell library
Standard Cell 0.13um System-On-Chip ASIC
DSPG
samsung lcd JTAG
"content addressable memory" precharge
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SP-353
Abstract: MCM69C433 MPC8260 EMEC SP353
Text: Freescale Semiconductor, Inc. White Paper MCM69C433WP/D Rev. 2 ,1/2003 Freescale Semiconductor, Inc. MPC8260 PowerQUICC IITM to CAM Interfacing – MCM69C433 Eric Jackson, Technical Marketing, NCSD Networking & Computing Systems Group The purpose of this document is to provide the designer a hardware method of interfacing the
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MCM69C433WP/D
MPC8260
MCM69C433
MCM69C433
SP-353
EMEC
SP353
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Untitled
Abstract: No abstract text available
Text: 74AHC259-Q100; 74AHCT259-Q100 8-bit addressable latch Rev. 1 — 22 July 2013 Product data sheet 1. General description The 74AHC259-Q100; 74AHCT259-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with
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74AHC259-Q100;
74AHCT259-Q100
74AHCT259-Q100
AHCT259
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Untitled
Abstract: No abstract text available
Text: 74HC259-Q100; 74HCT259-Q100 8-bit addressable latch Rev. 1 — 30 July 2012 Product data sheet 1. General description The 74HC259-Q100; 74HCT259-Q100 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL LSTTL . They are specified in compliance with
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74HC259-Q100;
74HCT259-Q100
74HCT259-Q100
HCT259
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Untitled
Abstract: No abstract text available
Text: 74HC259-Q100; 74HCT259-Q100 8-bit addressable latch Rev. 1 — 30 July 2012 Product data sheet 1. General description The 74HC259-Q100; 74HCT259-Q100 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL LSTTL . They are specified in compliance with
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74HC259-Q100;
74HCT259-Q100
74HCT259-Q100
HCT259
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Untitled
Abstract: No abstract text available
Text: SN54HC259, SN74HC259 8ĆBIT ADDRESSABLE LATCHES SCLS134E − DECEMBER 1982 − REVISED SEPTEMBER 2003 D D D D D D D D D D 10 LSTTL Loads Low Power Consumption, 80-µA Max ICC Typical tpd = 14 ns ±4-mA Output Drive at 5 V Low Input Current of 1 µA Max 8-Bit Parallel-Out Storage Register
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SN54HC259,
SN74HC259
SCLS134E
SN54HC259
SN74HC259
yd013
sdyu001x
sgyc003d
SN74HC4851/HC4852
scyb019b
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74HCT25
Abstract: No abstract text available
Text: 74HC259; 74HCT259 8-bit addressable latch Rev. 5 — 7 August 2012 Product data sheet 1. General description The 74HC259; 74HCT259 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL LSTTL . They are specified in compliance with JEDEC
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74HC259;
74HCT259
74HCT259
HCT259
74HCT25
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Untitled
Abstract: No abstract text available
Text: 74HC259; 74HCT259 8-bit addressable latch Rev. 5 — 7 August 2012 Product data sheet 1. General description The 74HC259; 74HCT259 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL LSTTL . They are specified in compliance with JEDEC
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74HC259;
74HCT259
74HCT259
HCT259
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PCF8544
Abstract: PCF8810 "Philips Semiconductors" "Selection" "Guide" SO8L pcf85163 graphic lcd initialisation PCF2103 PCF8591 for RTC PCF8584 LCD based on I2C
Text: Philips Semiconductors Selection guide Display driver, real-time clock and I2C-bus peripheral ICs Display drivers — seeing is believing Our LCD drivers can be used in a broad range of telecom display applications with low power consumption requirements. Our range includes:
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P82B96
PCF1252-X
PCF8591
100kHz
DIP16,
IC03a
PCF8544
PCF8810
"Philips Semiconductors" "Selection" "Guide"
SO8L
pcf85163
graphic lcd initialisation
PCF2103
PCF8591 for RTC
PCF8584
LCD based on I2C
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pci600
Abstract: PT-PCI600-10716 chipset mtbf mic connector pci600 semiconductor diode PT-PCI600 RJ45 SMT Content Addressable Memory SUPERNET AMD Supernet
Text: Features -Benefits PT-PCI600 PCI FDDI Adapter ◆ Single Slot FDDI, Dual or Single Attach DAS or SAS Allowing for concentrator connectivity or backbone configurations ◆ Available with SC, MIC (Fiber) or UTP (RJ-45) connectors Flexibility to fit into existing network
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PT-PCI600
RJ-45)
PCI600
PT-PCI600-10715
PT-PCI600-10716
PT-PCI600-10717
PT-PCI600-10718
PT-PCI600-10719
079A006710
PT-PCI600-10716
chipset mtbf
mic connector
pci600 semiconductor diode
RJ45 SMT
Content Addressable Memory
SUPERNET
AMD Supernet
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Untitled
Abstract: No abstract text available
Text: 74HC259; 74HCT259 8-bit addressable latch Rev. 03 — 8 January 2009 Product data sheet 1. General description The 74HC259; 74HCT259 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard
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74HC259;
74HCT259
74HCT259
HCT259
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74AHC259
Abstract: 74AHC259D 74AHC259PW 74AHCT259 74AHCT259D 74AHCT259PW
Text: 74AHC259; 74AHCT259 8-bit addressable latch Rev. 02 — 15 May 2008 Product data sheet 1. General description The 74AHC259; 74AHCT259 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard
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74AHC259;
74AHCT259
74AHCT259
AHCT259
74AHC259
74AHC259D
74AHC259PW
74AHCT259D
74AHCT259PW
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Xtensa
Abstract: IEEE 802.11n g.722.2 G.711.1 dsp echo pitch Atlanta-100 dsp based echo cancellation RMII to WLAN Gigabit Ethernet PHY fbga Tensilica
Text: Atlanta 1000 TM Product Brief Gigabit Communications Processor Family The Atlanta 1000 communications processor delivers wire-speed IEEE 802.11n WiFi performance and carrier-grade Voice-over-IP VoIP with the lowest power consumption and bill-ofmaterials (BOM) cost of processors in its class.
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Untitled
Abstract: No abstract text available
Text: 74AHC259; 74AHCT259 8-bit addressable latch Rev. 02 — 15 May 2008 Product data sheet 1. General description The 74AHC259; 74AHCT259 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard
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74AHC259;
74AHCT259
74AHCT259
AHCT259
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SJA1000 application note
Abstract: 80C51 SJA1000 Philips SJA1000 standalone CAN of the Philips SJA1000 standalone CAN c P8xC591
Text: P8xC591 CAN 2.0B microcontroller Semiconductors Description The P8xC591 is a single-chip 80C51 microcontroller with an on-chip CAN controller. It uses the powerful 80C51 instruction set and includes the successful PeliCAN functionality of the SJA1000 stand-alone CAN controller.
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P8xC591
P8xC591
80C51
SJA1000
8xC591
11-bit
29-bit
64-byte
13-byte
SJA1000 application note
Philips SJA1000 standalone CAN
of the Philips SJA1000 standalone CAN c
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tms 1035
Abstract: TDD 1605 f100145 resistor Mk2 F100142 content addressable memory "content addressable memory" search compare match current voltage
Text: fjWX National äim Semiconductor F100142 4 x 4-Bit Content Addressable Memory General Description The F100142 is a 4 word by 4-bit Content Addressable Memory CAM . Reading is accomplished when an address select input (Ao. Ay, A2, A 3) is LOW and the write strobe
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F100142
F100142
tl/f/9857-10
YB15-YB12
YB11-YB8
VB3-Y80
F10014S
OB15-OB12
D3-00
F10014S
tms 1035
TDD 1605
f100145
resistor Mk2
content addressable memory
"content addressable memory" search compare match current voltage
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a316j
Abstract: tms 374 a-316j ata 450 ws resistor Mk2
Text: F100142 4 x 4-Bit Content Addressable Memory F A IR C H IU 3 A Schlumberger Company F100K ECL Product Description The F100142 is a 4 word by 4-bit Content Addressable Memory CAM . Reading is accomplished when an address select input (Aq, A7i A2, A3) is LOW and the write
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F100142
F100K
24-Pin
F100145s
16-bit
YB15-YB12
Y83-YB0
a316j
tms 374
a-316j
ata 450 ws
resistor Mk2
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mk2 resistor
Abstract: resistor Mk2 F100145 M/F100142
Text: F A IR C H F100142 4 x 4-Bit Content Addressable Memory IL D A Schlumberger Company F100K ECL Product Description The F100142 is a 4 word by 4-bit Content Addressable M em ory CAM . Reading is accom plished when an address select input (Ag, A 7, A 2, A 3) is LOW and the write
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F100142
F100K
24-Pin
F100145
mk2 resistor
resistor Mk2
M/F100142
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Untitled
Abstract: No abstract text available
Text: Not Intended For New Designs 100142 £3 National A Ü Semiconductor 100142 4 x 4-Bit Content Addressable Memory General Description The 100142 is a 4 word by 4-bit Content Addressable Mem ory CAM . Reading is accomplished when an address se lect input (Ao, A 7 , A 2 , A 3) is LOW and the write strobe input
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100145s
16-bit
YB15-YB12
YB11-YBB
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resistor Mk2
Abstract: No abstract text available
Text: F100142 4 x 4-Bit Content Addressable Memory General Description The F100142 is a 4 w ord by 4-bit C on te n t A ddressable M em ory CAM . Reading is accom plished w hen an address select input (Ao, A 7, ^ A 3) is LOW and th e w rite strobe input (W 3) is HIGH. The corresponding stored w ord appears
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F100142
F100145s
16-bit
YB15-VB12
YB11-YB*
resistor Mk2
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