F100K
Abstract: SY100S313 SY100S313FC SY100S313JC SY100S313JCTR
Text: QUAD DRIVER FEATURES O1b O2a O2b O1a PIN CONFIGURATIONS O2a Oa VEES 11 10 9 8 7 6 5 Da Db 12 13 14 15 16 17 18 VEE VEES E Dc BLOCK DIAGRAM Dd Top View PLCC J28-1 4 3 O2b O1b 2 1 VCCA VCC VCC 28 27 O1c 26 O2c O1b O2b O1c O2c O1c E Da VEE Db 24 23 22 21 20 19
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J28-1
F24-1
SY100S31
SY100S313FC
SY100S313JC
SY100S313JCTR
SY100S313
F100K
SY100S313
SY100S313FC
SY100S313JC
SY100S313JCTR
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Untitled
Abstract: No abstract text available
Text: P R E L IM IN A RY PACIFIC MONOLITHICS DA I A M il l I PM2303 2000-5500 MHz GaAs MMIC Downconverter Features: • • • • 15 dB Conversion Gain Fully Matched Ports 14 Pin Plastic SOIC Internal LO Buffer Amplifier The PM2303 is a GaAs monolithic wideband frequency converter complete with LO buffer, RF amplifiers, double-balanced mixer and IF
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PM2303
PM2303
408-732-HOOO,
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CD 4511 PIN CONFIGURATION
Abstract: pin configuration 4511 4511 pin configuration pin diagram decoder 4511 40511 4526B 4006B 4015B 40160B 4021B
Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-CMOS C42 4015B C43 4014B 5 l l l i PE 7 — 9 - 1 5 - Da CPA 1— MRa d B cpb 4 3 DS 10 - CP Pq Pi 14 10 *DD - Pin 16 ^SS = Pin 8 T TT 13 12 11 1 0 - CP P 3 p4 P2 Q5 q 6 07 C45 4006B 7 6 5 4 13 14 15
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4015B
QOBq18Â
4014B
4021B
4006B
3c04cÂ
4731B
40160B,
40161B
40160B
CD 4511 PIN CONFIGURATION
pin configuration 4511
4511 pin configuration
pin diagram decoder 4511
40511
4526B
4006B
4015B
4021B
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4006B
Abstract: 4014B 4015B 40160B 40161B 40194B 40195B 4021B 4031B 4035B
Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-CMOS C42 4015B C43 4014B 5 7— 9 - PE Da 1 5 - dB 11 - DS CPA 1— cpb 10- CP 4 3 Pq P i 14 10 TTT 13 12 11 CP P2 P p4 p5 p6 p7 Vn n = Pin 16 DD ^SS =Pin 8 C45 4006B I l I I I I I I I 1 0 - 15 2 C44
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4015B
QOBq18Â
4014B
4021B
4006B
3c04cÂ
4731B
40160B,
40161B
4557B
4006B
4014B
4015B
40160B
40161B
40194B
40195B
4021B
4031B
4035B
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qml-38535
Abstract: QML-38534 A1830 A1657
Text: REVISIONS LTR DESCRIPTION A dded C ase o u t l i n e Z. DATE YR-MO-DA R e d re w e n t i r e d o c u m e n t. 9 5 - 10-12 APPROVED K.A. C o t t o n g im REV SHEET REV SHEET 15 16 17 REV STATUS OF SHEETS 18 19 20 21 22 23 REV SHEET PMIC N/A STANDARD MICROCIRCUIT
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1024KX
32-BIT,
MIL-STD-883
5962-XXXXXZZ
QML-38534
QML-38535
MIL-BUL-103
A1830
A1657
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PDF
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93L38
Abstract: 9338PC
Text: 38 CO NNECTIO N DIAGRAM PINOUT A «^ 9338 93L38 o /o SS S ' 8-BIT MULTIPLE PORT REGISTER DESCRIPTION — The ’38 is an 8-bit m ultiple port register designed for high speed random access mem ory applications where the ability to sim ulta neously read and write is desirable. A com m on use would be as a register
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93L38
9338PC
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PDF
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ABIC3
Abstract: DIGITAL ali RECEIVER
Text: SYM92C500 QUICK REFERENCE PIN DESCRIPTIONS Table 1 Pinout Summary Pin No. 1 Signal Name Type Interface M D A T A 30 2 M D A T A (31) -M A B O R T -U PIN T i/o i/o i DM I DMI DM I od HP UPDATA(O) i/o D ata Bus B it 0 U P D A T A (l) i/o HP M-P U PD A TA (2)
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SYM92C500
ABIC3
DIGITAL ali RECEIVER
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PDF
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SL74HC323
Abstract: SL74HC323D SL74HC323N da qg
Text: SL74HC323 8-Bit Bidirectional Universal Shift Register with Parallel I/O High-Performance Silicon-Gate CMOS The SL74HC323 is identical in pinout to the LS/ALS323. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.
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SL74HC323
SL74HC323
LS/ALS323.
SL74HC323N
SL74HZ;
SL74HC323D
da qg
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SL74HC299D
Abstract: SL74HC299 SL74HC299N
Text: SL74HC299 8-Bit Bidirectional Universal Shift Register with Parallel I/O High-Performance Silicon-Gate CMOS The SL74HC299 is identical in pinout to the LS/ALS299. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.
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SL74HC299
SL74HC299
LS/ALS299.
SL74HC299D
SL74HC299N
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KK74HC323A
Abstract: No abstract text available
Text: TECHNICAL DATA KK74HC323A 8-Bit Bidirectional Universal Shift Register with Parallel I/O High-Performance Silicon-Gate CMOS The KK74HC323A is identical in pinout to the LS/ALS323. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.
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KK74HC323A
KK74HC323A
LS/ALS323.
loadi25
013AC)
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Untitled
Abstract: No abstract text available
Text: TECHNICAL DATA IN74HC323A 8-Bit Bidirectional Universal Shift Register with Parallel I/O High-Performance Silicon-Gate CMOS The IN74HC323A is identical in pinout to the LS/ALS323. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.
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IN74HC323A
IN74HC323A
LS/ALS323.
013AC)
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Untitled
Abstract: No abstract text available
Text: 256 CO NN ECTIO N DIAGRAM PINOUT A 54LS/74LS256 v n u ~ f DUAL 4-BIT ADDRESSABLE LATCH AoQ SI VCC A ,H i s ] CL 14J È D „ [3 Qoa ^ DESCRIPTION — The ’256 is a dual 4-b it addressable latch w ith com m on control inputs; these include tw o Address inputs Ao, Ai , an active LOW En
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54LS/74LS256
54/74LS
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Untitled
Abstract: No abstract text available
Text: TECHNICAL DATA IN74HC299A 8-Bit Bidirectional Universal Shift Register with Parallel I/O High-Performance Silicon-Gate CMOS The IN74HC299A is identical in pinout to the LS/ALS299. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.
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IN74HC299A
IN74HC299A
LS/ALS299.
013AC)
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Untitled
Abstract: No abstract text available
Text: TECHNICAL DATA KK74HC299A 8-Bit Bidirectional Universal Shift Register with Parallel I/O High-Performance Silicon-Gate CMOS The KK74HC299A is identical in pinout to the LS/ALS299. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.
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KK74HC299A
KK74HC299A
LS/ALS299.
load25
013AC)
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RANGE12
Abstract: db3 9135 CY74FCT2240ATPC L 9134
Text: CY54/74FCT2240T CY54/74FCT2244T W CYPRESS Features • Function and pinout compatible with FCT and F logic • 25Q output series resistors to reduce transmission line reflection noise • FCT-C speed at 4.1 ns max. Com’l FCT-A speed at 4.8 ns max. (Com’l)
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CY54/74FCT2240T
CY54/74FCT2244T
FCT2240T
FCT2244T
20-Lead
300-Mil)
CY74FCT2244ATPC
CY74FCT2244ATOC
RANGE12
db3 9135
CY74FCT2240ATPC
L 9134
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5650300
Abstract: XXXW
Text: QED RISCMark RM5231™ 64-Bit Superscalar Microprocessor FEATURES: • Pinout com p atib le w ith po pu lar R M 5230 w ith split po w e r s u p plies 2.5V and 3.3V • Dual Issue su p e rsca la r m icro p ro ce sso r - can issue one integer and one floa ting -point in stru ction pe r cycle
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RM5231TM
64-Bit
DS-5231,
5650300
XXXW
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CY74FCT2257AT
Abstract: CY74FCT2257CT CY74FCT2257CTQC CY74FCT2257CTSOC CY74FCT2257T
Text: fax id: 7021 —— — Æ jr r ~ 'f V D D 17 Q CY74FCT2257T Q I 1 IT COO Quad 2-Input Multiplexer Features Functional Description Function and pinout compatible with FCT and F logic 250 . output series resistors to reduce transmission line reflection noise
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current15
CY74FCT2257T
FCT2257T
CY74FCT2257AT
CY74FCT2257CT
CY74FCT2257CTQC
CY74FCT2257CTSOC
CY74FCT2257T
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CY74FCT543DTSOC
Abstract: No abstract text available
Text: fax id: 7040 CY54/74FCT543T CYPRESS 8-Bit Latched Registered Transceiver Features Functional Description Function, pinout, and drive compatible with FCT and F logic FCT-C speed at 5.3 ns max. Com’I FCT-A speed at 6.5 ns max. (Com’I) Reduced V qh (typically = 3.3V) versions of equivalent
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CY54/74FCT543T
CY74FCT543DTSOC
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da53
Abstract: HY5R256HC745 HY5R256HC840 HY5R256HC845 HY5R288HC745 HY5R288HC840 HY5R288HC845 DB26 288M-BIT 512x12
Text: Direct RDRAM 256/288-Mbit 512Kx16/18x32s Preliminary Overview The Rambus Direct RDRAM™ is a general purpose highperformance memory device suitable for use in a broad range of applications including computer memory, graphics, video, and any other application where high bandwidth and
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256/288-Mbit
512Kx16/18x32s)
256/288-Mbit
600MHz
800MHz
da53
HY5R256HC745
HY5R256HC840
HY5R256HC845
HY5R288HC745
HY5R288HC840
HY5R288HC845
DB26
288M-BIT
512x12
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da53
Abstract: HY5R128HC745 HY5R128HC840 HY5R128HC845 HY5R144HC653 HY5R144HC745 HY5R144HC840 HY5R144HC845 HY5R144HM745 HY5R144HM845
Text: Direct RDRAM 128/144Mbit 256Kx16/18x32s Preliminary Overview The Rambus Direct RDRAM™ is a general purpose highperformance memory device suitable for use in a broad range of applications including computer memory, graphics, video, and any other application where high bandwidth and
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128/144Mbit
256Kx16/18x32s)
128/144-Mbit
600MHz
800MHz
DL0059-00
da53
HY5R128HC745
HY5R128HC840
HY5R128HC845
HY5R144HC653
HY5R144HC745
HY5R144HC840
HY5R144HC845
HY5R144HM745
HY5R144HM845
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PDF
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T2316405A
Abstract: T2316405A-10 T2316407A
Text: tm T2316405A Preliminary T2316407A TE CH 4M x 4 DYNAMIC RAM DRAM EDO PAGE MODE FEATURES GRNERAL DESCRIPTION • Industry-standard x 4 pinouts and timing functions • power supply : T2316405A 2.6V ±0.2V T2316407A 3.3V(±0.3V) • All device pins are TTL- compatible.
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T2316405A
T2316407A
T2316405A
T2316407A
2048-cycle
100ns
T2316405A-10
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61A8
Abstract: AC97 ARM920T EP9312 EP9312-CB MO-151 audio sender wireless sxp 1000 serial to parallel converter
Text: EP9312 Data Sheet FEATURES • • • • • • • • Linux , Microsoft® Windows® CE-enabled MMU 100-MHz System Bus MaverickCrunch Math Engine • Floating Point, Integer, and Signal Processing Instructions • Optimized for digital music compression and
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EP9312
100-MHz
ARM920T
DS515PP7
61A8
AC97
ARM920T
EP9312-CB
MO-151
audio sender wireless
sxp 1000 serial to parallel converter
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sxp 1000 serial to parallel converter
Abstract: EP9307-CR 61A8 AC97 ARM920T EP9307 MO-151
Text: EP9307 Data Sheet FEATURES • • • • • Linux , Microsoft® Windows® CE enabled MMU 100 MHz System Bus • • • MaverickCrunch Math Engine • Floating point, integer and signal processing instructions • Optimized for digital music compression and
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EP9307
ARM920T
DS667PP3
sxp 1000 serial to parallel converter
EP9307-CR
61A8
AC97
ARM920T
MO-151
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Outline T44
Abstract: DB26
Text: Direct RDRAM DEVICE OPERATION Change History Version 1.11 October 2000 * From Version 1.11, Samsung’s RDRAM Datasheet consists of two parts. - One thing is “Device operation” which is common for all devices and another is “Characteristics description” that accounts for each own
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