dot matrix 8*8 TOM -1588
Abstract: KS0070 DD 105 N 16 L
Text: CMOS DIGITAL INTEGRATED CIRCUIT KS0070 DOT MATRIX LCD CONTROLLER & DRIVER KS0070 is a dot m atrix LCD driver & c o n troller LSI w hich is fabricated by low pow er CMOS tech nolog y. FUNCTION • Character type dot matrix LCD driver & controller • Internal driver: 16 common and 80 segment signal
|
OCR Scan
|
KS0070
KS0070
KS0070-00;
KS0070-00
dot matrix 8*8 TOM -1588
DD 105 N 16 L
|
PDF
|
ANA 6681
Abstract: dot matrix 8*8 TOM -1588 tic 246 bd s639b ZZZB KS0070 ci 4303
Text: KS0070 CMOS DIGITAL INTEGRATED CIRCUIT DOT MATRIX LCD CONTROLLER & DRIVER KS0070 is a do t m atrix LCD driver & c o n tro lle r LSI w hich is fabricated by low pow er CMOS technology. FUNCTION • Character type dot matrix LCD driver & controller • Internal driver: 16 common and 80 segment signal
|
OCR Scan
|
KS0070
KS0070
KS0070-00;
KS0070-00
D02D741
60-QFP-1414A
64-QFP-U20D
ANA 6681
dot matrix 8*8 TOM -1588
tic 246 bd
s639b
ZZZB
ci 4303
|
PDF
|
patt 602
Abstract: SAV-CON
Text: Sav-Con Connector Savers PATT 105 - PATT 602 Sav-Con® Connector Savers 94 0 L 009 N 24 G 61 P AA-B 131 Modification Codes* Omit for None Alternate Position A,B,C,D,E,F (N = Normal) Alternate Key Configuration AA, BB, CC, DD P = Pins, Plug Side S = Sockets, Plug Side
|
Original
|
|
PDF
|
Untitled
Abstract: No abstract text available
Text: ' * - I - C LS105 u b e * SATC Controller Features Description • 33 M H z 32-bit P C I bus interface, 8 in terrap t lines to support up to 8 LSlOOs. • 32/48 bit Interface w ith standard asynchronous SR A M to cache up to 64K M A C addresses. • Supports P ort based V L A N w ith internal p ort
|
OCR Scan
|
LS105
32-bit
LS105.
|
PDF
|
ma6208
Abstract: LSI05 LS100 MA12 D-11-023 mudata
Text: LS105 ". I-Cube SATC Controller Features Description • 33 M H z 32-bit PCI bus interface, 8 interrupt lines to support up to 8 LSlOOs. • 32/48 bit Interface with standard asynchronous SRAM to cache up to 64K MAC addresses. • Supports Port based Y L A N with internal port
|
OCR Scan
|
32-bit
LS105.
LS105
LS105
D-11-023
ma6208
LSI05
LS100
MA12
D-11-023
mudata
|
PDF
|
GPI05
Abstract: ma6208 mudata lS105 GPI07 TDA 1106
Text: LS105 ". I-C ube SATC Controller Features Description • 33 M Hz 32-bit PCI bus interface, 8 interrupt lines to support up to 8 LSlOOs. • 32/48 bit Interface with standard asynchronous SRAM to cache up to 64K MAC addresses. • Supports Port based YLAN with internal port
|
OCR Scan
|
32-bit
LS105.
LS105
D-11-023
GPI05
ma6208
mudata
GPI07
TDA 1106
|
PDF
|
940-009, 941-009, 942-009
Abstract: dda 009
Text: Sav-Con connector savers PATT 105 and PATT 602 940-009, 941-009, 942-009 Bayonet Coupling 940-009 GENERAL DUTY, 941-009 ENVIRONMENTAL AND 942-009 HIGH RELIABILITY How To Order Sample Part Number 94 L Series 94 Class 0 = General Duty 1 = Environmental 2 = High Reliability
|
Original
|
|
PDF
|
MN4502B
Abstract: MN4000B
Text: MN4502B/MN4502BS CMOS Logic MN4000B Series M N4502B /M N4502BS Hex S t r o b e d Inverting B u f f e r s • Description The M N 4502B/S are 3-state o u tp u t inverting buffers w ith a strobe term inal, and can drive 1 TTL in the 74 series. I T ru th Table
|
OCR Scan
|
MN4000B
MN4502B/MN4502BS
MN4502B
/MN4502BS
MN4502B/S
16-Pin
SO-16D)
-20ns
10Vat
|
PDF
|
thyristor TT 18 N
Abstract: thyristor tt 105 n 16 thyristor tt 121 thyristor phase control rectifier diode w3 three phase fully controlled rectifier ECONOPACK DD 105 N 16 L thyristoren three phase bridge fully controlled rectifier
Text: Typenbezeichnungen Type designations Fully controlled Thyristor modules TT 121 N 18 K O F TT -A TZ 121 N F 18 L K O F -A -K with 2 symmetric thyristors with 1 symmetric thyristor limiting average on-state current A , tc = 85° C phase control thyristor fast thyristor with
|
Original
|
|
PDF
|
tt 60 n 16 kof
Abstract: thyristor TT 105 N 16 KOF THYRISTOR TT KOF thyristor tt 121 thyristor gate control circuit thyristoren ECONOPACK
Text: Type designations Typenbezeichnungen Fully controlled Thyristor modules n 121 N 18 K O with 2 symmetric thyristors with 1 symmetric thyristor limiting average on-state current A , tc = 85° C phase control thyristor fast thyristor with central gate repetitive peak off-state
|
OCR Scan
|
|
PDF
|
Untitled
Abstract: No abstract text available
Text: PREUMNARYCUSTOMERPRODUCrSPECmCAnON Z86C66 CMOSZ8 16K R O M M C R O C O N TR O LLER FEATURES Part ROM KB RAM* (Bytes) 16 256 Z86C 66 Speed (MHz) n V ectored, P rio ritized Interrupts w ith P ro g ra m m a b le P o larity n T w o A n alo g C o m p arato rs
|
OCR Scan
|
Z86C66
|
PDF
|
Untitled
Abstract: No abstract text available
Text: ► A N A LO G D E V IC E S +2.5 V to +5.5 V, 600jiA,Quad Rail-To-Rail, Voltage Output 8/10/12-Bit DACs FEATURES AD5306: Four 8-Bit D A C s in One Package AD5316: Four 10-Bit D A C s in One Package AD5326: Four 12-Bit D A C s in One Package 16-Pin T S S O P Package
|
OCR Scan
|
600jiA
8/10/12-Bit
AD5306/16/26
AD5306:
AD5316:
10-Bit
AD5326:
12-Bit
16-Pin
200nA@
|
PDF
|
cmos 7-segment decoder
Abstract: 40192B 4734B
Text: FAIRCHILD DIGITAL CMOS Cont’d 1 H 125 105 BCD-to-7-Segment Latch/Decoder/Dvr 4511B 4 1 H 90 98 3 BCD-to-7-Segment Latch/Decoder/ Dvr* for Liquid Crystals 4543B 4 — H or L 200 4 BCD-to-7-Segment Latch/Decoder/ Dvr w/Ripple Blanking 4734B 4 1 H 90 « >;
|
OCR Scan
|
4051B
4511B
4543B
4734B
4024B
4040B
cmos 7-segment decoder
40192B
4734B
|
PDF
|
Untitled
Abstract: No abstract text available
Text: International S Rectifier Data Sheet No. PD-6.026A IR2112 HIGH AND LOW SIDE DRIVER Features • Floating channel designed for bootstrap operation Fully operational to +600V Tolerant to negative transient voltage dV/dt immune ■ Gate drive supply range from 10 to 20V
|
OCR Scan
|
IR2112
0D2131D
|
PDF
|
|
Untitled
Abstract: No abstract text available
Text: H A R R CD22100 I S S E M I C O N D U C T O R CMOS 4 x 4 Crosspoint Switch with Control Memory High-Voltage Type 20V Rating January 1997 Features Description • Low ON Resistance. 75ß (Typ) at VDD = 12V CD22100 combines a 4 x 4 array of crosspoints (transmis
|
OCR Scan
|
CD22100
CD22100
16-line
|
PDF
|
CD 4511 PIN CONFIGURATION
Abstract: pin configuration 4511 4511 pin configuration pin diagram decoder 4511 40511 4526B 4006B 4015B 40160B 4021B
Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-CMOS C42 4015B C43 4014B 5 l l l i PE 7 — 9 - 1 5 - Da CPA 1— MRa d B cpb 4 3 DS 10 - CP Pq Pi 14 10 *DD - Pin 16 ^SS = Pin 8 T TT 13 12 11 1 0 - CP P 3 p4 P2 Q5 q 6 07 C45 4006B 7 6 5 4 13 14 15
|
OCR Scan
|
4015B
QOBq18Â
4014B
4021B
4006B
3c04cÂ
4731B
40160B,
40161B
40160B
CD 4511 PIN CONFIGURATION
pin configuration 4511
4511 pin configuration
pin diagram decoder 4511
40511
4526B
4006B
4015B
4021B
|
PDF
|
64KX32
Abstract: DPS6433 cwe 610 X32530
Text: □PM Dense-Pac Microsystems, Inc. DPS6433 64K X 32 C M O S SRA M M O D U LE O D ESCRIPTIO N: The DPS6433 is a fully asyncronous Static Random Access Memory SRAM and may be organized as 64KX32, 128 X 16 or 256KX8. The module is built with eight low-power CM O S
|
OCR Scan
|
DPS6433
DPS6433
64KX32,
256KX8.
32-bit
150ns
60-Pin,
A0-A15
100ns
64KX32
cwe 610
X32530
|
PDF
|
4076B
Abstract: 74C173
Text: 4076B/74C173/54C173 QUAD D FLIP-FLOP WITH 3-STATE OUTPUT D E S C R IP T IO N — T h e 4 0 7 6 B is a Q uad E dge-Triggered D F lip -F lo p w ith fo u r Data Inputs {DQ-D3 , tw o active LO W Data Enable Inputs ED g -ED ^ ), an edge-trigge red C lo ck In p ut (C P ), fo u r 3-State O u t
|
OCR Scan
|
4076B/74C173/54C173
4076B
74C173
|
PDF
|
LCD EPSON 640 x 200
Abstract: No abstract text available
Text: PF766-03 E P S O N S P C 8 1 1 F Local Bus LCD/CRT VGA Controller • DESCRIPTION The SPC81 1 0 F oa is a single chip multi-function Low Voltage LCDÀÏCRT VGA Controller with an built-in RAMDAC and a Liquid Crystal Display interface. With a built-in Hardware Cursor, a Bit Block Transfer Engine, and a CPU
|
OCR Scan
|
PF766-03
SPC81
SPC8110F
QFP8-208
QFP22-208
LCD EPSON 640 x 200
|
PDF
|
Untitled
Abstract: No abstract text available
Text: T H 1S DRAW 1NG T IS UNPUBL 1S H E D . COPY R I G H T 2 0 BY TYCO E L E C T R O N I C S R E L E A SE D CORPORATION. ALL FOR P U B L I C A T I O N RIGHTS 20 LOC REVISIONS D 1ST ES R E SE RV ED. D in B in B in B1 2 P LTR DESCR 1P T 1ON DATE DWN APVD E R E V P E R OS 12 - 0 0 6 1 - 0 3
|
OCR Scan
|
06FEB2003
20JUN2003
8AUG2004
ECR-07-004369
26FEB2007
3MAR200
I3NOV200
IMAY200
|
PDF
|
Untitled
Abstract: No abstract text available
Text: □PM DPS6434 Dense-Pac Microsystems, Inc . , 64K X 32 CM OS SRAM M ODULE DESCRIPTION: The DPS6434 is a fully asyncronous Static Random Access Memory SRAM and may be organized as 64K X 3 2 ,1 2 8 X 16 or 256K X 8. T h e module is built with eight low-power C M O S
|
OCR Scan
|
DPS6434
DPS6434
32-bit
150ns
30A038-00
|
PDF
|
thyristor tt 500 n 16
Abstract: thyristor t 500 n 1800 thyristor phase control rectifier thyristor t 500 n 18 thyristor tt 121 three phase bridge fully controlled rectifier single phase thyristor controlled rectifier DISC THYRISTOR ECONOPACK thyristor bridge circuit
Text: Type designations Thyristors IGBT: IHM & IHV modules Rectifier T 930 S 18 T M C T symmetrically blocking thyristor A asymmetrically blocking thyristor 930 limiting average forward current A at tc= 85° C 2.Letter D 1809 N 32 D 1809 N K S S fast thyristor, gatecathode interdigitated
|
Original
|
|
PDF
|
Untitled
Abstract: No abstract text available
Text: A N A LO G D E V IC E S High Performance 4/8 Channel Fault-Protected Analog Multiplexers ADG438F/ADG439F* FUNCTIONAL BLOCK DIAGRAMS FEATURES Fast Switching Times t 0N 250 ns max t 0FF 150 ns max Fault and O vervoltage Protection -40 V , +55 V All Switches OFF w ith Power Supply OFF
|
OCR Scan
|
ADG438F/ADG439F*
438F/A
16-Lead
R-16N)
R-16W)
|
PDF
|
ao21
Abstract: No abstract text available
Text: 7 " DPS6433 V 6 4 K X 32 C M O S S R A M M O D U L E D ESCRIPTIO N: The DPS6433 is a fully asyncronous Static Random Access M em ory SRAM and may be organized as 6 4 K X 3 2 , 128 X 16 or 2 5 6 K X 8. The module is built with eight low-power C M O S 32K X 8 S R A M 's and two high speed 139 decoders.
|
OCR Scan
|
DPS6433
32-bit
DPS6433
150ns
60-Pin,
ao21
|
PDF
|