Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    DDR2 SSTL CLASS Search Results

    DDR2 SSTL CLASS Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    JA4575-BL Coilcraft Inc Dual inductor, for Class D, RoHS Visit Coilcraft Inc
    GA3416- Coilcraft Inc Dual inductor, for Class D, SMT, RoHS Visit Coilcraft Inc
    GA3416-CL Coilcraft Inc Dual inductor, for Class D, SMT, RoHS Visit Coilcraft Inc
    UA8014- Coilcraft Inc Dual inductor, for Class D, SMT, RoHS Visit Coilcraft Inc
    UA8013-AL Coilcraft Inc Dual inductor, for Class D, SMT, RoHS Visit Coilcraft Inc

    DDR2 SSTL CLASS Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    HYB18T512

    Abstract: HYB18T512160AF HYB18T512400AC HYB18T512400AF HYB18T512800AC HYB18T512800AF MPPT HYB18T512400AF5
    Text: D a t a S h e e t , Rev. 1.13, M a i 2 00 4 HYB18T512[400/800/160]AC–[3.7/5] HYB18T512[400/800/160]AF–[3.7/5] 512-Mbit Double-Data-Rate-Two SDRAM DDR2 SDRAM M e m or y P r o du c t s N e v e r s t o p t h i n k i n g . The information in this document is subject to change without notice.


    Original
    HYB18T512 512-Mbit DDR2-533 DDR2-400 09112003-SDM9-IQ3P HYB18T512160AF HYB18T512400AC HYB18T512400AF HYB18T512800AC HYB18T512800AF MPPT HYB18T512400AF5 PDF

    0909NS

    Abstract: GDDR5 10x10mm, LGA, 44 pin 170-FBGA 60-LGA MARKING CL4 FBGA DDR3 x32 170FBGA 60-FBGA PC133 133Mhz cl3
    Text: DRAM Code Information 1/9 K4XXXXXXXX - XXXXXXX 1 2 3 4 1. Memory (K) 2. DRAM : 4 3. Small Classification A : Advanced Dram Technology B : DDR3 SDRAM C : Network-DRAM D : DDR SGRAM E : EDO F : FP G : GDDR5 SDRAM H : DDR SDRAM J : GDDR3 SDRAM K : Mobile SDRAM PEA


    Original
    16K/16ms 4K/32ms 8K/64ms 16K/32ms 8K/32ms 2K/16ms 4K/64ms 429ns 667ns 0909NS GDDR5 10x10mm, LGA, 44 pin 170-FBGA 60-LGA MARKING CL4 FBGA DDR3 x32 170FBGA 60-FBGA PC133 133Mhz cl3 PDF

    ITT RZ2

    Abstract: JESD8-15a Ras 1210 FDS6375 DDR2 SSTL class 470uF 25V TANT FDS7088N3 MSOP-10 SD101AWS SP2996
    Text: Solved by APPLICATION NOTE TM Low Cost, High Performance DDR Termination Using SP2996B Introduction Double Data Rate DDR SDRAM is finding its way into more and more consumer appliances, in addition to its traditional market of PCs and servers. This has led to lower cost requirements for


    Original
    SP2996B SP2996 JESD8-15A ITT RZ2 Ras 1210 FDS6375 DDR2 SSTL class 470uF 25V TANT FDS7088N3 MSOP-10 SD101AWS PDF

    Untitled

    Abstract: No abstract text available
    Text: 1 CONTENTS CHAPTER 1 OVERVIEW . 4 1.1 GENERAL DESCRIPTION . 4


    Original
    64-bit PDF

    Untitled

    Abstract: No abstract text available
    Text: 32Mx64 / 32Mx72 bits Unbuffered DDR2 SDRAM DIMM HYMP232U64 L 8/HYMP232U72(L)8 DESCRIPTION Preliminary Hynix HYMP232U64(72)8 series is unbuffered 240-pin double data rate 2 Synchronous DRAM Dual In-Line Memory Modules (DIMMs) which are organized as 32Mx64(72) high-speed memory arrays. HYMP232U64(72)8 series consists


    Original
    32Mx64 32Mx72 HYMP232U64 8/HYMP232U72 240-pin 32Mx8 60-Lead PDF

    DDR2 SSTL class

    Abstract: ck2142 HYMP564U64 DM0165
    Text: 64Mx64 / 64Mx72 bits Unbuffered DDR2 SDRAM DIMM HYMP564U648/HYMP564U728 DESCRIPTION Preliminary Hynix HYMP564U64 72 8 series is unbuffered 240-pin double data rate 2 Synchronous DRAM Dual In-Line Memory Modules (DIMMs) which are organized as 64Mx64(72) high-speed memory arrays. Hynix HYMP564U64(72)8 series


    Original
    64Mx64 64Mx72 HYMP564U648/HYMP564U728 HYMP564U64 240-pin 64Mx8 60-Lead DDR2 SSTL class ck2142 DM0165 PDF

    PS 229

    Abstract: No abstract text available
    Text: 32Mx64 bits Unbuffered DDR2 SDRAM Lead-Free DIMM HYMP532U64 L P6 Revision History No. 0.1 History Draft Date Defined Target Spec. Apr. 2004 1) Corrected Pin assignment table & 2) Corrected SPD typo(Byte #31) July 2004 Designated Pin Cap. Spec. Aug. 2004 Remark


    Original
    HYMP532U64 32Mx64 HYMP532U646 240-pin PS 229 PDF

    Untitled

    Abstract: No abstract text available
    Text: 32Mx64 bits Unbuffered DDR2 SDRAM Lead-Free DIMM HYMP532U64 L P6 Revision History No. 0.1 History Draft Date Defined Target Spec. Apr. 2004 1) Corrected Pin assignment table & 2) Corrected SPD typo(Byte #31) July 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any


    Original
    32Mx64 HYMP532U64 HYMP532U646 240-pin PDF

    Untitled

    Abstract: No abstract text available
    Text: 32Mx64 bits Unbuffered DDR2 SDRAM DIMM HYMP532U64 L 6 Revision History No. 0.1 History Draft Date Defined Target Spec. Mar. 2004 1) Corrected Pin assignment table & 2) Corrected SPD typo(Byte #31) July 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any


    Original
    32Mx64 HYMP532U64 HYMP532U646 240-pin HYMP532U648 PDF

    25TAC

    Abstract: HYMP512U64
    Text: 128Mx64 / 128Mx72 bits Unbuffered DDR2 SDRAM DIMM HYMP512U64 L 8/HYMP512U72(L)8 Revision History No. History Draft Date 0.1 Defined Target Spec. Mar. 2004 0.2 1) Added Pin Capacitance Spec. 2) Changed SPD typo #41 Apr. 2004 Corrected Pin assignment table & SPD typo (Byte #03, 14)


    Original
    HYMP512U64 8/HYMP512U72 128Mx64 128Mx72 240-pin 25TAC PDF

    HYMP112U64

    Abstract: No abstract text available
    Text: 128Mx64 / 128Mx72 bits Unbuffered DDR2 SDRAM DIMM HYMP112U648/HYMP112U728 Revision History No. 0.1 History Defined target spec. Draft Date Remark May. 2004 This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any


    Original
    HYMP112U648/HYMP112U728 128Mx64 128Mx72 HYMP112U64 240-pin PDF

    Untitled

    Abstract: No abstract text available
    Text: 64Mx64 / 64Mx72 bits Unbuffered DDR2 SDRAM DIMM HYMP264U64 L 8/HYMP264U72(L)8 Revision History No. History Draft Date 0.1 Defined Target Spec. Jan. 2004 0.2 Added Pin Capacitance Spec. & IDD Spec. Apr. 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any


    Original
    64Mx64 64Mx72 HYMP264U64 8/HYMP264U72 240-pin PDF

    CK2102

    Abstract: DDR2-400 DDR2-533 HYMP512U64 MO-237 PC2-3200 PC2-4300 DDR2 DIMM 240 pin names
    Text: 128Mx64 / 128Mx72 bits Unbuffered DDR2 SDRAM DIMM HYMP512U64 L 8/HYMP512U72(L)8 Revision History No. History Draft Date 0.1 Defined Target Spec. Mar. 2004 0.2 1) Added Pin Capacitance Spec. 2) Changed SPD typo #41 Apr. 2004 Corrected Pin assignment table & SPD typo (Byte #03, 14)


    Original
    128Mx64 128Mx72 HYMP512U64 8/HYMP512U72 240-pin CK2102 DDR2-400 DDR2-533 MO-237 PC2-3200 PC2-4300 DDR2 DIMM 240 pin names PDF

    Untitled

    Abstract: No abstract text available
    Text: 128Mx64 / 128Mx72 bits Unbuffered DDR2 SDRAM DIMM HYMP512U64 L 8/HYMP512U72(L)8 Revision History No. History Draft Date 0.1 Defined Target Spec. Mar. 2004 0.2 1) Added Pin Capacitance Spec., 2) Corrected a typo of SPD byte #41(tRC) Apr. 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any


    Original
    128Mx64 128Mx72 HYMP512U64 8/HYMP512U72 240-pin PDF

    Untitled

    Abstract: No abstract text available
    Text: 64Mx64 / 64Mx72 bits Unbuffered DDR2 SDRAM DIMM HYMP264U64 L 8/HYMP264U72(L)8 DESCRIPTION Preliminary Hynix HYMP264U64(72)8 series is unbuffered 240-pin double data rate 2 Synchronous DRAM Dual In-Line Memory Modules (DIMMs) which are organized as 64Mx64(72) high-speed memory arrays. Hynix HYMP264U64(72)8 series


    Original
    64Mx64 64Mx72 HYMP264U64 8/HYMP264U72 240-pin 32Mx8 60-Lead PDF

    Untitled

    Abstract: No abstract text available
    Text: 64Mx64 / 64Mx72 bits Unbuffered DDR2 SDRAM DIMM HYMP564U648/HYMP564U728 DESCRIPTION Preliminary Hynix HYMP564U64 72 8 series is unbuffered 240-pin double data rate 2 Synchronous DRAM Dual In-Line Memory Modules (DIMMs) which are organized as 64Mx64(72) high-speed memory arrays. Hynix HYMP564U64(72)8 series


    Original
    64Mx64 64Mx72 HYMP564U648/HYMP564U728 HYMP564U64 240-pin 64Mx8 60-Lead PDF

    Untitled

    Abstract: No abstract text available
    Text: 16Mx64 bits Unbuffered DDR2 SDRAM DIMM HYMP216U64 L 6 DESCRIPTION Preliminary Hynix HYMP216U646 series is unbuffered 240-pin double data rate 2 Synchronous DRAM Dual In-Line Memory Modules (DIMMs) which are organized as 16Mx64 high-speed memory arrays. Hynix HYMP216U648 series consists of


    Original
    16Mx64 HYMP216U64 HYMP216U646 240-pin HYMP216U648 16Mx16 PDF

    Untitled

    Abstract: No abstract text available
    Text: 32Mx64 bits Unbuffered DDR2 SDRAM Pb-FREE DIMM HYMP532U64 L P6 DESCRIPTION Preliminary Hynix HYMP532U646 series is unbuffered 240-pin double data rate 2 Synchronous DRAM Dual In-Line Memory Modules (DIMMs) which are organized as 32Mx64 high-speed memory arrays. Hynix HYMP532U648 series consists of


    Original
    32Mx64 HYMP532U64 HYMP532U646 240-pin HYMP532U648 32Mx16 84-Lead PDF

    Marvell rgmii layout guide

    Abstract: MARVELL CONFIDENTIAL, under NDA SATA Port Multiplier Electronic Circuit Diagram Marvell 88f5182 MV-S103345-00 MV-S300281-00 MV-S103315-001 ym 6631 marvell sata Marvell register map
    Text: Cover 88F5182 Feroceon Storage Networking SoC Datasheet Doc. No. MV-S103345-00, Rev. E April 29, 2008, Preliminary Marvell. Moving Forward Faster Document Classification: Proprietary Information 88F5182 Datasheet Document Conventions Note: Provides related information or information of special importance.


    Original
    88F5182 MV-S103345-00, 88F5182 MV-S103345-00 Marvell rgmii layout guide MARVELL CONFIDENTIAL, under NDA SATA Port Multiplier Electronic Circuit Diagram Marvell 88f5182 MV-S300281-00 MV-S103315-001 ym 6631 marvell sata Marvell register map PDF

    HC210

    Abstract: EP2S30 HC220 HC230 HC240 SSTL-18 PCI-x I/O
    Text: Using Legacy Integrated Static Data Path and Controller Megafunction with HardCopy II Structured ASICs Application Note 413 July 2007, ver 2.1 Introduction HardCopy II devices are low-cost, high-performance, 1.2-V, 90 nm structured ASICs with pinouts, densities, and architecture that


    Original
    PDF

    Untitled

    Abstract: No abstract text available
    Text: 32Mx64 / 32Mx72 bits Unbuffered DDR2 SDRAM DIMM HYMP232U64 L 8/HYMP232U72(L)8 Revision History No. History Draft Date 0.1 Defined Target Spec. Jan. 2004 0.2 Added Pin Capacitance Spec. & IDD Spec. Mar. 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any


    Original
    HYMP232U64 8/HYMP232U72 32Mx64 32Mx72 240-pin PDF

    Untitled

    Abstract: No abstract text available
    Text: 64Mx64 / 64Mx72 bits Unbuffered DDR2 SDRAM DIMM HYMP564U648/HYMP564U728 Revision History No. History Draft Date 0.1 Defined Target Spec. Jan. 2004 0.2 1 Added Pin Capacitance Spec. , 2) Corrected typos of SPD Byte # 22,40,41,63 Apr. 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any


    Original
    64Mx64 64Mx72 HYMP564U648/HYMP564U728 HYMP564U64 240-pin PDF

    Untitled

    Abstract: No abstract text available
    Text: 16Mx64 bits Unbuffered DDR2 SDRAM DIMM HYMP216U64 L 6 Revision History No. 0.1 History Draft Date Defined Target Spec. Jan. 2004 Corrected Pin assignment table July 2004 Defignated Pin Cap. Spec. Remark Aug. 2004 This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any


    Original
    HYMP216U64 16Mx64 HYMP216U646 240-pin HYMP216U648 PDF

    dm0165

    Abstract: HYMP564U64 DDR2-400 DDR2-533 MO-237 PC2-3200 PC2-4300 DDR2 DIMM 240 pin names
    Text: 64Mx64 / 64Mx72 bits Unbuffered DDR2 SDRAM DIMM HYMP564U648/HYMP564U728 Revision History No. 0.1 0.2 History Draft Date Defined Target Spec. Jan. 2004 Added Pin Capacitance Spec. Apr. 2004 Corrected Pin assignment table & SPD. July 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any


    Original
    64Mx64 64Mx72 HYMP564U648/HYMP564U728 HYMP564U64 240-pin dm0165 DDR2-400 DDR2-533 MO-237 PC2-3200 PC2-4300 DDR2 DIMM 240 pin names PDF