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    DELAY LINE 100NS Search Results

    DELAY LINE 100NS Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    NFMJMPC226R0G3D Murata Manufacturing Co Ltd Data Line Filter, Visit Murata Manufacturing Co Ltd
    NFM15PC755R0G3D Murata Manufacturing Co Ltd Feed Through Capacitor, Visit Murata Manufacturing Co Ltd
    NFM15PC435R0G3D Murata Manufacturing Co Ltd Feed Through Capacitor, Visit Murata Manufacturing Co Ltd
    NFM15PC915R0G3D Murata Manufacturing Co Ltd Feed Through Capacitor, Visit Murata Manufacturing Co Ltd
    MF28F008-10 Rochester Electronics LLC 28F008 - Flash, 1MX8, 100ns, CDFP42 Visit Rochester Electronics LLC Buy

    DELAY LINE 100NS Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    analog delay line

    Abstract: No abstract text available
    Text: 7 Pin SIP Passive Delay Line The 7 Pin SIP Passive Delay Lines manufactured by Engineered Components Company are designed to provide precise and stable delays for analog delay line applications. These untapped delay lines are provided in a small 7-pin SIP package and available in impedances of 50, 100, and 200 ohms.


    Original     		PDF MIL-D-23859 MIL-STD-202 MIL-HDBK-217, 50VDC 7SIPF-5100 100ns 25VDC 100VDC analog delay line

    PDU53

    Abstract: TAIS SMD PDU53-100 PDU53-1000 PDU53-200 PDU53-250 PDU53-400 PDU53-500 PDU53-750
    Text: PDU53 data 3 delay devices, inc. 3-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE SERIES PDU53 FEATURES • • • • •  PACKAGES Digitally programmable in 8 delay steps Monotonic delay-versus-address variation Precise and stable delays Input & outputs fully 100K-ECL interfaced & buffered


    Original     		PDF PDU53 PDU53) 100K-ECL 16-pin PDU53-xx PDU53-xxM PDU53-xxC3 100ns PDU53 TAIS SMD PDU53-100 PDU53-1000 PDU53-200 PDU53-250 PDU53-400 PDU53-500 PDU53-750

    PDU54

    Abstract: PDU54-100 PDU54-1000 PDU54-200 PDU54-250 PDU54-400 PDU54-500 PDU54-750
    Text: PDU54 data 3 delay devices, inc. 4-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE SERIES PDU54 FEATURES • • • • •  PACKAGES Digitally programmable in 16 delay steps Monotonic delay-versus-address variation Precise and stable delays Input & outputs fully 100K-ECL interfaced & buffered


    Original     		PDF PDU54 PDU54) PDU54-xx PDU54-xxM 100K-ECL 24-pin 100ns PDU54 PDU54-100 PDU54-1000 PDU54-200 PDU54-250 PDU54-400 PDU54-500 PDU54-750

    3D2700

    Abstract: datadelay
    Text: 3D2700 7-BIT ADJUSTABLE, HIGH B.W. PASSIVE DELAY LINE SERIES 3D2700 FEATURES •      PACKAGE Delay adjustable in 127 steps Delay step sizes of 0.5ns to 3ns available Fast rise time for high frequency applications I/O reversible BNC female connectors


    Original     		PDF 3D2700 3D2700) MIL-D-23859C 3D2700 50-OHM datadelay

    3D10000

    Abstract: No abstract text available
    Text: 3D10000 5-BIT ADJUSTABLE, HIGH B.W. PASSIVE DELAY LINE SERIES 3D10000 FEATURES •      PACKAGE Delay adjustable in 31 steps Delay step sizes of 0.5ns to 3ns available Fast rise time for high frequency applications I/O reversible F-type female connectors


    Original     		PDF 3D10000 3D10000) MIL-D-23859C 3D10000 50-OHM

    1520C-101-500B

    Abstract: 1520S 97028 smd code T7 passive delay line
    Text: 1520 data 3  delay devices, inc. 10-TAP DIP/SMD DELAY LINE TD/TR = 5 SERIES 1520 FEATURES • • • • • PACKAGES GND T1 10 taps of equal delay increment Delays to 1000ns Low profile Epoxy encapsulated Meets or exceeds MIL-D-23859C T3 T5 T6 T8 T10


    Original     		PDF 10-TAP 1000ns MIL-D-23859C 1520-series T1-T10) 1520C-101-500B 1520S 97028 smd code T7 passive delay line

    Untitled

    Abstract: No abstract text available
    Text: 2214 data 3  delay devices, inc. 20-TAP DIP DELAY LINE TD/TR = 10 SERIES 2214 FEATURES • • • • • PACKAGES 20 taps of equal delay increment High bandwidth (TD/TR =10) Low profile Epoxy encapsulated Meets or exceeds MIL-D-23859C N/C 1 24 N/C IN


    Original     		PDF 20-TAP MIL-D-23859C 2214-xxz 2214-xxzC4 T1-T20 2214-series 1000ns

    400d

    Abstract: No abstract text available
    Text: 2214 data 3  delay devices, inc. 20-TAP DIP DELAY LINE TD/TR = 10 SERIES 2214 FEATURES • • • • • PACKAGES 20 taps of equal delay increment High bandwidth (TD/TR =10) Low profile Epoxy encapsulated Meets or exceeds MIL-D-23859C N/C 1 24 N/C IN


    Original     		PDF 20-TAP MIL-D-23859C 2214-xxz 2214-xxzC4 T1-T20 2214-series 1000ns 400d

    Untitled

    Abstract: No abstract text available
    Text: 3D7205 INDUSTRIAL data 3 delay devices, inc. MONOLITHIC 5-TAP FIXED DELAY LINE SERIES 3D7205 - INDUSTRIAL FEATURES • • • • • • • • • • • •  PACKAGES VDD IN 1 8 All-silicon, low-power CMOS O1 O2 2 7 technology O3 O4 3 6 O5 GND 4 5


    Original     		PDF 3D7205 3D7205Z 500ns -40C-85C) 14-pin 16-pin

    Untitled

    Abstract: No abstract text available
    Text: ALLEN A V I O N I C S INC A LLEN A V IO N ICS, INC. 5H Z D 'T'Hl'll? 05Q5fl3fl 0000^53 =140 • 80T CASE TYPE 5 TAP ACTIVE DELAY LINE 80G CASE TYPE 1 TAP ACTIVE DELAY LINE SPECIFICATIONS: MECHANIC: • Supply voltage: • Delay tolerances: 5.0 VDC ± 10% ± 2ns or ± 5 %


    OCR Scan     		PDF 05Q5fl3fl 500ppm/Â 010th. 80T575Ã 80T5101 80T5201 80T5251 80T5301 80T5401 80T5501

    Untitled

    Abstract: No abstract text available
    Text: Cozu -profile SIP LUMPED CO N STAN T PASSIVE DELAY LINE _ _ j # Analog input and output # Delays stable and precise # 8-pin SIP package .230 high # Available in delays from 1 to 100ns # Precise, fixed delay


    OCR Scan     		PDF 100ns MIL-HDBK-217, C/112592

    100NS

    Abstract: 25NS "Digital Delay Line" 0450-0100-02
    Text: bel/ defining a degree of excellence DIGITAL DELAY LINE SERIES 0450 CMOS DELAY MODULE 5 TAP TECHNICAL INFORMATION TEST CONDITIONS Pulse Voltage Rise Time Pulse Width Pulse Period Supply Current, Ic c l 5.0 Volts 6.0 Nsec 10°/o-90°/o 1.2 x Total Delay 4 x Pulse Width


    OCR Scan     		PDF /o-90Â 100NS 125NS 150NS 175NS 200NS 432-0463/TWX 710-730-5301/FAX 25NS "Digital Delay Line" 0450-0100-02

    0447-002

    Abstract: 0447-0100-06 "Digital Delay Line" delay line 400ns 0447-0200-06 "Digital Delay Line" 0447 60NS 70NS A447 "Digital Delay Line" fuse
    Text: BEL FUSE INC DflE D | 13S14SB 000QS03 3 | T - H V 13 /defining a degree of excellence DIGITAL DELAY LINE SERIES 0447 AND A447 FIXED DELAY 0447 TECHNICAL INFORMATION A447 TEST CONDITIONS 3.2 Volts 3.0 Nsec 10%-90% 1.2 X Total Delay 4 X Pulse Width I c c l 60.0 Milliamps


    OCR Scan     		PDF 13S14SB 000QS03 Voltag0447-0070-06 100NS 125NS 150NS 175NS 200NS 250NS 300NS 0447-002 0447-0100-06 "Digital Delay Line" delay line 400ns 0447-0200-06 "Digital Delay Line" 0447 60NS 70NS A447 "Digital Delay Line" fuse

    Untitled

    Abstract: No abstract text available
    Text: Lneprûjile ECL COMPATIBLE MULTI-LOGIC DELAY LINE # ECL inputs and outputs The M E C L D L is offered in 36 delays from 5 to 100ns. % Delays stable and precise Delay tolerances and rise times are maintained as shown in the accom­ # 16-pin DIP package .250 high


    OCR Scan     		PDF 100ns. 16-pin 100ns--

    ESE 1012

    Abstract: 7SIPF-10250 7s 514
    Text: Z i lowprofile f -5 \ 0 0 SIP 8 8 3 LUMPED CONSTANT lO O n s PASSIVE DELAY LINE # Analog input and output providing the required delay timing functions necessary in radar, computer, communication, testing and instrument applications. # Delays stable and precise


    OCR Scan     		PDF 250ns 250ns. 7SIPF-20100 7SIPF-20110 7SIPF-20120 7SIPF-20130 7SIPF-20140 7SIPF-20150 7SIPF-20160 7SIPF-20170 ESE 1012 7SIPF-10250 7s 514

    Untitled

    Abstract: No abstract text available
    Text: lewprofile t 2l COMFATIBLE 6-BIT -I;:.! _ % # # # # # % # LOGIC DELAY LINE T2|_ input and output Delays stable and precise 48-pin DIP package .250 high Available in delays up to 329ns Available in 5 delay steps with resolution from 1 to 5ns Propagation delays fully compensated


    OCR Scan     		PDF 48-pin 329ns

    Untitled

    Abstract: No abstract text available
    Text: DS1005 DALLAS DS1005 5-Tap Silicon Delay Line s e m ic o n d u c t o r FEATURES PIN DESCRIPTION • All-silicon time delay • 5 taps equally spaced itC 1 14 ] V c c nc£ 2 13 3 12 ]]TAP 1 TAP 4 Ü Delay tolerance +/- 2 ns or +/- 2%, whichever ncQ is greater


    OCR Scan     		PDF DS1005 DS1005M DS100SH DS100514-Pla 74F04.

    0446-0150-01

    Abstract: 0446-0150-02 TR 100 40NS 60NS A446 0446-0250-01 0446-0100-01 0446-0200-01
    Text: b e l/ defining a degree of excellence LUMPED CONSTANT DELAY LINE SERIES 0446 AND A446 10 TAP TECHNICAL INFORMATION 14 TEST CONDITIONS Pulse W idth Pulse Period Pulse Voltage Rise Time Am bient Temperature A446 0446 3.0 x Total Delay 4 x Pulse Width 1 Vblt


    OCR Scan     		PDF /o-90% 100PPM/Â 250NS 300NS 400NS 500NS 432-0463/TWX 710-730-5301/FAX 13SmH3 D00074L 0446-0150-01 0446-0150-02 TR 100 40NS 60NS A446 0446-0250-01 0446-0100-01 0446-0200-01

    250ns TTL Delay

    Abstract: No abstract text available
    Text: b e l/ defining a degree of excellence DIGITAL DELAY LINE SERIES A447 LOW POWER MODULE 20 MA TYP 5 TAP/FIXED DELAY SPACES @ .2 0 - "t— TECHNICAL INFORMATION TEST CONDITIONS Pulse Vbltage Rise Time Pulse Width Pulse Period Supply Current, Ic c l 3.2 Volts


    OCR Scan     		PDF /o-90Â Cu447-0040-08 A447-0200-08 200NS A447-0050-08 A447-0250-08 250NS A447-0060-08 A447-0300-08 300NS 250ns TTL Delay

    Untitled

    Abstract: No abstract text available
    Text: lowprôfile t 2l COMPATIBLE 6-BIT PROGRAMMABLE LOGIC DELAY LINE # # # # # # # # T2|_ input and output Delays stable and precise 48-pin DIP package .250 high Available in delays up to 329ns Available in 5 delay steps with resolution from 1 to 5ns Propagation delays fully compensated


    OCR Scan     		PDF 48-pin 329ns C/011780R C/012480R C/020580R

    mlpsldl

    Abstract: No abstract text available
    Text: Ion-profile t 2l COMPATIBLE MULTI-LOGIC DELAY LINE ✓ LOW POWER SCHOTTKY # T 2 l input and outputs # Delays stable and precise The M LP S LD L is offered in 31 delays fro m 10 to 100ns. Each # 14-pin D IP package (.250 high) module includes three (3) separate delay lines, each isolated and


    OCR Scan     		PDF 14-pin 100ns 100ns. mlpsldl

    Untitled

    Abstract: No abstract text available
    Text: defining a degree of excellence LUMPED CONSTANT DELAY LINE SERIES 0446 AND A446 10 TAP TECHNICAL INFORMATION TEST CONDITIONS Pulse Width Pulse Period Pulse Voltage Rise Time Ambient Temperature A446 0446 14 3.0 x Total Delay 4 x Pulse Width 1 Vblt 2.0 Nsec 10°/o-90°/o


    OCR Scan     		PDF /o-90Â 500NS 432-0463/TWX 710-730-5301/FAX 000074b

    0447-0200-10

    Abstract: 0447-0050-10 0447-0150-10 0447-0750-10 0447-1000-10 0447-0500-10 0447-0250-10 0447-0300-10 0447-0100-10 0447-1000
    Text: BEL FUSE INC DAE D | 13-51423 .DDODSD.a 1 | T- defining a degree of excellence DIGITAL DELAY LINE SERIES 0447 AND A447 10 TAP A447 0447 TECHNICAL INFORMATION -.6 0 MAX. - TEST CONDITIONS 3.2 Volts 3.0 Nsec 10%-90% 1.2 X Total Delay 4 X Pulse Width I c c l 120.0 Milliamps


    OCR Scan     		PDF 100NS 150NS 200NS 250NS 300NS 350NS 400NS 500NS 750NS 1000NS 0447-0200-10 0447-0050-10 0447-0150-10 0447-0750-10 0447-1000-10 0447-0500-10 0447-0250-10 0447-0300-10 0447-0100-10 0447-1000

    Untitled

    Abstract: No abstract text available
    Text: DALLAS SEMICONDUCTOR CORP OTE D | 2 L 1 4 130 □□□2074 L | T-47-13 Semiconductor 8^? 5Dallas TAP SILICON DELAY LINE FEATURES DS1005 14-Pin DIP DS1005M 8-Pin DIP DS1005S 16-Pin SOIC PIN CONNECTIONS • All silicon time delay Q 1 8 □ Vcc TAP 2 ^ 2 7 □TAP 1


    OCR Scan     		PDF T-47-13 DS1005 14-Pin DS1005M DS1005S 16-Pin DS1005S