74LVC1G18
Abstract: 74LVC1G18GV 74LVC1G18GW
Text: INTEGRATED CIRCUITS DATA SHEET 74LVC1G18 1-of-2 non-inverting demultiplexer with 3-state deselected output Product specification 2003 Jul 25 Philips Semiconductors Product specification 1-of-2 non-inverting demultiplexer with 3-state deselected output 74LVC1G18
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74LVC1G18
74LVC1G18
SCA75
613508/01/pp14
74LVC1G18GV
74LVC1G18GW
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marking CL SOT363
Abstract: No abstract text available
Text: UNISONIC TECHNOLOGIES CO., LTD U74LVC1G18 Preliminary CMOS IC 1-OF-2 NON-INVERTING DEMULTIPLEXER WITH 3-STATE DESELECTED OUTPUT 4 1 DESCRIPTION The U74LVC1G18 is a 1-of-2 non-inverting demultiplexer with 3-state output. When the select input S is low data passes from A
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U74LVC1G18
U74LVC1G18
QW-R502-559
marking CL SOT363
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Untitled
Abstract: No abstract text available
Text: 74AUP1G18 Low-power 1-of-2 demultiplexer with 3-state deselected output Rev. 5 — 3 July 2012 Product data sheet 1. General description The 74AUP1G18 provides a 1-of-2 non-inverting demultiplexer with 3-state output. The 74AUP1G18 buffers the data on input pin A and passes it either to output 1Y or 2Y,
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74AUP1G18
74AUP1G18
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Untitled
Abstract: No abstract text available
Text: 74AUP1G18 Low-power 1-of-2 demultiplexer with 3-state deselected output Rev. 4 — 24 November 2011 Product data sheet 1. General description The 74AUP1G18 provides a 1-of-2 non-inverting demultiplexer with 3-state output. The 74AUP1G18 buffers the data on input pin A and passes it either to output 1Y or 2Y,
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74AUP1G18
74AUP1G18
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74AUP1G18GF
Abstract: No abstract text available
Text: 74AUP1G18 Low-power 1-of-2 demultiplexer with 3-state deselected output Rev. 3 — 27 September 2010 Product data sheet 1. General description The 74AUP1G18 provides a 1-of-2 non-inverting demultiplexer with 3-state output. The 74AUP1G18 buffers the data on input pin A and passes it either to output 1Y or 2Y,
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74AUP1G18
74AUP1G18
74AUP1G18GF
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74LVC1G18GV
Abstract: 74LVC1G18 74LVC1G18GW
Text: 74LVC1G18 1-of-2 non-inverting demultiplexer with 3-state deselected output Rev. 02 — 30 August 2007 Product data sheet 1. General description The 74LVC1G18 is a 1-of-2 non-inverting demultiplexer with a 3-state output. The device buffers the data on input pin A and passes it either to output 1Y or 2Y, depending on
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74LVC1G18
74LVC1G18
74LVC1G18GV
74LVC1G18GW
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SOT763-1
Abstract: 74CBTLV3257
Text: 74CBTLV3257 Quad 1-of-2 multiplexer/demultiplexer Rev. 3 — 6 January 2011 Product data sheet 1. General description The 74CBTLV3257 provides a quad 1-of-2 high-speed multiplexer/demultiplexer with common select S and output enable (OE) inputs. The low ON resistance of the switch
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74CBTLV3257
74CBTLV3257
SOT763-1
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SOT109-1
Abstract: SOT763-1 74CBTLV3257 74CBTLV3257PW
Text: 74CBTLV3257 Quad 1-of-2 multiplexer/demultiplexer Rev. 2 — 26 November 2010 Product data sheet 1. General description The 74CBTLV3257 provides a quad 1-of-2 high-speed multiplexer/demultiplexer with common select S and output enable (OE) inputs. The low ON resistance of the switch
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74CBTLV3257
74CBTLV3257
SOT109-1
SOT763-1
74CBTLV3257PW
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SOT763-1
Abstract: No abstract text available
Text: 74CBTLV3257 Quad 1-of-2 multiplexer/demultiplexer Rev. 01 — 12 January 2010 Product data sheet 1. General description The 74CBTLV3257 provides a quad 1-of-2 high-speed multiplexer/demultiplexer with common select S and output enable (OE) inputs. The low ON resistance of the switch
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74CBTLV3257
74CBTLV3257
SOT763-1
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Untitled
Abstract: No abstract text available
Text: 74CBTLV3257 Quad 1-of-2 multiplexer/demultiplexer Rev. 4 — 16 December 2011 Product data sheet 1. General description The 74CBTLV3257 provides a quad 1-of-2 high-speed multiplexer/demultiplexer with common select S and output enable (OE) inputs. The low ON resistance of the switch
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74CBTLV3257
74CBTLV3257
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Untitled
Abstract: No abstract text available
Text: INTEGRATED CIRCUITS DATA SHEET 74LVC1G18 1-of-2 noninverting demultiplexer with 3-state deselected output Product specification File under Integrated Circuits, IC24 2003 Apr 29 Philips Semiconductors Product specification 1-of-2 noninverting demultiplexer with 3-state deselected
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74LVC1G18
JESD8B/JESD36
EIA/JESD22-A114-A
EIA/JESD22-A115-A
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Untitled
Abstract: No abstract text available
Text: NL7SZ19 1-to-2 Decoder/ Demultiplexer The NL7SZ19 is a 1-to-2 decoder. When the output enable E is Low, the device passes data at input A to outputs Y0 (true) and Y1 (complement). The NL7SZ19 can also be used as a 1-to-2 demultiplexer. As a demultiplexer, data at input E is routed to either
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NL7SZ19
NL7SZ19
NL7SZ19/D
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Untitled
Abstract: No abstract text available
Text: 19-0736; Rev 0; 1/07 2:1 Multiplexer and 1:2 Demultiplexer with Loopback Features The MAX9396 consists of a 2:1 multiplexer and a 1:2 demultiplexer with loopback. The multiplexer section channel B accepts two differential inputs and generates a single differential output. The demultiplexer section (channel A) accepts a single differential input and
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MAX9396
21-0110B
MAX9396EHJ+
MAX9396EHJ
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NL7SZ19DFT2G
Abstract: NC7SZ19 NL7SZ19 NL7SZ19DFT2 iccd phone
Text: NL7SZ19 1-to-2 Decoder/ Demultiplexer The NL7SZ19 is a 1-to-2 decoder. When the output enable E is Low, the device passes data at input A to outputs Y0 (true) and Y1 (complement). The NL7SZ19 can also be used as a 1-to-2 demultiplexer. As a demultiplexer, data at input E is routed to either
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NL7SZ19
NL7SZ19
NL7SZ19/D
NL7SZ19DFT2G
NC7SZ19
NL7SZ19DFT2
iccd phone
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NL7SZ19
Abstract: A114 A115 JESD22 NC7SZ19
Text: NL7SZ19 1−to−2 Decoder/ Demultiplexer The NL7SZ19 is a 1−to−2 decoder. When the output enable E is Low, the device passes data at input A to outputs Y0 (true) and Y1 (complement). The NL7SZ19 can also be used as a 1−to−2 demultiplexer. As a demultiplexer, data at input E is routed to either
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NL7SZ19
NL7SZ19
NL7SZ19/D
A114
A115
JESD22
NC7SZ19
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74CBTLV3253
Abstract: 74*3253
Text: 74CBTLV3253 Dual 1-of-4 multiplexer/demultiplexer Rev. 3 — 7 January 2011 Product data sheet 1. General description The 74CBTLV3253 provides a dual 1-of-4 high-speed multiplexer/demultiplexer with two common select inputs S0, S1 and two output enable inputs (1OE, 2OE). The low ON
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74CBTLV3253
74CBTLV3253
74*3253
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SOT763-1
Abstract: 74CBTLV3253
Text: 74CBTLV3253 Dual 1-of-4 multiplexer/demultiplexer Rev. 2 — 25 November 2010 Product data sheet 1. General description The 74CBTLV3253 provides a dual 1-of-4 high-speed multiplexer/demultiplexer with two common select inputs S0, S1 and two output enable inputs (1OE, 2OE). The low ON
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74CBTLV3253
74CBTLV3253
SOT763-1
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74cbtlv3253
Abstract: No abstract text available
Text: 74CBTLV3253-Q100 Dual 1-of-4 multiplexer/demultiplexer Rev. 1 — 3 April 2013 Product data sheet 1. General description The 74CBTLV3253-Q100 provides a dual 1-of-4 high-speed multiplexer/demultiplexer with two common select inputs S0, S1 and two output enable inputs (1OE, 2OE). The
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74CBTLV3253-Q100
74CBTLV3253-Q100
74CBTLV3253
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SOT763-1
Abstract: No abstract text available
Text: 74CBTLV3253 Dual 1-of-4 multiplexer/demultiplexer Rev. 01 — 8 January 2010 Product data sheet 1. General description The 74CBTLV3253 provides a dual 1-of-4 high-speed multiplexer/demultiplexer with two common select inputs S0, S1 and two output enable inputs (1OE, 2OE). The low ON
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74CBTLV3253
74CBTLV3253
SOT763-1
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Untitled
Abstract: No abstract text available
Text: 74CBTLV3257-Q100 Quad 1-of-2 multiplexer/demultiplexer Rev. 1 — 4 July 2013 Product data sheet 1. General description The 74CBTLV3257-Q100 provides a quad 1-of-2 high-speed multiplexer/demultiplexer with common select S and output enable (OE) inputs. The low ON resistance of the
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74CBTLV3257-Q100
74CBTLV3257-Q100
74CBTLV3257
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Untitled
Abstract: No abstract text available
Text: 74CBTLV3253 Dual 1-of-4 multiplexer/demultiplexer Rev. 4 — 15 December 2011 Product data sheet 1. General description The 74CBTLV3253 provides a dual 1-of-4 high-speed multiplexer/demultiplexer with two common select inputs S0, S1 and two output enable inputs (1OE, 2OE). The low ON
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74CBTLV3253
74CBTLV3253
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74AUP1G19GM
Abstract: 74AUP1G19GW
Text: 74AUP1G19 Low-power 1-of-2 decoder/demultiplexer Rev. 2 — 15 July 2010 Product data sheet 1. General description The 74AUP1G19 provides a 1-of-2 decoder/demultiplexer with a common output enable. It buffers the data on input pin A and passes it either to output pin 1Y true or 2Y
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74AUP1G19
74AUP1G19
74AUP1G19GM
74AUP1G19GW
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74AUP1G19GM
Abstract: 74AUP1G19GW JESD22-A114E
Text: 74AUP1G19 Low-power 1-of-2 decoder/demultiplexer Rev. 01 — 13 August 2008 Product data sheet 1. General description The 74AUP1G19 provides a 1-of-2 decoder/demultiplexer with a common output enable. It buffers the data on input pin A and passes it either to output pin 1Y true or 2Y
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74AUP1G19
74AUP1G19
74AUP1G19GM
74AUP1G19GW
JESD22-A114E
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Untitled
Abstract: No abstract text available
Text: Signetics 5 4 F 138 Decoder/Demultiplexer 1-of-8 Decoder/Demultiplexer Product Specification Military Logic Products FEATURES features three Enable inputs; two active • Demultiplexing capability Low E1t E2 and one active High (E3). Ev ery output will be High unless Ei and E2
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500ns
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