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    DIVIDER BY TWO Search Results

    DIVIDER BY TWO Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    4018B/BEA Rochester Electronics LLC 4018B - Counter, Divide-By-N - Dual marked (M38510/05652BEA) Visit Rochester Electronics LLC Buy
    4022A/BEA Rochester Electronics LLC 4022A - Counter, Divide-By-8 - Dual marked (M38510/05604BEA) Visit Rochester Electronics LLC Buy
    54LS92/BDA Rochester Electronics LLC 54LS92 - COUNTER, DIVIDE-BY-12 - Dual marked (M38510/31510BDA) Visit Rochester Electronics LLC Buy
    5492FM Rochester Electronics LLC 5492 - Divide By 12 Counter, Asynchronous, Up Direction, TTL, CDFP14 Visit Rochester Electronics LLC Buy
    MC14536BCP Rochester Electronics LLC MC14536 - 4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP DIVIDE BY N COUNTER, PDIP16 Visit Rochester Electronics LLC Buy

    DIVIDER BY TWO Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    ICS673-01

    Abstract: ICS674-01
    Text: DATASHEET ICS674-01 USER CONFIGURABLE DIVIDER Description Features The ICS674-01 consists of two separate configurable dividers. The A Divider is a 7-bit divider and can divide by 3 to 129. The B Divider consists of a 9-bit divider followed by a post divider. The 9-bit divider can divide by 12 to 519. The


    Original     		PDF ICS674-01 ICS674-01 ICS673 28-pin ICS673-01

    ICS674-01

    Abstract: ICS673-01
    Text: DATASHEET ICS674-01 USER CONFIGURABLE DIVIDER Description Features The ICS674-01 consists of two separate configurable dividers. The A Divider is a 7-bit divider and can divide by 3 to 129. The B Divider consists of a 9-bit divider followed by a post divider. The 9-bit divider can divide by 12 to 519. The


    Original     		PDF ICS674-01 ICS674-01 ICS673 28-pin ICS673-01

    Untitled

    Abstract: No abstract text available
    Text: DATASHEET ICS674-01 USER CONFIGURABLE DIVIDER Description Features The ICS674-01 consists of two separate configurable dividers. The A Divider is a 7-bit divider and can divide by 3 to 129. The B Divider consists of a 9-bit divider followed by a post divider. The 9-bit divider can divide by 12 to 519. The


    Original     		PDF ICS674-01 ICS673 28-pin 199707558G

    674R-01

    Abstract: ICS674-01
    Text: DATASHEET ICS674-01 USER CONFIGURABLE DIVIDER Description Features The ICS674-01 consists of two separate configurable dividers. The A Divider is a 7-bit divider and can divide by 3 to 129. The B Divider consists of a 9-bit divider followed by a post divider. The 9-bit divider can divide by 12 to 519. The


    Original     		PDF ICS674-01 ICS673 28-pin 199707558G 674R-01

    Untitled

    Abstract: No abstract text available
    Text: ICS674-01 USER CONFIGURABLE DIVIDER Description Features The ICS674-01 consists of two separate configurable dividers. The A Divider is a 7-bit divider and can divide by 3 to 129. The B Divider consists of a 9-bit divider followed by a post divider. The 9-bit divider can divide


    Original     		PDF ICS674-01 ICS674-01 ICS673 28-pin

    Untitled

    Abstract: No abstract text available
    Text: ICS674-01 USER CONFIGURABLE DIVIDER Description Features The ICS674-01 consists of two separate configurable dividers. The A Divider is a 7-bit divider and can divide by 3 to 129. The B Divider consists of a 9-bit divider followed by a post divider. The 9-bit divider can divide


    Original     		PDF ICS674-01 ICS674-01 ICS673 28-pin

    Untitled

    Abstract: No abstract text available
    Text: ICS674-01 USER CONFIGURABLE DIVIDER Description Features The ICS674-01 consists of two separate configurable dividers. The A Divider is a 7-bit divider and can divide by 3 to 129. The B Divider consists of a 9-bit divider followed by a post divider. The 9-bit divider can divide


    Original     		PDF ICS674-01 ICS674-01 ICS673 28-pin

    Untitled

    Abstract: No abstract text available
    Text: DATASHEET USER CONFIGURABLE DIVIDER I CS6 7 4 -0 1 Description Features The ICS674-01 consists of two separate configurable dividers. The A Divider is a 7-bit divider and can divide by 3 to 129. The B Divider consists of a 9-bit divider followed by a post divider. The 9-bit divider can divide by 12 to 519. The


    Original     		PDF ICS674-01 ICS673 28-pin

    Untitled

    Abstract: No abstract text available
    Text: ICS674-01 USER CONFIGURABLE DIVIDER Description Features The ICS674-01 consists of two separate configurable dividers. The A Divider is a 7-bit divider and can divide by 3 to 129. The B Divider consists of a 9-bit divider followed by a post divider. The 9-bit divider can divide


    Original     		PDF ICS674-01 ICS674-01 ICS673

    ICS674-01

    Abstract: ICS673-01 ICS674R-01 ICS674R-01I ICS674R-01IT ICS674R-01T 67401
    Text: ICS674-01 USER CONFIGURABLE DIVIDER Description Features The ICS674-01 consists of two separate configurable dividers. The A Divider is a 7-bit divider and can divide by 3 to 129. The B Divider consists of a 9-bit divider followed by a post divider. The 9-bit divider can divide


    Original     		PDF ICS674-01 ICS674-01 ICS673 ICS673-01 ICS674R-01 ICS674R-01I ICS674R-01IT ICS674R-01T 67401

    Untitled

    Abstract: No abstract text available
    Text: DATASHEET ICS674-01 USER CONFIGURABLE DIVIDER Description Features The ICS674-01 consists of two separate configurable dividers. The A Divider is a 7-bit divider and can divide by 3 to 129. The B Divider consists of a 9-bit divider followed by a post divider. The


    Original     		PDF ICS674-01 ICS673 28-pin 199707558G

    Untitled

    Abstract: No abstract text available
    Text: DATA SHEET ICS674-01 ICS674-01 USER CONFIGURABLE DIVIDER USER CONFIGURABLE DIVIDER Description Features The ICS674-01 consists of two separate configurable dividers. The A Divider is a 7-bit divider and can divide by 3 to 129. The B Divider consists of a 9-bit divider


    Original     		PDF ICS674-01 ICS674-01 ICS673 28-pin 199707558G

    Untitled

    Abstract: No abstract text available
    Text: DATA SHEET ICS558-02 ICS558-02 LVHSTL TO CMOS CLOCK DIVIDER LVHSTL TO CMOS CLOCK DIVIDER Description Features The ICS558-02 accepts a high-speed LVHSTL input and provides four CMOS low skew outputs from a selectable internal divider divide by 3, divide by 4 . The


    Original     		PDF ICS558-02 ICS558-02 16-pin 199707558G

    Untitled

    Abstract: No abstract text available
    Text: ICS558-02 LVHSTL TO CMOS CLOCK DIVIDER Description Features The ICS558-02 accepts a high-speed LVHSTL input and provides four CMOS low skew outputs from a selectable internal divider divide by 3, divide by 4 . The four outputs are split into two banks of two outputs.


    Original     		PDF ICS558-02 ICS558-02 16-pin

    "Frequency Divider"

    Abstract: Divider modulus SP8789
    Text: SP8789 225MHz Frequency Divider Divided by 20/21 TWO MODULUS DIVIDER Description The SP8789 is a low power programmable ΒΈ20/21 counter.lt divides by 20, when the control input is in the high state and by 21 when in the low state. An internal voltage regulator allows operation from a wide range of supply voltages.


    Original     		PDF SP8789 225MHz SP8789 "Frequency Divider" Divider modulus

    Untitled

    Abstract: No abstract text available
    Text: ICS558-02 INTELTM LVHSTL TO CMOS CLOCK DIVIDER Description Features The ICS558-02 accepts a high speed LVHSTL input and provides four CMOS low skew outputs from a selectable internal divider divide by 3, divide by 4 . The four outputs are split into two banks of two outputs.


    Original     		PDF ICS558-02 ICS558-02 16-pin

    DS3738

    Abstract: SP8400 SP8401 SP8402 SP8402/KG/MPES
    Text: SP8402 Very Low Phase Noise Divider by 2N DS3738 - 2.1 March 1994 The SP8402 is a very low phase noise divider which divides by powers of two. The S0, S1, S2 data inputs select the division ratio in the range 21 to 28. Special circuits techniques have been


    Original     		PDF SP8402 DS3738 SP8402 SP8400 SP8401 160dBc/Hz SP8402/KG/MPES

    DS3738

    Abstract: SP8400 SP8401 SP8402
    Text: SP8402 Very Low Phase Noise Divider by 2N DS3738 The SP8402 is a very low phase noise divider which divides by powers of two. The S0, S1, S2 data inputs select the division ratio in the range 21 to 28. Special circuits techniques have been used to reduce the phase noise


    Original     		PDF SP8402 DS3738 SP8402 SP8400 SP8401 160dBc/Hz DS3738

    Untitled

    Abstract: No abstract text available
    Text: SP8402 Very Low Phase Noise Divider by 2N DS3738 The SP8402 is a very low phase noise divider which divides by powers of two. The S0, S1, S2 data inputs select the division ratio in the range 21 to 28. Special circuits techniques have been used to reduce the phase noise


    Original     		PDF SP8402 DS3738 SP8402 SP8400 SP8401 160dBc/Hz

    SP8402

    Abstract: DS3738 SP8400 SP8401
    Text: SP8402 Very Low Phase Noise Divider by 2N DS3738 The SP8402 is a very low phase noise divider which divides by powers of two. The S0, S1, S2 data inputs select the division ratio in the range 21 to 28. Special circuits techniques have been used to reduce the phase noise


    Original     		PDF SP8402 DS3738 SP8402 SP8400 SP8401 160dBc/Hz DS3738

    DS3738

    Abstract: SP8400 SP8401 SP8402
    Text: SP8402 Very Low Phase Noise Divider by 2N DS3738 The SP8402 is a very low phase noise divider which divides by powers of two. The S0, S1, S2 data inputs select the division ratio in the range 21 to 28. Special circuits techniques have been used to reduce the phase noise


    Original     		PDF SP8402 DS3738 SP8402 SP8400 SP8401 160dBc/Hz DS3738

    Untitled

    Abstract: No abstract text available
    Text: SP8402 Very Low Phase Noise Divider by 2N DS3738 The SP8402 is a very low phase noise divider which divides by powers of two. The S0, S1, S2 data inputs select the division ratio in the range 21 to 28. Special circuits techniques have been used to reduce the phase noise


    Original     		PDF SP8402 DS3738 SP8402 SP8400 SP8401 160dBc/Hz

    DS3738

    Abstract: SP8400 SP8401 SP8402
    Text: SP8402 Very Low Phase Noise Divider by 2N DS3738 The SP8402 is a very low phase noise divider which divides by powers of two. The S0, S1, S2 data inputs select the division ratio in the range 21 to 28. Special circuits techniques have been used to reduce the phase noise


    Original     		PDF SP8402 DS3738 SP8402 SP8400 SP8401 160dBc/Hz DS3738

    Untitled

    Abstract: No abstract text available
    Text: MITEL SP8402 Very Low Phase Noise Divider by 2N SEMICONDUCTOR DS3738 - 2.1 The SP8402 is a very low phase noise divider which divides by powers of two. The SO, S 1, S2 data inputs select the division ratio in the range 2 1to 28. Special circuits techniques have been


    OCR Scan     		PDF SP8402 DS3738 SP8402 SP8400 SP8401