ER982B2 Search Results

ER982B2 Datasheets Context Search

Catalog Datasheet	MFG & Type	PDF	Document Tags
Untitled Abstract: No abstract text available Text: Errata: CS5490 Rev B2 Silicon Reference CS5490 data sheet revision DS982F3 dated MAR’13 Erratum 1 - Using Line-cycle Synchronized Averaging Mode with DSP_LCK[4:0] Description Setting the DSP_LCK[4:0] bits in the RegLock register to 0x16 enables DSP write-protection	Original	PDF	CS5490 DS982F3 CS5490 ER982B2

Catalog Datasheet

MFG & Type

PDF

Document Tags

Untitled

Abstract: No abstract text available
Text: Errata: CS5490 Rev B2 Silicon Reference CS5490 data sheet revision DS982F3 dated MAR’13 Erratum 1 - Using Line-cycle Synchronized Averaging Mode with DSP_LCK[4:0] Description Setting the DSP_LCK[4:0] bits in the RegLock register to 0x16 enables DSP write-protection

Original

PDF

CS5490 DS982F3 CS5490 ER982B2