sck 056
Abstract: jk flip flop SCK 055 SCK 206 datasheet d flip flop SCK 054 SCK 084 056
Text: FLIP-FLOPS Cell List Cell Name Function Description FD1 D Flip-Flop with 1X Drive FD1D2 D Flip-Flop with 2X Drive FD1CS D Flip-Flop with Scan Clock, 1X Drive FD1CSD2 D Flip-Flop with Scan Clock, 2X Drive FD1S D Flip-Flop with Scan, 1X Drive FD1SD2 D Flip-Flop with Scan, 2X Drive
|
Original
|
PDF
|
STD131
sck 056
jk flip flop
SCK 055
SCK 206
datasheet d flip flop
SCK 054
SCK 084 056
|
sck 057
Abstract: SCK 084 056 SCK 164 STDH150 FD4S
Text: FLIP-FLOPS Cell List Cell Name Function Description FD1 D Flip-Flop with 1X Drive FD1D2 D Flip-Flop with 2X Drive FD1D4 D Flip-Flop with 4X Drive FD1CS D Flip-Flop with Scan Clock, 1X Drive FD1CSD2 D Flip-Flop with Scan Clock, 2X Drive FD1CSD4 D Flip-Flop with Scan Clock, 4X Drive
|
Original
|
PDF
|
STDH150
sck 057
SCK 084 056
SCK 164
STDH150
FD4S
|
sl 0380
Abstract: sck 057 439 datasheet d flip flop Q 371 Transistor SCK 084 056 SCK 164 T Flip-Flop
Text: FLIP-FLOPS Cell List Cell Name Function Description FD1_LP D Flip-Flop with 1X Drive FD1D2_LP D Flip-Flop with 2X Drive FD1CS_LP D Flip-Flop with Scan Clock, 1X Drive FD1CSD2_LP D Flip-Flop with Scan Clock, 2X Drive FD1S_LP D Flip-Flop with Scan, 1X Drive
|
Original
|
PDF
|
STDL130
sl 0380
sck 057 439
datasheet d flip flop
Q 371 Transistor
SCK 084 056
SCK 164
T Flip-Flop
|
j-k flip flop clock toggle
Abstract: d flip flop datasheet d flip flop Q 371 Transistor sck 084 SCK 084 056 sl 100 transistor STD150 FD4S
Text: FLIP-FLOPS Cell List Cell Name Function Description FD1 D Flip-Flop with 1X Drive FD1D2 D Flip-Flop with 2X Drive FD1D4 D Flip-Flop with 4X Drive FD1CS D Flip-Flop with Scan Clock, 1X Drive FD1CSD2 D Flip-Flop with Scan Clock, 2X Drive FD1CSD4 D Flip-Flop with Scan Clock, 4X Drive
|
Original
|
PDF
|
STD150
j-k flip flop clock toggle
d flip flop
datasheet d flip flop
Q 371 Transistor
sck 084
SCK 084 056
sl 100 transistor
STD150
FD4S
|
CD40xx
Abstract: CD40174B CD40174BC CD40174BM CD40175B CD40175BC CD40175BM MC14174B MC14175B MM74C174
Text: CD40174BM CD40174BC Hex D Flip-Flop CD40175BM CD40175BC Quad D Flip-Flop General Description The CD40174B consists of six positive-edge triggered D-type flip-flops the true outputs from each flip-flop are externally available The CD40175B consists of four positiveedge triggered D-type flip-flops both the true and complement outputs from each flip-flop are externally available
|
Original
|
PDF
|
CD40174BM
CD40174BC
CD40175BM
CD40175BC
CD40174B
CD40175B
CD40xx
MC14174B
MC14175B
MM74C174
|
CD40174BC
Abstract: CD40174BCM CD40174BCN CD40175BC CD40175BCM CD40175BCN MC14174B MC14175B MM74C174 MM74C175
Text: Revised January 1999 CD40174BC • CD40175BC Hex D-Type Flip-Flop • Quad D-Type Flip-Flop General Description The CD40174BC consists of six positive-edge triggered Dtype flip-flops; the true outputs from each flip-flop are externally available. The CD40175BC consists of four positiveedge triggered D-type flip-flops; both the true and complement outputs from each flip-flop are externally available.
|
Original
|
PDF
|
CD40174BC
CD40175BC
CD40174BC
CD40175BC
CD40174BCM
CD40174BCN
CD40175BCM
CD40175BCN
MC14174B
MC14175B
MM74C174
MM74C175
|
CD40175
Abstract: CD40174BC CD40174BCM CD40174BCN CD40175BC CD40175BCM CD40175BCN MC14174B MC14175B MM74C174
Text: Revised March 2002 CD40174BC • CD40175BC Hex D-Type Flip-Flop • Quad D-Type Flip-Flop General Description Features The CD40174BC consists of six positive-edge triggered Dtype flip-flops; the true outputs from each flip-flop are externally available. The CD40175BC consists of four positiveedge triggered D-type flip-flops; both the true and complement outputs from each flip-flop are externally available.
|
Original
|
PDF
|
CD40174BC
CD40175BC
CD40174BC
CD40175BC
CD40175
CD40174BCM
CD40174BCN
CD40175BCM
CD40175BCN
MC14174B
MC14175B
MM74C174
|
CD40174BCN
Abstract: CD40174BC CD40174BCM CD40175BC CD40175BCM CD40175BCN MC14174B MC14175B MM74C174 MM74C175
Text: Revised July 1999 CD40174BC • CD40175BC Hex D-Type Flip-Flop • Quad D-Type Flip-Flop General Description Features The CD40174BC consists of six positive-edge triggered Dtype flip-flops; the true outputs from each flip-flop are externally available. The CD40175BC consists of four positiveedge triggered D-type flip-flops; both the true and complement outputs from each flip-flop are externally available.
|
Original
|
PDF
|
CD40174BC
CD40175BC
CD40174BC
CD40175BC
CD40174BCN
CD40174BCM
CD40175BCM
CD40175BCN
MC14174B
MC14175B
MM74C174
MM74C175
|
MC14174
Abstract: No abstract text available
Text: CD40174BC Hex D-Type Flip-Flop October 1987 Revised January 2004 CD40174BC Hex D-Type Flip-Flop General Description Features The CD40174BC consists of six positive-edge triggered Dtype flip-flops; the true outputs from each flip-flop are externally available.
|
Original
|
PDF
|
CD40174BC
MC14174
|
SN74LS74AM
Abstract: SN74LS74A SN74LS74AD SN74LS74ADR2 SN74LS74AMEL SN74LS74AN typ25
Text: SN74LS74A Dual D-Type Positive Edge-Triggered Flip-Flop The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q
|
Original
|
PDF
|
SN74LS74A
SN74LS74A
r14525
SN74LS74A/D
SN74LS74AM
SN74LS74AD
SN74LS74ADR2
SN74LS74AMEL
SN74LS74AN
typ25
|
SN74LS74AM
Abstract: No abstract text available
Text: SN74LS74A Dual D−Type Positive Edge−Triggered Flip−Flop The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q
|
Original
|
PDF
|
SN74LS74A
SN74LS74A/D
SN74LS74AM
|
SN74LS74AN
Abstract: SN74LS74A SN74LS74AD
Text: SN74LS74A Dual D-Type Positive Edge-Triggered Flip-Flop The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q
|
Original
|
PDF
|
SN74LS74A
SN74LS74A
r14153
SN74LS74A/D
SN74LS74AN
SN74LS74AD
|
1D10
Abstract: HD74ALVCH16821 Hitachi DSA003731
Text: HD74ALVCH16821 3.3-V 20-bit Bus Interface Flip Flops with 3-state Outputs ADE-205-171B Z 3rd. Edition December 1999 Description The HD74ALVCH16821 can be used as two 10-bit flip flops or one 20-bit flip flop. The 20 flip flops are edge triggered D-type flip flops. On the positive transition of the clock (CLK) input, the device provides
|
Original
|
PDF
|
HD74ALVCH16821
20-bit
ADE-205-171B
HD74ALVCH16821
10-bit
1D10
Hitachi DSA003731
|
flip-flop
Abstract: 74F432 d flipflop D Flip-Flop d latch flipflop
Text: FAST Product Selection Guide NATIONAL SEfllCOND { L O G I C } bSGHES 31E D OGbaBOS E Multiple Flip-Flops Device Function Hex D Flip-Flop Quad D Flip-Flop ; Octal D Flip-Flop ' Octal D Flip-Flop Octal D Flip-Flop w/Clock Enable Parallel D Register w/Enable
|
OCR Scan
|
PDF
|
10-Bit
54F/74F174
54F/74F1
54F/74F273
54F/74F374
54F/74F377
54F/74F378
54F/74F379
54F/74F534
54F/74F564
flip-flop
74F432
d flipflop
D Flip-Flop
d latch
flipflop
|
|
T74LS74
Abstract: T54LS74AD2
Text: DUAL D-TYPE POSITIVE EDGETRIGGERED FLIP-FLOP DESCRIPTION The T54LS/T74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear_and set inputs, and also complementary Q
|
OCR Scan
|
PDF
|
T54LS/T74LS74A
T74LS74
T54LS74AD2
|
T74LS74AB1
Abstract: T74LS74a T54LS74AD2 T74LS74
Text: DUAL D-TYPE POSITIVE EDGETRIGGERED FLIP-FLOP DESCRIPTION The T54LS/T74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear_and set inputs, and also complementary Q
|
OCR Scan
|
PDF
|
T54LS/T74LS74A
T74LS74AB1
T74LS74a
T54LS74AD2
T74LS74
|
Untitled
Abstract: No abstract text available
Text: HD74ALVCH16821 Preliminary 3.3-V 20-blt Bus Interface Flip Flops with 3-state Outputs Description The HD74ALVCH16821 can be used as two 10-bit flip flops or one 20-bit flip flop. The 20 flip flops are edge triggered D-type flip flops. On the positive transition of the clock CLK input, the device provides
|
OCR Scan
|
PDF
|
HD74ALVCH16821
20-blt
HD74ALVCH16821
10-bit
20-bit
HD74AI.
|
CD40174B
Abstract: No abstract text available
Text: CD40174BM/CD40174BC/CD40175BM/CD40175BC National Semiconductor CD40174BM/CD40174BC Hex D Flip-Flop CD40175BM/CD40175BC Quad D Flip-Flop General Description The CD40174B consists of six positive-edge triggered D-type flip-flops; the true outputs from each flip-flop are ex
|
OCR Scan
|
PDF
|
CD40174BM/CD40174BC/CD40175BM/CD40175BC
CD40174BM/CD40174BC
CD40175BM/CD40175BC
CD40174B
CD40175B
54C/74C
AN-90.
|
7z93134
Abstract: 74HC 74HCT 7z93131
Text: 74HC/HCT109 flip-flops D U A L JK FLIP-FLOP W ITH SET A N D RESET; POSITIVE-EDGE TR IG G ER FEATURES • • TYPICAL J, K inputs fo r easy D-type flip -flo p Toggle flip -flo p or "d o nothing" mode O utput capability: standard l£ £ category: flip-flops
|
OCR Scan
|
PDF
|
74HC/HCT109
7z93134
74HC
74HCT
7z93131
|
Untitled
Abstract: No abstract text available
Text: HD74ALVCH162821 Preliminary 3.3-V 20-bit Bus Interface Flip Flops with 3-state Outputs Description The H D 74ALVCH162821 can be used as two 10-bit flip flops or one 20-bit flip flop. The 20 flip flops are edge triggered D-type flip flops. On the positive transition o f the clock CLK input, the device provides
|
OCR Scan
|
PDF
|
HD74ALVCH162821
20-bit
74ALVCH162821
10-bit
LYCHI62821
|
100131F
Abstract: 100131Y
Text: 100131 Signetics Flip-Flop Triple D-Type M aster-Slave Flip-Flop Product Specification ECL Products DESCRIPTION 100131 has three D-type flip-flops, with direct and output, separate clock, set addition, all three flip-flops mon clock, set and reset. master-slave
|
OCR Scan
|
PDF
|
100131F
100131Y
110mA
740mVp-p
500ns
100131F
100131Y
|
ECL 100151
Abstract: 100151 PM710 100151F 100151Y
Text: Signetics 100151 Flip-Flop Hex D-Type Master-Slave Flip-Flop Product Specification ECL Products DESCRIPTION The 100151 contains six flip-flops with complement and data outputs, a master reset MR and a pair of common clock inputs. Data enter the flip-flop on the
|
OCR Scan
|
PDF
|
137mA
100151F
100151Y
740mVp-p
500ns
ECL 100151
100151
PM710
100151F
100151Y
|
Flip-Flops
Abstract: d339 4 input, 4 D flip-flops
Text: National ADVANCE INFORMATION Semiconductor 74ABT16821 20-Bit Bus Interface Flip-Flops with TRI-STATE Outputs General Description Features The ’ABT16821 can be used as a 20-bit flip-flop or as two 10-bit flip-flops. The 20-bit flip-flops are edge-triggered
|
OCR Scan
|
PDF
|
74ABT16821
20-Bit
ABT16821
10-bit
1Q31Q4
Flip-Flops
d339
4 input, 4 D flip-flops
|
Untitled
Abstract: No abstract text available
Text: HD74ALVCH16821 3.3-V 20-bit Bus Interface Flip Flops with 3-state Outputs HITACHI ADE-205-171A Z 2nd. Edition September 1997 Description The HD74ALVCH16821 can be used as two 10-bit flip flops or one 20-bit flip flop. The 20 flip flops are edge triggered D-type flip flops. On the positive transition of the clock (CLK) input, the device provides
|
OCR Scan
|
PDF
|
HD74ALVCH16821
20-bit
ADE-205-171A
HD74ALVCH16821
10-bit
interfa2000
D-85622
|