GF DECODER Search Results

GF DECODER Result Highlights (5)

Part	Manufacturer	Description
HC9P55564-5	Rochester Electronics LLC	CVSD Codec, CVSD, 1-Func, PDSO16,
HC1-55564-9	Rochester Electronics LLC	CVSD Codec, CVSD, 1-Func, CDIP14,
74HC4051FT	Toshiba Electronic Devices & Storage Corporation	CMOS Logic IC, SP8T(1:8)/Analog Multiplexer, TSSOP16B, -40 to 125 degC
9317CDC	Rochester Electronics LLC	9317 - Decoder/Driver, TTL, CDIP16
AM25LS2548DM/R	Rochester Electronics LLC	AM25LS2548 - Chip Select Address Decoder with Acknowledge

GF DECODER Datasheets Context Search

Catalog Datasheet	MFG & Type	PDF	Document Tags
1rfu 210 Abstract: K4S64163LF-GF pasr Text: Mobile SDRAM VDD 2.5V, V DDQ 1.8V & 2.5V K4S64163LF-GF(R) Preliminary CMOS SDRAM 4Mx16 Mobile SDRAM 52CSP (TCSR & PASR support, -25°C ~ 70°C Operation) Revision 0.0 October 2001 Rev. 0.0 Oct. 2001 Mobile SDRAM (VDD 2.5V, V DDQ 1.8V & 2.5V) K4S64163LF-GF(R)	Original	PDF	K4S64163LF-GF 4Mx16 52CSP 54CSP 16Bit 200us. 1rfu 210 pasr
Untitled Abstract: No abstract text available Text: Mobile SDRAM VDD 2.5V, V DDQ 1.8V & 2.5V K4S64163LF-GF(R) CMOS SDRAM 4Mx16 Mobile SDRAM 52CSP (TCSR & PASR, -25°C ~ 70°C Operation) Revision 1.0 February 2002 Rev. 1.0 Feb. 2002 Mobile SDRAM (VDD 2.5V, V DDQ 1.8V & 2.5V) K4S64163LF-GF(R) CMOS SDRAM Revision History	Original	PDF	K4S64163LF-GF 4Mx16 52CSP 52CSP
Untitled Abstract: No abstract text available Text: CMOS SDRAM K4S64163LF-GF/R 4Mx16 Mobile SDRAM 52CSP VDD/VDDQ 2.5V/1.8V or 2.5V/2.5V, TCSR & PASR Revision 1.0 February 2002 Rev. 1.0 Feb. 2002 K4S64163LF-GF/R CMOS SDRAM Revision History Revision 0.0 (May . 2001, Target) • First generation of 64Mb LP SDRAM 52CSP having TCSR option (V D D 2.5V, V D D Q 1 . 8 V ) .	Original	PDF	K4S64163LF-GF/R 4Mx16 52CSP 52CSP
anti-log TABLE Abstract: galois field theory ADDA USA AN2407 galois 640T SC100 SC140 sp-560 n1 l43 Text: Freescale Semiconductor, Inc. Application Note AN2407/D Rev. 0, 8/2003 Freescale Semiconductor, Inc. Reed Solomon Encoder/Decoder on the StarCore SC140 Core, With Extended Examples by Jasmin Oz and Assaf Naor CONTENTS 1 Basics of Forward Error Correction FEC . 1	Original	PDF	AN2407/D SC140 AN2407/D, anti-log TABLE galois field theory ADDA USA AN2407 galois 640T SC100 sp-560 n1 l43
AN2407 Abstract: anti-log TABLE galois field theory Viterbi Decoder 640T SC100 SC140 "error correction algorithm" Text: Freescale Semiconductor Application Note AN2407 Rev. 1, 12/2004 Reed Solomon Encoder/Decoder on the StarCore SC140/SC1400 Cores, With Extended Examples By Jasmin Oz and Assaf Naor This application note describes the implementation of the ReedSolomon error-control codes on the StarCore™ SC140 DSP	Original	PDF	AN2407 SC140/SC1400 SC140 AN2407 anti-log TABLE galois field theory Viterbi Decoder 640T SC100 "error correction algorithm"
anti-log TABLE Abstract: galois field theory AN2407 Viterbi Decoder 640T SC100 SC140 sp560 SP588 viterbi algorithm Text: Freescale Semiconductor Application Note AN2407 Rev. 1, 12/2004 Reed Solomon Encoder/Decoder on the StarCore SC140/SC1400 Cores, With Extended Examples By Jasmin Oz and Assaf Naor This application note describes the implementation of the ReedSolomon error-control codes on the StarCore™ SC140 DSP	Original	PDF	AN2407 SC140/SC1400 SC140 anti-log TABLE galois field theory AN2407 Viterbi Decoder 640T SC100 sp560 SP588 viterbi algorithm
radix-8 FFT Abstract: l1s3 SPRA686 GMPY forney code of encoder and decoder in rs(255,239) datasheet Reed-Solomon Decoder TA-192 polynomial S0123 Text: Application Report SPRA686 - December 2000 Reed Solomon Decoder: TMS320C64x Implementation Jagadeesh Sankaran Digital Signal Processing Solutions ABSTRACT This application report describes a Reed Solomon decoder implementation on the TMS320C64x DSP family. Reed Solomon codes have been widely accepted as the	Original	PDF	SPRA686 TMS320C64x TMS320C64xTM radix-8 FFT l1s3 GMPY forney code of encoder and decoder in rs(255,239) datasheet Reed-Solomon Decoder TA-192 polynomial S0123
EPF10K30ETC144-1 Abstract: EPF10K50ETC144-1 EPF20K EP20K100E EP20K60E EPF10K100EQC208-1 Text: White Paper Area Optimized Soft Decision Viterbi Decoder Functions Introduction The Altera® area optimized, soft decision Viterbi decoder HammerCores are optimized for APEX 20K, FLEX®10K and FLEX 6000 devices. You can parameterize the devices by implementing any number of standard decoders or you	Original	PDF	APEXTM20K, EPF10K30ETC144-1 EPF10K50ETC144-1 EPF20K EP20K100E EP20K60E EPF10K100EQC208-1
P802 Abstract: Viterbi Decoder, QPSK Convolutional Puncturing Pattern viterbi Text: White Paper Implementing an IEEE Std. 802.16-Compliant FEC Decoder Introduction The IEEE draft standard P802.16/D5-2001, Air Interface for Fixed Broadband Wireless Access Systems, “specifies the air interface of fixed stationary point-to-multipoint broadband wireless access systems providing multiple	Original	PDF	16-Compliant 16/D5-2001, P802 Viterbi Decoder, QPSK Convolutional Puncturing Pattern viterbi
hef4051 Abstract: 74AUP2G34 74LVT1403 74ABT543A 74LV74 74AVCH1T45 74HC590 CBTD3306 NCX2200 74HC40103 Text: ロジック IC データスイッチ/アナログスイッチコンパレータレベルシフタ汎用ロジック Index 2 ●● P3 NXP ロジック ●● P4 低抵抗アナログスイッチ/データスイッチ ●● P7 コンパレータ ●●	Original	PDF
"Galois Field Multiplier" verilog Abstract: XILINX vhdl code REED SOLOMON encoder decoder vhdl code for bit interleaver Reed-Solomon Decoder verilog code xilinx vhdl code for digital clock 4005XL viterbi convolution Text: Reed-Solomon Encoder February 22, 1999 Product Specification AllianceCORE Facts Integrated Silicon Systems, Ltd. 50 Malone Rd Belfast BT9 5BS Northern Ireland Phone: +44 1232 664664 Fax: +44 1232 669664 E-Mail: [email protected] URL: www.iss-dsp.com Features	Original	PDF	4000XL, "Galois Field Multiplier" verilog XILINX vhdl code REED SOLOMON encoder decoder vhdl code for bit interleaver Reed-Solomon Decoder verilog code xilinx vhdl code for digital clock 4005XL viterbi convolution
XILINX vhdl code REED SOLOMON encoder decoder Abstract: "Galois Field Multiplier" verilog Reed-Solomon Decoder verilog code XILINX vhdl code download REED SOLOMON encoder decoder XILINX vhdl code download REED SOLOMON vhdl code for 8-bit parity generator vhdl code for a 9 bit parity generator convolution encoder datasheet Reed-Solomon Decoder viterbi convolution Text: Reed-Solomon Encoder January 10, 2000 Product Specification AllianceCORE Facts Integrated Silicon Systems, Ltd. 50 Malone Rd Belfast BT9 5BS Northern Ireland Phone: +44 1232 664664 Fax: +44 1232 669664 E-Mail: [email protected] URL: www.iss-dsp.com Features	Original	PDF	4000X, XILINX vhdl code REED SOLOMON encoder decoder "Galois Field Multiplier" verilog Reed-Solomon Decoder verilog code XILINX vhdl code download REED SOLOMON encoder decoder XILINX vhdl code download REED SOLOMON vhdl code for 8-bit parity generator vhdl code for a 9 bit parity generator convolution encoder datasheet Reed-Solomon Decoder viterbi convolution
Schematic convolution interleaving Abstract: convolution encoder ISS 98 PC84 convolution encoders XCS10-3 X7964 viterbi convolution Text: iss_reed_sol.fm Page 77 Tuesday, February 24, 1998 5:41 PM Reed-Solomon Encoder January 12, 1998 Product Specification AllianceCORE Facts Integrated Silicon Systems, Ltd. 50 Malone Rd Belfast BT9 5BS Northern Ireland Phone: +44 1232 664664 Fax: +44 1232 669664	Original	PDF
Decoder 5 to 32 single ic Abstract: RT-1523C RT-1523 nova demodulator RT-152 NSW702CE nadler NSW702CD Waveform of Reed solomon decoder Reed Solomon decoder IC Text: Part Number NSW702CD SINCGARS EDM FEC Decoder Module Data Sheet March 1999, v1.0 Target Applications: Features: Communications RT-1523C/D Compatible SINCGARS SIP Compliant v Provides FEC decoding compliant w/ SINCGARS enhanced data mode EDM v C Source Code	Original	PDF	NSW702CD RT-1523C/D NSW702CE 12-bit Decoder 5 to 32 single ic RT-1523C RT-1523 nova demodulator RT-152 nadler NSW702CD Waveform of Reed solomon decoder Reed Solomon decoder IC

vhf fsk modem ic Abstract: cmx910 vhf fsk modem CMX910L9 plc modem using fsk EV9100 2248 2249 GMSK AIS vhf fsk modulator CMX910Q1 Text: CML Microcircuits COMMUNICATION SEMICONDUCTORS CMX910 AIS Baseband Processor IC . . . . . . for Class A and Class B Automatic Identiﬁcation System Transponders and Receivers INN/910/1 www.cmlmicro.com Radio AIS • Class A • Class B I and Q Tx: I/Q upconverter	Original	PDF	CMX910 INN/910/1 FX/MX604) CMX910 vhf fsk modem ic vhf fsk modem CMX910L9 plc modem using fsk EV9100 2248 2249 GMSK AIS vhf fsk modulator CMX910Q1
M36DR432C Abstract: M36DR432D Text: M36DR432C M36DR432D 32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit (256K x16) SRAM, Multiple Memory Product PRELIMINARY DATA FEATURES SUMMARY • SUPPLY VOLTAGE Figure 1. Packages – VDDF = VDDS =1.9V to 2.1V ■ – VPPF = 12V for Fast Program (optional)	Original	PDF	M36DR432C M36DR432D 100ns M36DR432C: 00A4h M36DR432D: 00A5h LFBGA66 M36DR432C M36DR432D
gf multiplier vhdl program Abstract: binary multiplier gf Vhdl code picoblaze architecture gf multiplier program picoblaze galois field theory XAPP393 8051 code assembler for AES lfsr galois thesis Text: Application Note: CoolRunner-II CPLDs R CryptoBlaze: 8-Bit Security Microcontroller XAPP374 v1.0 September 26, 2003 Summary This application note provides a basic outline for creating a cryptographic processor using CoolRunner -II devices and a CPLD version of the PicoBlaze processor.	Original	PDF	XAPP374 pdf/wp165 pdf/wp170 pdf/wp197 pdf/wp198 gf multiplier vhdl program binary multiplier gf Vhdl code picoblaze architecture gf multiplier program picoblaze galois field theory XAPP393 8051 code assembler for AES lfsr galois thesis
M36DR432A Abstract: M36DR432B Text: M36DR432A M36DR432B 32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit (256K x16) SRAM, Multiple Memory Product FEATURES SUMMARY • SUPPLY VOLTAGE Figure 1. Packages – VDDF = VDDS =1.65V to 2.2V ■ – VPPF = 12V for Fast Program (optional) ACCESS TIME: 100,120ns	Original	PDF	M36DR432A M36DR432B 120ns M36DR432A: 00A0h M36DR432B: 00A1h LFBGA66 35nions M36DR432A M36DR432B
M36DR232A Abstract: M36DR232B M36DR232 Text: M36DR232A M36DR232B 32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 2 Mbit (128K x16) SRAM, Multiple Memory Product FEATURES SUMMARY • SUPPLY VOLTAGE Figure 1. Packages – VDDF = VDDS =1.65V to 2.2V ■ – VPPF = 12V for Fast Program (optional) ACCESS TIME: 100,120ns	Original	PDF	M36DR232A M36DR232B 120ns M36DR232A: 00A0h M36DR232B: 00A1h LFBGA66 35nions M36DR232A M36DR232B M36DR232
Untitled Abstract: No abstract text available Text: M36DR232A M36DR232B 32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 2 Mbit (128K x16) SRAM, Multiple Memory Product FEATURES SUMMARY • SUPPLY VOLTAGE Figure 1. Packages – VDDF = VDDS =1.65V to 2.2V ■ – VPPF = 12V for Fast Program (optional) ACCESS TIME: 100,120ns	Original	PDF	M36DR232A M36DR232B 120ns M36DR232A: 00A0h M36DR232B: 00A1h LFBGA66
Untitled Abstract: No abstract text available Text: M36DR432A M36DR432B 32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit (256K x16) SRAM, Multiple Memory Product FEATURES SUMMARY • SUPPLY VOLTAGE Figure 1. Packages – VDDF = VDDS =1.65V to 2.2V – VPPF = 12V for Fast Program (optional) ■ ACCESS TIME: 100,120ns	Original	PDF	M36DR432A M36DR432B 120ns M36DR432A: 00A0h M36DR432B: 00A1h LFBGA66
M36DR432AD Abstract: M36DR432BD Text: M36DR432AD M36DR432BD 32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit (256Kb x16) SRAM, Multiple Memory Product FEATURES SUMMARY • Multiple Memory Product Figure 1. Package – 1 bank of 32 Mbit (2Mb x16) Flash Memory – 1 bank of 4 Mbit (256Kb x16) SRAM	Original	PDF	M36DR432AD M36DR432BD 256Kb 100ns, 120ns 0020h LFBGA66 M36DR432AD: 00A0h M36DR432AD M36DR432BD
Untitled Abstract: No abstract text available Text: SG S -TH O M S O N HCC4529B M Gfô llLI@ra@m(5S_ HCF4529B DUAL 4-CHANNEL OR SINGLE 8-CHANNEL ANALOG DATA SELECTOR • . . . . DATA PATHS ARE BIDIRECTIONAL 10 MHz OPERATION (typical 3-STATE OUTPUTS ”ON” RESISTANCE 125 W TYPICAL @ 15V SUPPLY VOLTAGE RANGE = 3Vdc T 0 18Vdc	OCR Scan	PDF	HCC4529B HCF4529B 18Vdc HCC4529BF HCF4529BM1 HCF4529BEY HCF4529BC1 16lead
scrambler satellite v.35 Abstract: scrambler v.35 algorithm Stanford Telecommunications scrambler v.35 diagram stel2030 STEL2030B 2030B IESS-308 sCRAMBLER Text: FEATURES FUNCTIO NAL DESCRIPTION • 9 Mbps OPERATING DATA RATE ■ CO NSTRA IN T LENGTH K = 7 Gf = 1718, G2 = 1 3 3 8 ■ M ULTIPLE DEVICES CAN BE M ULTIPLEXED TO G IVE HIGHER DATA RATES ■ O PTIM IZED INTERFACE TO OPERATE W ITH BPSK, QPSK, AND OQPSK DEMODULATORS	OCR Scan	PDF	STEL-2030B STEL-2030B GDGE42Ô scrambler satellite v.35 scrambler v.35 algorithm Stanford Telecommunications scrambler v.35 diagram stel2030 STEL2030B 2030B IESS-308 sCRAMBLER

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GF DECODER Search Results

GF DECODER Result Highlights (5)

GF DECODER Datasheets Context Search

1rfu 210

Untitled

Untitled

anti-log TABLE

AN2407

anti-log TABLE

radix-8 FFT

EPF10K30ETC144-1

P802

hef4051

"Galois Field Multiplier" verilog

XILINX vhdl code REED SOLOMON encoder decoder

Schematic convolution interleaving

Decoder 5 to 32 single ic

vhf fsk modem ic

M36DR432C

gf multiplier vhdl program

M36DR432A

M36DR232A

Untitled

Untitled

M36DR432AD

Untitled

scrambler satellite v.35