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    IC Z8038 Search Results

    IC Z8038 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74HC4053FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SPDT(1:2)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL2T125FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL2T126FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    74HC4051FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SP8T(1:8)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL1G07FU Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Non-Inverter Buffer (Open Drain), USV, -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation

    IC Z8038 Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    c5088 transistor

    Abstract: transistor C3207 TLO84CN sec c5088 IN5355B D2817A C3207 transistor toshiba f630 TLO81CP MC74HC533N
    Text: Transistor - Diode Cross Reference - H.P. Part Numbers to JEDEC Numbers Part Num. 1820-0225 1820-0240 1820-0352 1820-1804 1821-0001 1821-0002 1821-0006 1850-0062 1850-0064 1850-0075 1850-0076 1850-0093 1850-0099 1850-0126 1850-0137 1850-0150 1850-0151 1850-0154


    Original     		1853IMPATT c5088 transistor transistor C3207 TLO84CN sec c5088 IN5355B D2817A C3207 transistor toshiba f630 TLO81CP MC74HC533N PDF

    z80 pio

    Abstract: Z80 CPU DIMENSIONS zilog z86E08 DRAM 18DIP Z80 SIO z86c04 package Z16C3001ZCO zilog ctc datasheet z80 z80 dma
    Text: 2002 Product Line Card Z8 OTP Multi-Purpose Microcontrollers OTP KB 8 8 0.5 0.5 1 1 2 4 8 8 8 RAM (Bytes) 237 236 61 61 125 125 125 188 236 236 236 I/O 24 32 14 14 14 14 14 32 32 32 32 INT 6 6 5 6 6 6 6 5 6 6 6 On-Chip Special Features POR POR POR, LV Protect


    Original     		Z86E33 Z86E34 22bis, 12-bit Z0220100ZCO z80 pio Z80 CPU DIMENSIONS zilog z86E08 DRAM 18DIP Z80 SIO z86c04 package Z16C3001ZCO zilog ctc datasheet z80 z80 dma PDF

    st asci

    Abstract: Z80382 gci 24V 12V nrzi HDLC
    Text: P r e l im in a r y P r o d u c t S p e c if ic a t io n Z80382, Z8L382 H ig h - P e r f o r m a n c e D a t a C o m m u n ic a t io n s P r o c e s s o r s FEATURES • Embedded Z380” Microprocessor ■ Eight Advanced DMA Channels with 24-Bit Addressing


    OCR Scan     		Z80382, Z8L382 16-Bit 8/16-Bit DS97Z382000 st asci Z80382 gci 24V 12V nrzi HDLC PDF

    Z16C32

    Abstract: No abstract text available
    Text: P r e l im in a r y P r o d u c t S p e c if ic a t io n Z80382, Z8L382 H ig h - P e r f o r m a n c e D a t a C o m m u n ic a t io n s P r o c e s s o r s FEATURES • Embedded Z380” Microprocessor Maintains Object Code Compatibility with Z80 and Z180” Microprocessors


    OCR Scan     		Z80382, Z8L382 16-Bit 24-Bit DS97Z382000 Z16C32 PDF

    T105 94 V0

    Abstract: No abstract text available
    Text: P r e l im in a r y C u s t o m e r P r o c u r e m e n t S p e c if ic a t io n Z80382 SL1944 H ig h - P e r f o r m a n c e D a t a C o m m u n ic a t io n s P r o c e s s o r FEATURES • Embedded Z380 Microprocessor ■ Eight Advanced DMA Channels with 24-Bit Addressing


    OCR Scan     		Z80382 SL1944 24-Bit 16-Bit 22-ohm CP97Z800500 T105 94 V0 PDF

    TXC10 M 60

    Abstract: Z382 Z80382 T105 94 V0 TXC10
    Text: P r e l im in a r y C u s t o m e r P r o c u r e m e n t S p e c if ic a t io n v% \ Z80382 SL1944 H ig h - P e r f o r m a n c e D a t a C o m m u n ic a t io n s P r o c e s s o r FEATURES • Embedded Z380 Microprocessor Eight Advanced DMA Channels with 24-Bit Addressing


    OCR Scan     		Z80382 SL1944 Z380TM Z180TM 16-Bit 8/16-Bit 22-ohm CP97Z800500 TXC10 M 60 Z382 T105 94 V0 TXC10 PDF

    Z180-Based

    Abstract: SR16Z
    Text: <3 P r o d u c t S p e c if ic a t io n Z380 M ic r o p r o c e s s o r FEATURES • Static CMOS Design with Low-Power Standby Mode Option ■ 32-Bit Internal Data Paths and ALU ■ Operating Frequency - DC-to-18 MHz at 5V - DC-to-10 MHz at 3.3V ■ Enhanced Instruction Set that Maintains Object-Code


    OCR Scan     		32-Bit DC-to-18 DC-to-10 Z180TM 16-Bit 32-Bit 16-Bit Z380TM Z380TM Z180-Based SR16Z PDF

    Untitled

    Abstract: No abstract text available
    Text: P r o d u c t S p e c if ic a t io n < 3 Z380 M ic r o p r o c e s s o r FEATURES • Static CMOS Design with Low-Power Standby Mode Option ■ 32-Bit Internal Data Paths and ALU ■ Operating Frequency - DC-to-18 MHz at 5V - DC-to-10 MHz at 3.3V ■ Enhanced Instruction Set that Maintains O bject-Code


    OCR Scan     		32-Bit DC-to-18 DC-to-10 16-Bit 100-Pin 16-Bit 32-Bit PDF

    transistor cross reference

    Abstract: MPT3N40 Westinghouse SCR handbook LT 8224 ZENER DIODE sje389 N9602N npn transistor RCA 467 TFK 7 segment displays PUT 2N6027 delco 466
    Text: C K TBD DOLLY LIST LOGO LIST SAFETY & RELIABLTY TEK PN SYSTEM II DIGITAL IC's MEMORIES. MOS. CM OS.ECL. TTL MICROPROCESSOR SPECIAL FUNCTION IC's DIGITAL / LINEAR ARRAYS LINEAR IC'S (PURCH) TEK-MADE IC’s 3 IC's INDEX (COLORED PGS) INCL PRGMD. SCRND.ETC


    OCR Scan     		PDF

    Z80h

    Abstract: TDA 718 z80b 74LS74 timing diagram Z80B-CPU Z850 74ls74 timing setup hold z80a cpu Z850D 74LS164M
    Text: A p p l ic a t io n N o t e <£ZiI£3G INTERFACING Z80 CPUS TO THE Z8500 P e rip h e ra l fa m ily INTRODUCTION Data Bus Signals The Z8500 Family consists of universal peripherals that can interface to a variety of microprocessor systems that use a non-multiplexed address and


    OCR Scan     		Z8500 00-2013-A0) Z8530 Z8536 Z8038 Z80h TDA 718 z80b 74LS74 timing diagram Z80B-CPU Z850 74ls74 timing setup hold z80a cpu Z850D 74LS164M PDF

    Z80 SCC

    Abstract: Z8038
    Text: S-12 i^ S L G b Z80 ' E B lo c k mbedded C ontrollers 2 DMA 2UART 16 I/O 2C/T C/Ser MMU uperintegratio n SCC/2 85C30/2 8 5230 16 5 5 0 E S C C M IM IC (2 C H ) roducts Refresh Control Z1 8 0 uide 16-Bit CPU P a r t N u m b er Z80180/Z8S180/Z8L180 Z80181


    OCR Scan     		85C30/2) 16-Bit Z80180/Z8S180/Z8L180 Z80181 Z80182/Z8L182 Z80380/Z8L380 Z80/Z180 100-Pin Z80 SCC Z8038 PDF

    Untitled

    Abstract: No abstract text available
    Text: Zilog P r o d u c t S p e c i fi c a t i o n Z8038/Z8538 HO FIFO Input/ Output Interface Unit October 1988 Features • 128-byte FIFO buffer provides asynchronous bidirectional CPU/CPU or CPU/peripheral interface, expandable to any width in byte increments by use of multiple FIOs.


    OCR Scan     		Z8038/Z8538 128-byte Z8038/Z8538 16-bit PDF

    Z80 FIO

    Abstract: z bus Z8038-FIO z-scc cpu 226 z-fio D-40 Z8000 Z8036 Z8038
    Text: Z8038 FIO Z8038(FI0) 128 Byte FIFO I/O Port DISTINCTIVE CHARACTERISTICS Pattern m atching logic on chip — FIO can detect a data pattern and interrupt CPU. B yte count available to softw are — An on-chip register which contains the actual num­ ber o f bytes in the FIFO can be read by the soft­


    OCR Scan     		Z8038 128-byte IEEE-488. Z8038* 00867B Z80 FIO z bus Z8038-FIO z-scc cpu 226 z-fio D-40 Z8000 Z8036 PDF

    Untitled

    Abstract: No abstract text available
    Text: f Z 7 ^ 7# S G S -T H O M S O N [ » [ f g m i O T M t f l « _Z 8 0 3 8 Z-FIO/FIFO INPUT/OUTPUT INTERFACE UNIT DESCRIPTIO N The Z8038 FIO FIFO Input/Output Interface Unit is a 128-byte buffer that interfaces two CPUs or a CPU and a peripheral device. Multiple FIOs can be


    OCR Scan     		Z8038 128-byte 16-bit 256-byte CPCC44 CDIP-40 Z8038AD PDF

    Z- FIO

    Abstract: dcp 4 z Z8038
    Text: Z I L O G INC 17E D T1ÖM043 DD1E0Ô3 T " T -S £ -3 3 -D 3 Z8038/Z8538 FIO FIFO Input/ Output Interface Unit October 1988 Features • 128-byte FIFO buffer provides asynchronous bidirectional CPU/CPU or CPU/peripheral interface, expandable to any width in byte


    OCR Scan     		Z8038/Z8538 128-byte 16-bit 68-Pin 84-Pin Z- FIO dcp 4 z Z8038 PDF

    ZS040

    Abstract: ZS-040 Z8038D6 l8038 Z8001 package size Z8038D1 Z8060-FIFO z bus Z8038 Z80 FIO
    Text: SGS-THOMSON Z8038 Z-FIO/FIFO INPUT/OUTPUT INTERFACE UNIT DESCRIPTIO N The Z8038 FIO FIFO Input/Output Interface Unit is a 128-byte buffer that interfaces two CPUs or a CPU and a peripheral device. Multiple FIOs can be used to create a 16-bit or wider data path, or two


    OCR Scan     		Z8038 Z8038 128-byte 16-bit 256-byte Z8038B6V PDIP-40 Z8038C1V PLCC44 Z8038C6V ZS040 ZS-040 Z8038D6 l8038 Z8001 package size Z8038D1 Z8060-FIFO z bus Z80 FIO PDF

    ZS040

    Abstract: ZS-040 l8038 Z8038 datasheet of ic l8038 Z80 FIO dav 9th Z8038B1 PLCC44 Z8002
    Text: SGS-THOMSON Z8038 Z-FIO/FIFO INPUT/OUTPUT INTERFACE UNIT DESCRIPTIO N The Z8038 FIO FIFO Input/Output Interface Unit is a 128-byte buffer that interfaces two CPUs or a CPU and a peripheral device. Multiple FIOs can be used to create a 16-bit or wider data path, or two


    OCR Scan     		Z8038 Z8038 128-byte 16-bit 256-byte protP-40 Z8038B6V PDIP-40 Z8038C1V PLCC44 ZS040 ZS-040 l8038 datasheet of ic l8038 Z80 FIO dav 9th Z8038B1 Z8002 PDF

    Untitled

    Abstract: No abstract text available
    Text: FIFO Input/Output Interlace unit Features • 128-byte FIFO buffer provides asynchronous bidirectional CPU/CPU or CPU/peripheral interface, expandable to any width in byte increments by use of multiple Z8060 FIO's ■ Interlocked 2-Wire or 3-Wire Handshake


    OCR Scan     		128-byte Z8060 Z8038 Z8038A Z8538 Z8538A PDF

    TDA0161 equivalent

    Abstract: 1N3393 BDX54F equivalent byt301000 bux transient voltage suppressor ST90R9 ua776mh sgs 2n3055 Transistor morocco mje13007 inmos transputer reference manual
    Text: SHORTFORM 1995 NOVEMBER 1994 USE IN LIFE SUPPORT DEVICES OR SYSTEMS MUST BE EXPRESSLY AUTHORIZED SGS-THOMSON PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF SGS-THOMSON Microelectronics. As used herein:


    OCR Scan     		PDF

    Z8060

    Abstract: Z8060-FIFO z8060dc
    Text: FIFO Z8060 Z8060 FIFO Buffer Unit and FIFO Expander DISTINCTIVE CHARACTERISTICS • • • • • Connects any number of FIFOs in series to form buffer of any desired length Connects any number of FIFOs in parallel to form buffer of any desired width Bidirectional, asynchronous data transfer capability


    OCR Scan     		Z8060 Z8060 128-bit-by-8-bit Z8060* 02128B Z8060-FIFO z8060dc PDF

    dsa 362

    Abstract: 35015 z-fio Z8001 Z8002 Z8038 Z8060 Z8538 DSA 250-20 2A3J
    Text: ’•'Vs Zilog P ro d u c t S p e c ific a tio n Z 8038/Z 8538 FIO FIFO Input/ Output Interface Unit October 1988 F eatures ■ 128-byte FIFO buffer provides asynchronous b idirectional C PU /C PU or C P U /peripheral interface, exp an d ab le to any width in byte


    OCR Scan     		Z8038/Z8538 128-byte dsa 362 35015 z-fio Z8001 Z8002 Z8038 Z8060 Z8538 DSA 250-20 2A3J PDF

    Z80000

    Abstract: Z80000 Zilog
    Text: ZILOG INC 17E D • ^ 0 4 0 4 3 QGlSlûfi 1 ■ October 1988 Z80,000 CPU FEATURES Full 32-bit architecture and implementation 4G billion bytes of directly addressable memory in each of four address spaces Linear or segmented address space Virtual memory management integrated with CPU


    OCR Scan     		000TM 32-bit Z8000® 68-Pin 84-Pin Z80000 Z80000 Zilog PDF

    Z80000

    Abstract: ABOTT Zilog Z80 family zilog z80 processor MARKING W1 AD nitto GE rr24 002 TDA 120t Z80 CPU Z9516
    Text: P ro d u c t S p e c ific a tio n October 1988 Z80,000 CPU FEATURES • Full 32-bit architecture and implementation ■ 4G billion bytes of directly addressable memory in each of four address spaces ■ Linear or segmented address space ■ Virtual memory management integrated with CPU


    OCR Scan     		32-bit Z8000 Z80000 ABOTT Zilog Z80 family zilog z80 processor MARKING W1 AD nitto GE rr24 002 TDA 120t Z80 CPU Z9516 PDF

    A8B11

    Abstract: No abstract text available
    Text: Zilog P ro d u c t S p e c ific a tio n January 1988 Z80,000 CPU FEATURES • Full 32-bit architecture and implementation ■ 4G billion bytes of directly addressable memory in each of four address spaces ■ Linear or segmented address space ■ Virtual memory management integrated with CPU


    OCR Scan     		32-bit 84-Pin A8B11 PDF