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    ICD2051 DESIGNS Search Results

    ICD2051 DESIGNS Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    DE6B3KJ151KA4BE01J Murata Manufacturing Co Ltd Safety Standard Certified Lead Type Disc Ceramic Capacitors for Automotive Visit Murata Manufacturing Co Ltd
    DE6B3KJ471KB4BE01J Murata Manufacturing Co Ltd Safety Standard Certified Lead Type Disc Ceramic Capacitors for Automotive Visit Murata Manufacturing Co Ltd
    DE6E3KJ152MN4A Murata Manufacturing Co Ltd Safety Standard Certified Lead Type Disc Ceramic Capacitors for Automotive Visit Murata Manufacturing Co Ltd
    DE6B3KJ101KA4BE01J Murata Manufacturing Co Ltd Safety Standard Certified Lead Type Disc Ceramic Capacitors for Automotive Visit Murata Manufacturing Co Ltd
    DE6B3KJ331KB4BE01J Murata Manufacturing Co Ltd Safety Standard Certified Lead Type Disc Ceramic Capacitors for Automotive Visit Murata Manufacturing Co Ltd

    ICD2051 DESIGNS Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    Code T6H

    Abstract: crystal oscillator 1 MHz 4 pins CONNECTIONS diode T 3512 ICD2051 cd2051 ICD2051 Designs
    Text: fax id: 3512 1I CD20 51 ICD2051 Dual Programmable Clock Generator Features Functional Description • Two independent clock outputs ranging from 320 kHz to 100 MHz • Individually programmable PLLs use 22-bit serial word • Low-skew ÷1,÷2, and ÷4 CLKA outputs


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    ICD2051 22-bit 16-pin ICD2051 Code T6H crystal oscillator 1 MHz 4 pins CONNECTIONS diode T 3512 cd2051 ICD2051 Designs PDF

    ICD2051

    Abstract: ICD2051-5
    Text: ICD2051 Dual Programmable Clock Generator Features D Two independent clock outputs ranging from 320 kHz to 100 MHz D Individually programmable PLLs use 22Ćbit serial word D LowĆskew outputs D PhaseĆlocked loop oscillator input derived from external lowĆfrequency


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    ICD2051 22bit 16pin ICD2051 ICD2051-5 PDF

    ICD2051

    Abstract: ICD2051 Designs ICD2051-5
    Text: 1 ICD2051 Dual Programmable Clock Generator Features Functional Description • Two independent clock outputs ranging from 320 kHz to 100 MHz • Individually programmable PLLs use 22-bit serial word • Low-skew ÷1,÷2, and ÷4 CLKA outputs • Phase-locked loop oscillator input derived from external low-frequency reference clock 1 MHz - 25 MHz or


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    ICD2051 22-bit 16-pin ICD2051 ICD2051 Designs ICD2051-5 PDF

    ICD2051

    Abstract: ICD2051 Designs
    Text: ICD2051 Dual Programmable Clock Generator Features Functional Description • Two independent clock outputs ranging from 320 kHz to 100 MHz • Individually programmable PLLs use 22-bit serial word • Low-skew ÷1,÷2, and ÷4 CLKA outputs • Phase-locked loop oscillator input derived from external low-frequency reference clock 1 MHz - 25 MHz or


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    ICD2051 22-bit 16-pin ICD2051 ICD2051 Designs PDF

    Y0803

    Abstract: R0801 U0801A Y0802 PU0806 C0801 STI3400 R0806 U0802 R0803
    Text: 1 2 1 7 Y0801 NC VCC GND OUT 3 14 4 5 6 7 8 VCC 8 1 CLK50R 50 MHz R0801 2 CLK50 FOR STI3400 33 A 4 A CLK25R~ 1 PU0801 4 3 D PR 2 CLK25A FOR PCI9060, FIFO 33 U0801A Q R0802 2 5 CLK25R 1 R0803 2 CLK25B FOR MACHS 33 CLK CL Q 2,4,9 3 6 74ACT74 1 PU0802 1 7 B VCC


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    Y0801 CLK50R R0801 CLK50 STI3400 CLK25R~ PU0801 CLK25A PCI9060, U0801A Y0803 U0801A Y0802 PU0806 C0801 STI3400 R0806 U0802 R0803 PDF

    Y0803

    Abstract: U0801B IC LM7805 N1 Y10 pin diagram of IC LM7805 C0801 STI3400 U0101 U0604 plx9060
    Text: Q CL 7 D PR 3 4 14 2 U?A Q 5 CLK 6 {Value} 1 1 2 3 4 5 6 SPARE GATES: 8 ECN HISTORY DESCRIPTION REV 2 -ADD CDREQ DATE APPROVAL 10/24/95 U0101 PU0101 A PU0102 PU0103 12 11 D U0801B 9 Q CLK 8 Q 74ACT74 13 20V8C DIP 22 21 20 19 18 17 16 15 CL O1 IO2 IO3 IO4 IO5


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    U0101 PU0101 PU0102 PU0103 U0801B 74ACT74 20V8C PU0104 Y0803 U0801B IC LM7805 N1 Y10 pin diagram of IC LM7805 C0801 STI3400 U0101 U0604 plx9060 PDF

    cy3341

    Abstract: 64K X 4 CACHE SRAM CY7C190 pasic380 cy7c189 palce22v10 programming guide palce16v8 programming algorithm STATIC RAM 6264 vhdl code for 8-bit parity checker 64x18 synchronous sram
    Text: Product Selector Guide Static RAMs Organization/Density Density X1 X4 X4 SIO 7C147 2147 7C123 7C148 7C149 7C150 7C189 7C190 2148 2149 7C122 9122 93422 7C167A 7C168A 7C169A 7C170A 7C171A 7C172A 7C128A 7C187 7C164 7C166 7C161 7C162 7C185 6264 7C182 7C197 7C194


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    7C147 7C123 7C148 7C149 7C150 7C189 7C190 7C122 7C167A 7C168A cy3341 64K X 4 CACHE SRAM CY7C190 pasic380 cy7c189 palce22v10 programming guide palce16v8 programming algorithm STATIC RAM 6264 vhdl code for 8-bit parity checker 64x18 synchronous sram PDF

    Triton P54C

    Abstract: cy7c37128 62128 SRAM adapter 48-pin TSOP CY7C37192 CYM74P436 CY3501A CY7C37512 MIB 30 Product Selector Guide
    Text: Product Selector Guide Fast Static RAMs Organization/Density Density X1 X4 X4 SIO X8 4K 7C147 2147 7C123 7C148 7C149 7C150 2148 2149 7C122 9122 93422 16K 7C167A 7C168A 7C128A 6116 64K to 72K 7C187 7C164 7C166 7C185 6264 7C182 256K to 288K 7C197 7C194 7C195


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    7C147 7C123 7C148 7C149 7C150 7C122 7C167A 7C168A 7C128A 7C187 Triton P54C cy7c37128 62128 SRAM adapter 48-pin TSOP CY7C37192 CYM74P436 CY3501A CY7C37512 MIB 30 Product Selector Guide PDF

    L1239

    Abstract: l0728 l0312 SGS L282 L0936 L11616 L9960 0x00000404 L1198 L1322
    Text: Go to next Section: PCI to Local Bridge Performance Study Return to Table of Contents Using the PCI 9060 without a CPU SGS Thomson MPEG with PCI 9060 PCI 9060/MPEG AN January 14, 1996 MPEG to PCI bus Application Note _ _ _


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    9060/MPEG L1239 l0728 l0312 SGS L282 L0936 L11616 L9960 0x00000404 L1198 L1322 PDF

    la2 d2 timer

    Abstract: L0936 Header 13X2 l0728 PIN DIAGRAM OF IC LM7805 U0202 L9960 STI3400 L1239 L4204
    Text: Go to next Section: PCI to Local Bridge Performance Study Return to Table of Contents Using the PCI 9060 without a CPU SGS Thomson MPEG with PCI 9060 PLX Technology SGS PCI MPEG Board Engineering Changes 07/15/96 1. The PCI9060 always reads long words, even when the local bus is configured for 16-bits. Modify the BUSCTL


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    PCI9060 16-bits. la2 d2 timer L0936 Header 13X2 l0728 PIN DIAGRAM OF IC LM7805 U0202 L9960 STI3400 L1239 L4204 PDF

    L0936

    Abstract: L0988 L9960 L1239 STI3400 L1462 E442 L1105 L3216 U0601
    Text: Using the PCI 9060 without a CPU SGS Thomson MPEG with PCI 9060 PCI 9060/MPEG AN January 14, 1996 MPEG to PCI bus Application Note _ _ _ General Description _ Features_


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    9060/MPEG L0936 L0988 L9960 L1239 STI3400 L1462 E442 L1105 L3216 U0601 PDF

    ICD2051SC

    Abstract: ICD2051
    Text: IC designs Programmable Products ICD2051 Dual Programmable Clock Oscillator Single-Chip Programmable Oscillator Replaces Traditional Can Oscillators in Multi-Frequency or Variable Frequency Environments • 2 Independent Clock Outputs Ranging from 320 KHz-1 2 0 MHz


    OCR Scan
    ICD2051 KHz-120 22-bit Hz-24 QQ127MM 20-Pin 001274S ICD2051SC PDF

    ICD2051SC

    Abstract: ICD2051 G37 IC
    Text: IC designs Programmable Products ICD2051 Dual Programmable Clock Oscillator Single-Chip Programmable Oscillator Replaces Traditional Can Oscillators in Multi-Frequency or Variable Frequency Environments • 2 Independent Clock Outputs Ranging from 320 KHz-1 2 0 MHz


    OCR Scan
    ICD2051 KHz-120 22-bit Hz-24 Exter10 20-Pin 25flcà ICD2051SC ICD2051 G37 IC PDF

    dd1270

    Abstract: dd127 ICD2051SC TFA15 DD1270B
    Text: IC designs Programmable Products ICD2051 Dual Programmable Clock Oscillator Single-Chip Programmable Oscillator Replaces Traditional Can Oscillators in Multi-Frequency or Variable Frequency Environments • 2 Independent Clock Outputs Ranging from 320 KHz-1 2 0 MHz


    OCR Scan
    ICD2051 22-bit DD15744 20-Pfn 20-Pin dd1270 dd127 ICD2051SC TFA15 DD1270B PDF

    Untitled

    Abstract: No abstract text available
    Text: ICD2051 Dual Programmable Clock Generator Features • Three-state control disables outputs for test purposes optional • 5V operation • Low-power, high-speed CMOS technology • Available in 16-pin SOIC package • TVvo independent dock outputs ranging from 320 kHz to 100 MHz


    OCR Scan
    ICD2051 22-bit 16-pin PDF

    ICD2051

    Abstract: 1E6C
    Text: fax id: 3512 —— — Æ jr r ~ 'f V D D ICD2051 17 Q Q I 1 IT COO Dual Programmable Clock Generator Features Functional Description • Two independent clock outputs ranging from 320 kHz to 100 MHz • Individually programmable PLLs use 22-bit serial word


    OCR Scan
    ICD2051 22-bit 16-pin ICD2051 1E6C PDF

    ICD2051SC

    Abstract: L9105
    Text: I C Programmable Products d e s ig n s ICD2Q51 Dual Programmable Clock Oscillator Single-Chip Programmable Oscillator Replaces Traditional Can Oscillators in Multi-Frequency or Variable Frequency Environments • 2 Independent Clock Outputs Ranging from 320 KHz-1 2 0 MHz


    OCR Scan
    ICD2Q51 22-bit ICD2051 ICD2051SC L9105 PDF