ICS93701 Search Results

ICS93701 Datasheets (3)

Part	Manufacturer	Description	Datasheet Type	PDF
ICS93701	Integrated Circuit Systems	DDR Phase Lock Loop Clock Driver	Original	PDF
ICS93701GT	Integrated Circuit Systems	DDR Phase Lock Loop Clock Driver	Original	PDF
ICS93701YGT	Integrated Circuit Systems	DDR Phase Lock Loop Clock Driver	Original	PDF

ICS93701 Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
ICS93701 Abstract: TSSOP48 Text: ICS93701 Integrated Circuit Systems, Inc. DDR Phase Lock Loop Clock Driver Recommended Application: DDR Clock Driver Pin Configuration GND CLKC0 CLKT0 VDD CLKT1 CLKC1 GND GND CLKC2 CLKT2 VDD SCLK CLK_INT CLK_INC 2 VDDI C AVDD AGND GND CLKC3 CLKT3 VDD CLKT4	Original	ICS93701 66MHz) 120ps 100MHz) 100ps MO-153 ICS93701 TSSOP48	PDF
Untitled Abstract: No abstract text available Text: ICS93701 Integrated Circuit Systems, Inc. DDR Phase Lock Loop Clock Driver Recommended Application: DDR Clock Driver Pin Configuration GND CLKC0 CLKT0 VDD CLKT1 CLKC1 GND GND CLKC2 CLKT2 VDD SCLK CLK_INT CLK_INC 2 VDDI C AVDD AGND GND CLKC3 CLKT3 VDD CLKT4	Original	ICS93701 66MHz) 120ps 100MHz) 100ps MO-153	PDF
ICS93701 Abstract: TSSOP48 Text: ICS93701 Integrated Circuit Systems, Inc. Advance Information DDR Phase Lock Loop Clock Driver Recommended Application: DDR Clock Driver Product Description/Features: Low skew, low jitter PLL clock driver I2C for functional and output control Feedback pins for input to output synchronization	Original	ICS93701 66MHz) 120ps 100MHz) 100ps 2200pF 0022pF ICS93701 TSSOP48	PDF
0417b1 Abstract: ICS93701 TSSOP48 Text: ICS93701 Integrated Circuit Systems, Inc. DDR Phase Lock Loop Clock Driver Recommended Application: DDR Clock Driver Pin Configuration GND CLKC0 CLKT0 VDD CLKT1 CLKC1 GND GND CLKC2 CLKT2 VDD SCLK CLK_INT CLK_INC 2 VDDI C AVDD AGND GND CLKC3 CLKT3 VDD CLKT4	Original	ICS93701 66MHz) 120ps 100MHz) 100ps MO-153 0417b1 ICS93701 TSSOP48	PDF
ICS93V850 Abstract: TSSOP48 Text: ICS93V850 Integrated Circuit Systems, Inc. Preliminary Product Preview DDR Phase Lock Loop Clock Driver Recommended Application: DDR Clock Driver Pin Configuration Switching Characteristics: • PEAK - PEAK jitter 66MHz : <120ps • PEAK - PEAK jitter (>100MHz): <75ps	Original	ICS93V850 66MHz) 120ps 100MHz) 100ps O-153 ICS93V850 TSSOP48	PDF
ICS954141CFLF Abstract: ics954310bglf ICS9LPRS552AGLF ICS9LPR316AGLF ics952617 ICS954206AGLF ICS9LP505 ICS9LP505-2 ICS954123BFLF L0607 Text: Integrated Device Technology, Inc. 6024 Silver Creek Valley Road, San Jose, CA 95138 PRODUCT/PROCESS CHANGE NOTICE PCN PCN #: L-0607-01R1 Product Affected: Date Effective: Contact: Title: Phone #: Fax #: E-mail: DATE: 6-Oct-06 MEANS OF DISTINGUISHING CHANGED DEVICES:	Original	L-0607-01R1 6-Oct-06 ICS9LPRS588CGLF ICS9P750CGLF ICS9P929CFLF ICS9P935AFLF ICS9P936AFLF ICS9P956AFLF ICS954141CFLF ics954310bglf ICS9LPRS552AGLF ICS9LPR316AGLF ics952617 ICS954206AGLF ICS9LP505 ICS9LP505-2 ICS954123BFLF L0607	PDF
INSSTE32882 Abstract: maxim dallas 2501 P16CV SY100EL16 SN65MLVD201 SN65EPT22 INCU877 INCUA877 ttl crystal oscillator using 7404 P16CV857B Text: Clocks and Timing Guide www.ti.com/clocks 2Q 2009 2 Clocks and Timing Guide ➔ Clocks and Timing Selection Tree Clocks by Function Clock Distribution Non- PLL Fanout Buffers PLL Buffers RF Synthesizers Clock Generation General Purpose Generator/Synthesizer	Original		PDF
ICS-9LRS954A4GLF Abstract: ICS9LRS954A4GLF ICS9LPRS552AGLF ICS951417 ICS9LPRS587EGLF ICS951461BGLF ICS9LPRS365BGLF ICS9LPR363DGLF ICS954310 ICS9LPRS355BGLF Text: Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, CA 96138 PCN #: A0807-02R1 Product Affected: PRODUCT/PROCESS CHANGE NOTICE PCN DATE: January 9, 2009 300 mil SSOP 48, 56 150 mil SOIC 8, 14, 16 300 mil SOIC 16, 18, 20, 24, 28, 32	Original	A0807-02R1 DESCRIPTION4LVC16827APAG IDT74LVC16827APAG8 IDT74LVCH16543APAG IDT74LVCH16543APAG8 IDT74LVCH16646APAG IDT74LVCH16646APAG8 IDT74LVCHR16646APAG IDT74LVCHR16646APAG8 IDTCV110NPAG ICS-9LRS954A4GLF ICS9LRS954A4GLF ICS9LPRS552AGLF ICS951417 ICS9LPRS587EGLF ICS951461BGLF ICS9LPRS365BGLF ICS9LPR363DGLF ICS954310 ICS9LPRS355BGLF	PDF
ICS93701 Abstract: ICS93720 TSSOP48 Text: ICS93720 Integrated Circuit Systems, Inc. Preliminary Product Preview DDR Phase Lock Loop Clock Driver Recommended Application: DDR Clock Driver Pin Configuration Product Description/Features: • Low skew, low jitter PLL clock driver • I2C for functional and output control	Original	ICS93720 66MHz) 120ps 100MHz) 100ps 650ps 950ps ICS93701 ICS93720 TSSOP48	PDF
CYPRESS SEMICONDUCTOR Abstract: nxp Cross-reference AMI Semiconductor DSP ICS9112-17 PIC182 C9850 CDCLVD110 IDT CROSS MC100LVE111 MC100LVEP111 Text: PIN-PIN Compatible Cross-Reference Guide Competitor Name AMI Semiconductor Cypress Semiconductor Cypress Semiconductor Cypress Semiconductor Cypress Semiconductor Cypress Semiconductor Cypress Semiconductor Cypress Semiconductor Cypress Semiconductor Cypress	Original	FS612509 CDCVF2509 CY2212 CDCR61A W152-1/-11 CYPRESS SEMICONDUCTOR nxp Cross-reference AMI Semiconductor DSP ICS9112-17 PIC182 C9850 CDCLVD110 IDT CROSS MC100LVE111 MC100LVEP111	PDF
Untitled Abstract: No abstract text available Text: ICS93v850 Integrated Circuit Systems, Inc. Preliminary Product Preview DDR Phase Lock Loop Clock Driver Recommended Application: DDR Clock Driver Pin Configuration GND CLKC0 CLKT0 VDD CLKT1 CLKC1 GND GND CLKC2 CLKT2 VDD SCLK CLK_INT CLK_INC 2 VDDI C AVDD AGND	Original	ICS93v850 66MHz) 120ps 100MHz) 100ps 650ps 950ps	PDF
ICS954141CFLF Abstract: ICS954123BFLF ICS1883AF Psg16 ICS954148AFLF ICS951417AFLF ICS954128AF ics952603df ics448R ics455r Text: Integrated Device Technology, Inc. 6024 Silver Creek Valley Road, San Jose, CA 95138 PRODUCT/PROCESS CHANGE NOTICE PCN PCN #: L-0607-01 Product Affected: Date Effective: Contact: Title: Phone #: Fax #: E-mail: DATE: 4-Aug-2006 MEANS OF DISTINGUISHING CHANGED DEVICES:	Original	L-0607-01 4-Aug-2006 4-Aug-2006 2510BGI ICSMK3741S ICSMK3754D ICSMK3754S ICSMK3771-17R ICSMK3771-17RLF ICSMK5811G ICS954141CFLF ICS954123BFLF ICS1883AF Psg16 ICS954148AFLF ICS951417AFLF ICS954128AF ics952603df ics448R ics455r	PDF
INSSTE32882 Abstract: maxim dallas 2501 insstua32866 INSSTU32864 INSSTU32866 ttl crystal oscillator using CIRCUIT DIAGRAM INCUA877 ps 2501 dallas GSM home automation block diagram INCU877 Text: Clocks and Timing Guide www.ti.com/clocks 2Q 2009 2 Clocks and Timing Guide ➔ Clocks and Timing Selection Tree Clocks by Function Clock Distribution Non- PLL Fanout Buffers PLL Buffers RF Synthesizers Clock Generation General Purpose Generator/Synthesizer	Original		PDF
Untitled Abstract: No abstract text available Text: ICS93v850 Integrated Circuit Systems, Inc. Preliminary Product Preview DDR Phase Lock Loop Clock Driver Recommended Application: DDR Clock Driver Pin Configuration GND CLKC0 CLKT0 VDD CLKT1 CLKC1 GND GND CLKC2 CLKT2 VDD SCLK CLK_INT CLK_INC 2 VDDI C AVDD AGND	Original	ICS93v850 66MHz) 120ps 100MHz) 100ps 650ps 950ps	PDF

ICS93V850 Abstract: TSSOP48 Text: ICS93v850 Integrated Circuit Systems, Inc. Preliminary Product Preview DDR Phase Lock Loop Clock Driver Recommended Application: DDR Clock Driver Pin Configuration GND CLKC0 CLKT0 VDD CLKT1 CLKC1 GND GND CLKC2 CLKT2 VDD SCLK CLK_INT CLK_INC 2 VDDI C AVDD AGND	Original	ICS93v850 66MHz) 120ps 100MHz) 100ps 650ps 950ps ICS93V850 TSSOP48	PDF
Untitled Abstract: No abstract text available Text: ICS93720 Integrated Circuit Systems, Inc. Preliminary Product Preview DDR Phase Lock Loop Clock Driver Recommended Application: DDR Clock Driver Pin Configuration Product Description/Features: • Low skew, low jitter PLL clock driver • I2C for functional and output control	Original	ICS93720 66MHz) 120ps 100MHz) 100ps 650ps 950ps	PDF
93722CF Abstract: No abstract text available Text: ICS93720 Integrated Circuit Systems, Inc. Preliminary Product Preview DDR Phase Lock Loop Clock Driver Recommended Application: DDR Clock Driver Pin Configuration Product Description/Features: • Low skew, low jitter PLL clock driver • I2C for functional and output control	Original	ICS93720 66MHz) 120ps 100MHz) 100ps 650ps 950ps 93722CF	PDF
Untitled Abstract: No abstract text available Text: ICS93V850 Integrated Circuit Systems, Inc. Preliminary Product Preview DDR Phase Lock Loop Clock Driver Recommended Application: DDR Clock Driver Pin Configuration Switching Characteristics: • PEAK - PEAK jitter 66MHz : <120ps • PEAK - PEAK jitter (>100MHz): <75ps	Original	ICS93V850 66MHz) 120ps 100MHz) 100ps 93V850D 93V850DGT	PDF
101M Abstract: ICS93701 ICS93720 TSSOP48 Text: ICS93720 Integrated Circuit Systems, Inc. Preliminary Product Preview DDR Phase Lock Loop Clock Driver Recommended Application: DDR Clock Driver Pin Configuration Product Description/Features: • Low skew, low jitter PLL clock driver • I2C for functional and output control	Original	ICS93720 66MHz) 120ps 100MHz) 100ps 650ps 950ps 101M ICS93701 ICS93720 TSSOP48	PDF

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ICS93701 Search Results

ICS93701 Datasheets (3)

ICS93701 Datasheets Context Search

ICS93701

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ICS93701

0417b1

ICS93V850

ICS954141CFLF

INSSTE32882

ICS-9LRS954A4GLF

ICS93701

CYPRESS SEMICONDUCTOR

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ICS954141CFLF

INSSTE32882

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ICS93V850

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93722CF

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101M