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    Abstract: No abstract text available
    Text: 3.3V 128K 8Kx16-BIT CACHE-TAG SRAM For 3.3V Processors PRELIMINARY IDT71V218 Integrated Device Technology, Inc. FEATURES: • 8K x 16 Configuration - 14 Com m on I/O TA G Bits - 2 S eparate I/O Status Bits (VLD and D TY) • Optim ized for 256K B cache and 4G B cacheable space


    OCR Scan     		PDF 8Kx16-BIT) IDT71V218 48-pin IDT71V21B 8Kx16 4A25771