C4075
Abstract: 74HCT 74LS CD54HC4075H CD74HC4075 CD74HC4075E CD74HC4075M CD74HCT4075
Text: [ /Title CD74H C4075, CD74H CT4075 /Subject (High Speed CMOS Logic Triple 3Input CD74HC4075, CD74HCT4075 Data sheet acquired from Harris Semiconductor SCHS210 High Speed CMOS Logic Triple 3-Input OR Gate August 1997 Features Description • Buffered Inputs
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Original
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CD74H
C4075,
CT4075)
CD74HC4075,
CD74HCT4075
SCHS210
CD74HCT4075
74HCT
C4075
74LS
CD54HC4075H
CD74HC4075
CD74HC4075E
CD74HC4075M
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PDF
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74AUP1G0832
Abstract: 74AUP1G0832GF 74AUP1G0832GM 74AUP1G0832GW
Text: 74AUP1G0832 Low-power 3-input AND-OR gate Rev. 3 — 5 October 2010 Product data sheet 1. General description The 74AUP1G0832 provides the Boolean function: Y = A x B + C. The user can choose the logic functions OR, AND and AND-OR. All inputs can be connected to VCC or GND.
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Original
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74AUP1G0832
74AUP1G0832
74AUP1G0832GF
74AUP1G0832GM
74AUP1G0832GW
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PDF
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Untitled
Abstract: No abstract text available
Text: [ /Title CD74H C4075, CD74H CT4075 /Subject (High Speed CMOS Logic Triple 3Input CD54HC4075, CD74HC4075, CD54HCT4075, CD74HCT4075 Data sheet acquired from Harris Semiconductor SCHS210F High-Speed CMOS Logic Triple 3-Input OR Gate August 1997 - Revised August 2003
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Original
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CD54HC4075,
CD74HC4075,
CD54HCT4075,
CD74HCT4075
SCHS210F
HC4075
HCT4075
CD74H
C4075,
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PDF
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Untitled
Abstract: No abstract text available
Text: [ /Title CD74H C4075, CD74H CT4075 /Subject (High Speed CMOS Logic Triple 3Input CD54HC4075, CD74HC4075, CD54HCT4075, CD74HCT4075 Data sheet acquired from Harris Semiconductor SCHS210G High-Speed CMOS Logic Triple 3-Input OR Gate August 1997 - Revised June 2006
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Original
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CD74H
C4075,
CT4075)
CD54HC4075,
CD74HC4075,
CD54HCT4075,
CD74HCT4075
SCHS210G
HC4075
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PDF
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Untitled
Abstract: No abstract text available
Text: [ /Title CD74H C4075, CD74H CT4075 /Subject (High Speed CMOS Logic Triple 3Input CD54HC4075, CD74HC4075, CD54HCT4075, CD74HCT4075 Data sheet acquired from Harris Semiconductor SCHS210G High-Speed CMOS Logic Triple 3-Input OR Gate August 1997 - Revised June 2006
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Original
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CD74H
C4075,
CT4075)
CD54HC4075,
CD74HC4075,
CD54HCT4075,
CD74HCT4075
SCHS210G
HC4075
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PDF
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SCHS210G
Abstract: No abstract text available
Text: [ /Title CD74H C4075, CD74H CT4075 /Subject (High Speed CMOS Logic Triple 3Input CD54HC4075, CD74HC4075, CD54HCT4075, CD74HCT4075 Data sheet acquired from Harris Semiconductor SCHS210G High-Speed CMOS Logic Triple 3-Input OR Gate August 1997 - Revised June 2006
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Original
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CD54HC4075,
CD74HC4075,
CD54HCT4075,
CD74HCT4075
SCHS210G
HC4075
HCT4075
CD74H
C4075,
SCHS210G
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PDF
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cd74hc4075
Abstract: No abstract text available
Text: [ /Title CD74H C4075, CD74H CT4075 /Subject (High Speed CMOS Logic Triple 3Input CD54HC4075, CD74HC4075, CD54HCT4075, CD74HCT4075 Data sheet acquired from Harris Semiconductor SCHS210G High-Speed CMOS Logic Triple 3-Input OR Gate August 1997 - Revised June 2006
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Original
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CD54HC4075,
CD74HC4075,
CD54HCT4075,
CD74HCT4075
SCHS210G
HC4075
HCT4075
CD74H
C4075,
cd74hc4075
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PDF
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C4075
Abstract: CD54HC4075 CD54HC4075F3A CD54HCT4075 CD74HC4075 CD74HCT4075 HC4075
Text: [ /Title CD74H C4075, CD74H CT4075 /Subject (High Speed CMOS Logic Triple 3Input CD54HC4075, CD74HC4075, CD54HCT4075, CD74HCT4075 Data sheet acquired from Harris Semiconductor SCHS210F High-Speed CMOS Logic Triple 3-Input OR Gate August 1997 - Revised August 2003
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Original
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CD74H
C4075,
CT4075)
CD54HC4075,
CD74HC4075,
CD54HCT4075,
CD74HCT4075
SCHS210F
HC4075
C4075
CD54HC4075
CD54HC4075F3A
CD54HCT4075
CD74HC4075
CD74HCT4075
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PDF
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Untitled
Abstract: No abstract text available
Text: [ /Title CD74H C4075, CD74H CT4075 /Subject (High Speed CMOS Logic Triple 3Input CD54HC4075, CD74HC4075, CD54HCT4075, CD74HCT4075 Data sheet acquired from Harris Semiconductor SCHS210E High-Speed CMOS Logic Triple 3-Input OR Gate August 1997 - Revised July 2003
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Original
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CD54HC4075,
CD74HC4075,
CD54HCT4075,
CD74HCT4075
SCHS210E
HC4075
HCT4075
CD74H
C4075,
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PDF
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74F51
Abstract: 74F51PC 74F51SC 74F51SJ M14A M14D N14A
Text: 74F51 Dual 2-Wide 2-Input; 2-Wide 3-Input AND-OR-Invert Gate 3-3 AND-OR-INVERT function. General Description This device contains two independent logic units, one performing a 2-2 AND-OR-INVERT and the other performing a Ordering Code: Commercial Package Number
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Original
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74F51
74F51PC
14-Lead
74F51SC
74F51SJ
DS009468-2
DS009468-4
74F51
74F51PC
74F51SC
74F51SJ
M14A
M14D
N14A
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PDF
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HC4075
Abstract: C4075 CD54HC4075 CD54HC4075F3A CD54HCT4075 CD74HC4075 CD74HCT4075
Text: [ /Title CD74H C4075, CD74H CT4075 /Subject (High Speed CMOS Logic Triple 3Input CD54HC4075, CD74HC4075, CD54HCT4075, CD74HCT4075 Data sheet acquired from Harris Semiconductor SCHS210D High-Speed CMOS Logic Triple 3-Input OR Gate August 1997 - Revised May 2003
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Original
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CD74H
C4075,
CT4075)
CD54HC4075,
CD74HC4075,
CD54HCT4075,
CD74HCT4075
SCHS210D
HC4075
C4075
CD54HC4075
CD54HC4075F3A
CD54HCT4075
CD74HC4075
CD74HCT4075
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PDF
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C4075
Abstract: CD54HC4075 CD54HC4075F3A CD54HCT4075 CD74HC4075 CD74HCT4075 HC4075
Text: [ /Title CD74H C4075, CD74H CT4075 /Subject (High Speed CMOS Logic Triple 3Input CD54HC4075, CD74HC4075, CD54HCT4075, CD74HCT4075 Data sheet acquired from Harris Semiconductor SCHS210G High-Speed CMOS Logic Triple 3-Input OR Gate August 1997 - Revised June 2006
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Original
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CD74H
C4075,
CT4075)
CD54HC4075,
CD74HC4075,
CD54HCT4075,
CD74HCT4075
SCHS210G
HC4075
C4075
CD54HC4075
CD54HC4075F3A
CD54HCT4075
CD74HC4075
CD74HCT4075
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PDF
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74F51
Abstract: 74F51PC 74F51SC 74F51SJ M14A M14D MS-001 N14A
Text: Revised September 2000 74F51 Dual 2-Wide 2-Input; 2-Wide 3-Input AND-OR-Invert Gate General Description This device contains two independent logic units, one performing a 2-2 AND-OR-INVERT and the other performing a 3-3 AND-OR-INVERT function. Ordering Code:
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Original
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74F51
74F51SC
14-Lead
MS-120,
74F51SJ
74F51PC
MS-001,
74F51
74F51PC
74F51SC
74F51SJ
M14A
M14D
MS-001
N14A
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PDF
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MC10117
Abstract: MC10117FN MC10117L MC10117P
Text: MC10117 Dual 2-Wide 2-3-Input OR-AND/OR-AND Gate T h e M C 1 0 11 7 i s a d u a l 2 – w i d e 2 – 3 – i n p u t OR–AND/OR–AND–Invert gate. This general purpose logic element is designed for use in data control, such as digital multiplexing or data
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Original
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MC10117
MC10117L
MC10117P
r14525
MC10117/D
MC10117
MC10117FN
MC10117L
MC10117P
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PDF
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C4075
Abstract: CD54HC4075F3A CD54HCT4075F3A CD74HC4075E HC4075
Text: [ /Title CD74H C4075, CD74H CT4075 /Subject (High Speed CMOS Logic Triple 3Input CD54/74HC4075, CD54/74HCT4075 Data sheet acquired from Harris Semiconductor SCHS210C High Speed CMOS Logic Triple 3-Input OR Gate August 1997 - Revised October 2002 Features
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Original
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CD74H
C4075,
CT4075)
CD54/74HC4075,
CD54/74HCT4075
SCHS210C
HC4075
HCT4075
C4075
CD54HC4075F3A
CD54HCT4075F3A
CD74HC4075E
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PDF
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74F51
Abstract: 74F51PC 74F51SC 74F51SJ M14A M14D MS-001 N14A
Text: Revised July 1999 74F51 Dual 2-Wide 2-Input; 2-Wide 3-Input AND-OR-Invert Gate General Description This device contains two independent logic units, one performing a 2-2 AND-OR-INVERT and the other performing a 3-3 AND-OR-INVERT function. Ordering Code: Order Number
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Original
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74F51
74F51SC
14-Lead
MS-120,
74F51SJ
74F51PC
MS-001,
74F51
74F51PC
74F51SC
74F51SJ
M14A
M14D
MS-001
N14A
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PDF
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Untitled
Abstract: No abstract text available
Text: [ /Title CD74H C4075, CD74H CT4075 /Subject (High Speed CMOS Logic Triple 3Input CD54/74HC4075, CD54/74HCT4075 Data sheet acquired from Harris Semiconductor SCHS210A High Speed CMOS Logic Triple 3-Input OR Gate August 1997 - Revised May 2000 Features Description
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Original
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CD54/74HC4075,
CD54/74HCT4075
SCHS210A
HC4075
HCT4075
SCLA008
SZZU001B,
SDYU001N,
SCET004,
SCAU001A,
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PDF
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Untitled
Abstract: No abstract text available
Text: 74LVC1G98 Low-power configurable multiple function gate Rev. 3 — 10 September 2014 Product data sheet 1. General description The 74LVC1G98 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions MUX, AND, OR, NAND,
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Original
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74LVC1G98
74LVC1G98
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PDF
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cd74HC32
Abstract: cd74hct32
Text: P *3 3 S CD54HCT32, CD74HC32, CD74HCT32 High Speed CMOS Logic Quad 2-Input OR Gate September 1997 Features Description • Typical Propagation Delay: 7ns at Vcc = 5V, C L = 15pF, Ta = 25°C The Harris CD74HC32, CD74HCT32 contain four 2-input OR gates in one package. Logic gates utilize silicon gate CMOS
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OCR Scan
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CD54HCT32,
CD74HC32,
CD74HCT32
CD74HCT32
74HCT
cd74HC32
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PDF
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Untitled
Abstract: No abstract text available
Text: C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC4071BP/BF/BFNJC4072BP/BF TC4075BP/BF TC4071B QUAD 2 INPUT OR GATE TC4072B DUAL 4 INPUT OR GATE TC4075B TRIPLE 3 INPUT OR GATE TC4071B, TC4075BP / BF and TC4072BP / BF are positive logic OR gates w ith tw o inputs, three inputs and fo ur inputs
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OCR Scan
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TC4071BP/BF/BFNJC4072BP/BF
TC4075BP/BF
TC4071B
TC4072B
TC4075B
TC4071B,
TC4075BP
TC4072BP
TC4071B
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PDF
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Untitled
Abstract: No abstract text available
Text: S CD74HC4075, CD74HCT4075 Semiconductor y High Speed CMOS Logic Triple 3-Input OR Gate August 1997 Features Description • Buffered Inputs The Harris CD74HC4075, CD74HCT4075 logic gates utilize silicon-gate CMOS technology to achieve operating speeds similar to LSTTL gates with the low power consumption of
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OCR Scan
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CD74HC4075,
CD74HCT4075
CD74HCT4075
74HCT
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PDF
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TC4072B
Abstract: TC4075BP TC4072BP TC4071B
Text: TC4071BP/BF/ BFN, TC4072BP/BF C2MOS DIGITAL INTEGRATED CIRCUIT T P ^ n 7 K B D / B C SILICON MONOLITHIC I IrrU / JD I7 Dr TC4071B QUAD 2 INPUT OR GATE TC4072B DUAL 4 INPUT OR GATE TC4075B TRIPLE 3 INPUT OR GATE TC4071B, TC4075BP/ BF and TC4072BP / BF are positive logic
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OCR Scan
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TC4071BP/BF/
TC4072BP/BF
TC4071B
TC4072B
TC4075B
TC4071B,
TC4075BP/
TC4072BP
TC4071B
TC4071B)
TC4075BP
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PDF
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ic 7451 pin configuration
Abstract: 74 LS 00 Logic Gates
Text: 7451, LS51, S51 Signetics Gates '51, 'S51 Dual 2-Wide 2-Input AND-OR-lnvert Gate LS51 Dual 2-Wide 3-Input, 2-Wide 2-Input AND-OR-lnvert Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 7451 11ns 5.7mA 74LS51
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OCR Scan
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74LS51
74S51
N7451N,
N74LS51N,
N74S51N
N74LS51D,
N74S51D
ic 7451 pin configuration
74 LS 00 Logic Gates
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PDF
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7451 pin configuration of logic circuit
Abstract: No abstract text available
Text: 7451, LS51, S51 Gates Signetìcs '51, S51 Dual 2-Wide 2-Input AND-OR-lnvert Gate LS51 Dual 2-Wlde 3-Input, 2-Wlde 2-Input AND-OR-lnvert Gate Logic Products Product Specification FUNCTION TABLE '51, 'S51, h 'LS51 TYPE INPUTS OUTPUT A B c D Y H X H X X H X H
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OCR Scan
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74LS51
74S51
N7451N,
N74LS51N,
N74S51N
N74LS51D,
N74S51D
7451 pin configuration of logic circuit
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PDF
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