MIC2794
Abstract: No abstract text available
Text: MIC2794 Supervisor with Fast Propagation Delay and Capacitor-Programmable Reset Delay General Description Features The MIC2794 is a low-current supervisor with capacitorprogrammable reset delay time. It provides an active-low manual reset input and active-low open-drain, active-low
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MIC2794
MIC2794
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Untitled
Abstract: No abstract text available
Text: MIC2795/6/7/8/9 Supervisor with Fast Propagation Delay and Capacitor-Programmable Reset Delay General Description Features The MIC2795/6/7/8/9 is a low-current supervisor with capacitor programmable reset delay time. It provides an active-low or active-high enable input and active-high or
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MIC2795/6/7/8/9
MIC2795/6/7/8/9
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MM74HC04M
Abstract: 74HC 74LS M14A M14D MM74HC04 MM74HC04MTC MM74HC04N MM74HC04SJ MTC14
Text: MM74HC04 Hex Inverter Features General Description • Typical propagation delay: 8ns The MM74HC04 inverters utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS integrated circuits.
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MM74HC04
MM74HC04
MM74HC04M
74HC
74LS
M14A
M14D
MM74HC04MTC
MM74HC04N
MM74HC04SJ
MTC14
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Untitled
Abstract: No abstract text available
Text: MM74HC04 Hex Inverter Features General Description • Typical propagation delay: 8ns The MM74HC04 inverters utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS integrated circuits.
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MM74HC04
MM74HC04
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schematic diagram online DC to AC inverter
Abstract: 74HCU 74LS M14A M14D MM74HCU04 MM74HCU04M MM74HCU04MTC MM74HCU04N MM74HCU04SJ
Text: MM74HCU04 Hex Inverter Features General Description • Typical propagation delay: 7ns The MM74HCU04 inverters utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS integrated circuits.
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MM74HCU04
MM74HCU04
74HCU
schematic diagram online DC to AC inverter
74LS
M14A
M14D
MM74HCU04M
MM74HCU04MTC
MM74HCU04N
MM74HCU04SJ
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MM74HC04M
Abstract: 74HC 74LS M14A M14D MM74HC04 MM74HC04MTC MM74HC04N MM74HC04SJ MTC14
Text: MM74HC04 Hex Inverter Features General Description • Typical propagation delay: 8ns The MM74HC04 inverters utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS integrated circuits.
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MM74HC04
MM74HC04
MM74HC04M
74HC
74LS
M14A
M14D
MM74HC04MTC
MM74HC04N
MM74HC04SJ
MTC14
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schematic diagram online DC to AC inverter
Abstract: power inverter schematic diagram 74HCU 74LS M14A M14D MM74HCU04 MM74HCU04M MM74HCU04MTC MM74HCU04N
Text: MM74HCU04 Hex Inverter Features General Description • Typical propagation delay: 7ns The MM74HCU04 inverters utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS integrated circuits.
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MM74HCU04
MM74HCU04
74HCU
schematic diagram online DC to AC inverter
power inverter schematic diagram
74LS
M14A
M14D
MM74HCU04M
MM74HCU04MTC
MM74HCU04N
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sn1302
Abstract: 6562E
Text: MCP6561/1R/1U/2/4 1.8V Low-Power Push-Pull Output Comparator Features Description • Propagation Delay at 1.8VDD: - 56 ns typical High-to-Low - 49 ns (typical) Low-to-High • Low Quiescent Current: 100 µA (typical) • Input Offset Voltage: ±3 mV (typical)
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MCP6561/1R/1U/2/4
SC70-5,
OT-23-5,
MCP6561/1R/1U/2/4
intern778-366
DS22139C-page
sn1302
6562E
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Untitled
Abstract: No abstract text available
Text: MCP6561/1R/1U/2/4 1.8V Low Power Push-Pull Output Comparator Features Description • Propagation Delay at 1.8VDD: - 56 ns typical High to Low - 49 ns (typical) Low to High • Low Quiescent Current: 100 µA (typical) • Input Offset Voltage: ±3 mV (typical)
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MCP6561/1R/1U/2/4
SC70-5,
OT-23-5,
DS22139B-page
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DS22139B
Abstract: 6U_ SOT-23-5 marking code AC sot 23-5 multi vibrator circuit MCP656X SC70-5 MCP6562E DS00895
Text: MCP6561/1R/1U/2/4 1.8V Low Power Push-Pull Output Comparator Features Description • Propagation Delay at 1.8VDD: - 56 ns typical High to Low - 49 ns (typical) Low to High • Low Quiescent Current: 100 µA (typical) • Input Offset Voltage: ±3 mV (typical)
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MCP6561/1R/1U/2/4
SC70-5,
OT-23-5,
DS22139B-page
DS22139B
6U_ SOT-23-5
marking code AC sot 23-5
multi vibrator circuit
MCP656X
SC70-5
MCP6562E
DS00895
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rtd 2660
Abstract: marking code SS SOT23 SOT R23 6562E 2 sc 5066 marking 1P sot-23 mobile rf power amplifier transistor multi vibrator circuit MCP656X SC70-5
Text: MCP6561/1R/2/4 1.8V Low Power Push-Pull Output Comparator Features Description • Propagation Delay at 1.8VDD: - 56 ns typical High to Low - 49 ns (typical) Low to High • Low Quiescent Current: 100 µA (typical) • Input Offset Voltage: ±3 mV (typical)
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MCP6561/1R/2/4
SC70-5,
OT-23-5,
DS22139A-page
rtd 2660
marking code SS SOT23
SOT R23
6562E
2 sc 5066
marking 1P sot-23
mobile rf power amplifier transistor
multi vibrator circuit
MCP656X
SC70-5
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CY2DP3120
Abstract: CY2DP3120AI CY2DP3120AIT CY2DP3120AXI CY2DP3120AXIT MC100ES6221
Text: FastEdge Series CY2DP3120 1:20 Differential Fanout Buffer Features Functional Description The CY2DP3120 is a low-skew, low propagation delay 1-to-20 differential fanout buffer targeted to meet the requirements of high-performance clock and data distribution applications. The
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CY2DP3120
CY2DP3120
1-to-20
CY2DP3120AI
CY2DP3120AIT
CY2DP3120AXI
CY2DP3120AXIT
MC100ES6221
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CY2DP3120
Abstract: CY2DP3120AI CY2DP3120AIT CY2DP3120AXI CY2DP3120AXIT MC100ES6221
Text: FastEdge Series CY2DP3120 1:20 Differential Clock/Data Fanout Buffer Features Functional Description The CY2DP3120 is a low-skew, low propagation delay 1-to-20 differential fanout buffer targeted to meet the requirements of high-performance clock and data distribution applications. The
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CY2DP3120
CY2DP3120
1-to-20
CY2DP3120AI
CY2DP3120AIT
CY2DP3120AXI
CY2DP3120AXIT
MC100ES6221
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Untitled
Abstract: No abstract text available
Text: MM74HC86 Quad 2-Input Exclusive OR Gate Description Features • • Typical Propagation Delay: 9ns Wide Operating Voltage Range: 2–6V Low Input Current: 1mA Maximum Low Quiescent Current: 20mA Max. 74 Series Output Drive Capability: 10 LS-TTL Loads
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MM74HC86
MM74HC86
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Untitled
Abstract: No abstract text available
Text: FastEdge Series CY2PP318 1:8 Differential Clock/Data Fanout Buffer Features Functional Description The CY2PP318 is a low-skew, low propagation delay 1-to-8 differential fanout buffer targeted to meet the requirements of high-performance clock and data distribution applications. The
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CY2PP318
28-pin
CY2PP318
150ps
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Untitled
Abstract: No abstract text available
Text: FastEdge Series CY2PP318 1:8 Differential Clock/Data Fanout Buffer Features Functional Description The CY2PP318 is a low-skew, low propagation delay 1-to-8 differential fanout buffer targeted to meet the requirements of high-performance clock and data distribution applications. The
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CY2PP318
28-pin
CY2PP318
150ps
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Untitled
Abstract: No abstract text available
Text: FastEdge Series CY2DP314 PRELIMINARY 1 of 2:4 Differential Fanout Buffer Features Description The CY2DP314 is a low-skew, low propagation delay 2-to-4 differential fanout buffer targeted to meet the requirements of high-performance clock and data distribution applications. The
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CY2DP314
50-ps
100-ps
500-ps
20-pin
CY2DP314
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CY2DP3120
Abstract: CY2DP3120AI CY2DP3120AIT CY2DP3120AXI CY2DP3120AXIT MC100ES6221
Text: FastEdge Series CY2DP3120 1:20 Differential Clock/Data Fanout Buffer Features Functional Description The CY2DP3120 is a low-skew, low propagation delay 1-to-20 differential fanout buffer targeted to meet the requirements of high-performance clock and data distribution applications. The
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CY2DP3120
CY2DP3120
1-to-20
CY2DP3120AI
CY2DP3120AIT
CY2DP3120AXI
CY2DP3120AXIT
MC100ES6221
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PALCE22V10
Abstract: PALLV22V10Z PD3024
Text: FINAL IND: -25 PALLV22V10Z-25 Low-Voltage, Zero-Power 24-Pin EE CMOS Versatile PAL Device DISTINCTIVE CHARACTERISTICS • Low-voltage operation, 3.3 V JEDEC compatible ■ Zero-power CMOS technology — 30 µA standby current — 25-ns propagation delay tPD
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PALLV22V10Z-25
24-Pin
25-ns
17661D-17
PALCE22V10
PALLV22V10Z
PD3024
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Untitled
Abstract: No abstract text available
Text: FastEdge Series CY2DP314 PRELIMINARY 1 of 2:4 Differential Fanout Buffer Features Description The CY2DP314 is a low-skew, low propagation delay 2-to-4 differential fanout buffer targeted to meet the requirements of high-performance clock and data distribution applications. The
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CY2DP314
50-ps
100-ps
500-ps
20-pin
CY2DP314
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CY2PP318
Abstract: CY2PP318JI CY2PP318JIT
Text: FastEdge Series CY2PP318 PRELIMINARY 1 of 2:8 Differential Fanout Buffer Features Description The CY2PP318 is a low-skew, low propagation delay 1-to-8 differential fanout buffer targeted to meet the requirements of high-performance clock and data distribution applications. The
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CY2PP318
CY2PP318
50-ps
500-ps
CY2PP318JI
CY2PP318JIT
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Crosspoint Switches
Abstract: SD5200
Text: PIN CONFIGURATION FEATURES SD5000 APPLICATIONS • Low input capacitance — 2.4pF • Low feedback capacitance— 0.3pF • Low output capacitance— 1.3pF • ±10V analog signal range • Low propagation delay time— 600ps • Low on resistance— 3011
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600ps
107dB
SD5000
SD5100
SD5200
SD5000,
SD5100,
Crosspoint Switches
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Untitled
Abstract: No abstract text available
Text: * LOW-POWER 9-BIT INVERTER SYNERGY SEMICONDUCTOR FEATURES DESCRIPTION Max. propagation delay of 700ps Ie e SY100S321 The SY100S321 is a monolithic 9-bit inverter. The device contains nine inverting buffer gates with single input and output. min. of -55m A
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700ps
SY100S321
SY100S321
F100K
SY100S321DC
D24-1
SY100S321FC
F24-1
SY100S321JC
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Untitled
Abstract: No abstract text available
Text: * LOW-POWER 9-BIT INVERTER SYNERGY SEMICONDUCTOR FEATURES DESCRIPTION Max. propagation delay of 700ps Iee SY100S321 The SY100S321 is a m onolithic 9-bit inverter. The device contains nine inverting buffer gates with single input and output. min. o f-55 m A
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700ps
SY100S321
SY100S321
F100K
24-pin
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