NB6N11SMNG
Abstract: No abstract text available
Text: NB6N11S 3.3 V 1:2 AnyLevelE Input to LVDS Fanout Buffer / Translator Description The NB6N11S is a differential 1:2 Clock or Data Receiver and will accept AnyLevel input signals: LVPECL, CML, LVCMOS, LVTTL, or LVDS. These signals will be translated to LVDS and two identical
|
Original
|
NB6N11S
NB6N11S/D
NB6N11SMNG
|
PDF
|
Untitled
Abstract: No abstract text available
Text: EURO QUARTZ Frequency range 50.01MHz to 200MHz 15pF load Frequency range 50.01MHz to 320MHz (10pF load) LVCMOS Output Supply Voltage 3.3 VDC Ultra low jitter less than 1ps GF42 CMOS VCXO 11.4 x 9.6 x 2.5mm 4 pad SMD OUTLINE & DIMENSIONS DESCRIPTION GF42 VCXOs, are packaged in an industry-standard, 4 pad, 11.4mm
|
Original
|
01MHz
200MHz
320MHz
Start-92dBc/Hz
-120dBc/Hz
-132dBc/Hz
-128dBc/Hz
-140dBc/Hz
-150dBc/Hz
|
PDF
|
Frequency multiplier 1mHz 10MHz
Abstract: No abstract text available
Text: EURO QUARTZ Frequency range 50.01MHz to 800MHz LVCMOS Output Supply Voltage 3.3 VDC High Q fundamental mode crystal Low jitter multiplier circuit GW64 CMOS VCXO 11.4 x 9.6 x 4.7mm 6 pad SMD OUTLINE & DIMENSIONS DESCRIPTION GW64 VCXOs, are packaged in an industry-standard, 6 pad, 11.4mm
|
Original
|
01MHz
800MHz
20ppm
100Hz
10kHz
100kHz
10MHz
25MHz
-65dBc/Hz
-95dBc/Hz
Frequency multiplier 1mHz 10MHz
|
PDF
|
Untitled
Abstract: No abstract text available
Text: DS90CR287,DS90CR288A DS90CR287/DS90CR288A +3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link-85 MHz Literature Number: SNLS056F DS90CR287/DS90CR288A +3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link-85 MHz General Description Features The DS90CR287 transmitter converts 28 bits of LVCMOS/
|
Original
|
DS90CR287
DS90CR288A
DS90CR287/DS90CR288A
28-Bit
Link-85
SNLS056F
|
PDF
|
Crystal 32 MHz 12 pF
Abstract: No abstract text available
Text: PL610-6x 1.8V to 3.3V XO IC’s for 312.5kHz to 60MHz, with Standby FEATURES DESCRIPTION • Single IC to cover up to 60MHz output frequency. Direct oscillation operation Input Frequency: Fundamental crystal: o 10MHz to 60MHz Output Frequency: LVCMOS
|
Original
|
PL610-6x
60MHz,
60MHz
10MHz
60MHz
40MHz
PL610-6x
25kHz
60MHz.
Crystal 32 MHz 12 pF
|
PDF
|
marking xt 12
Abstract: MTC1
Text: 1.8V to 3.3V XO IC’s for 156.25kHz to 60MHz, with Standby FEATURES DESCRIPTION • Single IC to cover up to 60MHz output frequency. Direct oscillation operation Input Frequency: Fundamental crystal: o 5MHz to 60MHz Output Frequency: LVCMOS o 156.25kHz to 60MHz 2.5V & 3.3V
|
Original
|
25kHz
60MHz,
60MHz
60MHz
40MHz
PL610-6x
marking xt 12
MTC1
|
PDF
|
SY100EPT22V
Abstract: SY89322V SY89322VMGTR SY89322VMITR footprint mlf amkor exposed pad M9999-060809
Text: 3.3V/5V DUAL LVTTL/LVCMOS-to-DIFFERENTIAL LVPECL TRANSLATOR Micrel, Inc. SY89322V Precision Edge SY89322V FEATURES • ■ ■ ■ ■ ■ ■ ■ 3.3V and 5V power supply option 300ps typical propagation delay Differential LVPECL outputs PNP LVTTL inputs for minimal loading
|
Original
|
SY89322V
300ps
800MHz
SY89322V
M9999-060809
SY100EPT22V
SY89322VMGTR
SY89322VMITR
footprint mlf
amkor exposed pad
M9999-060809
|
PDF
|
E55361
Abstract: HCPL-050L HCPL-053L HCPL-250L HCPL-253L
Text: AgilentHCPL-250L/050L/253L/053L LVTTL/LVCMOS Compatible 3.3 V Optocouplers 1 Mb/s Data Sheet Features • Low power consumption • High speed: 1 Mb/s • LVTTL/LVCMOS compatible Description These diode-transistor optocouplers use an insulating layer between a
|
Original
|
AgilentHCPL-250L/050L/253L/053L
5988-7880EN
5989-0300EN
E55361
HCPL-050L
HCPL-053L
HCPL-250L
HCPL-253L
|
PDF
|
Untitled
Abstract: No abstract text available
Text: K4M64163PH - R B G/F Mobile-SDRAM 1M x 16Bit x 4 Banks Mobile SDRAM in 54CSP FEATURES GENERAL DESCRIPTION • 1.8V power supply. The K4M64163PH is 67,108,864 bits synchronous high data • LVCMOS compatible with multiplexed address. rate Dynamic RAM organized as 4 x 1,048,576 words by 16 bits,
|
Original
|
K4M64163PH
16Bit
54CSP
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SK100ELT23W Dual Differential PECL to CMOS/TTL Translator PRELIMINARY HIGH-PERFORMANCE PRODUCTS Description Features The SK100ELT23W is a dual differential PECL to CMOS/TTL or LVCMOS/LVTTL Translator. Since PECL Positive ECL levels are used, only positive VCC and
|
Original
|
SK100ELT23W
SK100ELT23W
ELT23W
MC100ELT23
MC100LVMarking
SK100ELT23WD
SK100ELT23WDT
SK100ELT23WU
|
PDF
|
27BSC
Abstract: AS1154 AS1156
Text: D a ta S he e t A S 11 5 6 / A S 11 5 4 S i n g l e / D u a l LV D S D r i v e r 1 General Description 2 Key Features The AS1156/AS1154 is a Single/Dual Flow-Through LVDS Low-Voltage Differential Signaling Line Driver which accepts and converts LVTTL/LVCMOS input levels into LVDS output signals. The device is perfect for
|
Original
|
AS1156/AS1154
800Mbps
250ps
TIA/EIA-644
800Mbps
400MHz)
27BSC
AS1154
AS1156
|
PDF
|
LQFP32
Abstract: LQFP-32 MC100 MC100EPT622 MC100EPT622FA MC100EPT622FAR2
Text: MC100EPT622 3.3V LVTTL/LVCMOS to LVPECL Translator The MC100EPT622 is a 10- Bit LVTTL/LVCMOS to LVPECL translator. Because LVPECL Positive ECL levels are used only +3.3 V and ground are required. The device has an OR- ed enable input which can accept either LVPECL (ENPECL) or TTL/LVCMOS inputs
|
Original
|
MC100EPT622
MC100EPT622
MC100
EPT622
LQFP-32
r14525
MC100EPT622/D
LQFP32
LQFP-32
MC100
MC100EPT622FA
MC100EPT622FAR2
|
PDF
|
Untitled
Abstract: No abstract text available
Text: CDCE949 CDCEL949 www.ti.com SCAS844D – AUGUST 2007 – REVISED MARCH 2010 Programmable 4-PLL VCXO Clock Synthesizer with 1.8V, 2.5V and 3.3V LVCMOS Outputs Check for Samples: CDCE949, CDCEL949 FEATURES • 1 • Member of Programmable Clock Generator Family
|
Original
|
CDCE949
CDCEL949
SCAS844D
CDCE949,
CDCE913/CDCEL913:
CDCE925/CDCEL925:
CDCE937/CDCEL937:
CDCE949/CDCEL949:
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Standard Products UT16MX110/111/112 Analog Multiplexer Preliminary Data Sheet January 24, 2012 FEATURES INTRODUCTION The UT16MX110/111/112 are low voltage analog multiplexers with a convenient LVCMOS 3.3V digital interface. The analog muxes have Break-Before-Make architecture with a low
|
Original
|
UT16MX110/111/112
16-to-1
100Signal
UT16MX112)
UT16MX110)
UT16MX111)
MIL-STD-883,
|
PDF
|
|
Untitled
Abstract: No abstract text available
Text: EURO QUARTZ GW576 CMOS VCXO 7 x 5 x 1.8mm 6 pad SMD Frequency range 50.01MHz to 800MHz LVCMOS Output Supply Voltage 3.3 VDC High Q fundamental mode crystal Low jitter multiplier circuit DESCRIPTION GW576 VCXOs, are packaged in an industry-standard, 6 pad, 7mm x
|
Original
|
GW576
01MHz
800MHz
96MHz
20ppm
100Hz
10kHz
100kHz
|
PDF
|
Untitled
Abstract: No abstract text available
Text: HD74SSTL16857 14-bit SSTL_2 Registered Buffer HITACHI ADE-205-223B Z Preliminary 3rd. Edition February 1999 Description The HD74SSTL16857 is a 14-bit registered buffer designed for 2.3 V to 3.6 V Vcc operation and LVCMOS reset (RESET) input / SSTL_2 data (D) inputs and CLK input.
|
OCR Scan
|
HD74SSTL16857
14-bit
ADE-205-223B
HD74SSTL16857
TTP-48DC
|
PDF
|
MachXO sysIO Usage Guide
Abstract: LCMXO256C-4M100C LCMXO2280 lcmxo640c-3tn100i LCMXO640C-3FT256C LCMXO1200 LCMXO256 LCMXO2280E-4M132I LVCMOS15 LVCMOS25
Text: MachXO Family Data Sheet Version 02.3_4W February 2007 MachXO Family Data Sheet Introduction April 2006 Data Sheet • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2 − LVTTL
|
Original
|
TN1086)
TN1087)
TN1097)
MachXO sysIO Usage Guide
LCMXO256C-4M100C
LCMXO2280
lcmxo640c-3tn100i
LCMXO640C-3FT256C
LCMXO1200
LCMXO256
LCMXO2280E-4M132I
LVCMOS15
LVCMOS25
|
PDF
|
Untitled
Abstract: No abstract text available
Text: NB3F8L3005C 3.3V / 2.5V / 1.8V / 1.5V 1:5 LVCMOS Fanout Buffer Description The NB3F8L3005C is a 2:1:5 Clock / Data fanout buffer operating on a 3.3 V / 2.5 V Core VDD and two flexible 3.3 V / 2.5 V / 1.8 V / 1.5 V VDDOx supplies which must be equal or less than VDD.
|
Original
|
NB3F8L3005C
NB3F8L3005C
NB3F8L3005C/D
|
PDF
|
Untitled
Abstract: No abstract text available
Text: ICS8701I LOW SKEW, ÷1, ÷2 CLOCK GENERATOR GENERAL DESCRIPTION FEATURES The ICS8701I is a low skew, ÷1, ÷2 Clock Generator. The low impedance LVCMOS outputs are designed to drive 50Ω series or parallel terminated transmission lines. The effective fanout can be increased from 20 to 40 by utilizing
|
Original
|
ICS8701I
ICS8701I
250MHz
8701CYI
|
PDF
|
Untitled
Abstract: No abstract text available
Text: 16-Bit Long-Reach Video Automotive Grade SERDES ISL76322 Features The ISL76322 is a serializer/deserializer of LVCMOS parallel video data. The video data presented to the serializer on the parallel LVCMOS bus is serialized into a high-speed differential signal. This differential signal is converted back to parallel video
|
Original
|
16-Bit
ISL76322
ISL76322
8b/10b
JESD-MO220.
203mm.
FN7611
|
PDF
|
Untitled
Abstract: No abstract text available
Text: ICS8535-01 LOW SKEW, 1-to-4 LVCMOS/LVTTL-TO3.3V LVPECL FANOUT BUFFER GENERAL DESCRIPTION FEATURES The ICS8535-01 is a low skew, high performance 1-to-4 LVCMOS/LVTTL-to-3.3V LVPECL fanout buffer. The ICS853501 has two single ended clock inputs. the single ended clock
|
Original
|
ICS8535-01
ICS8535-01
ICS853501
|
PDF
|
LVDS register
Abstract: No abstract text available
Text: CDCE72010 SCAS858C – JUNE 2008 – REVISED JANUARY 2012 www.ti.com Ten Output High Performance Clock Synchronizer, Jitter Cleaner, and Clock Distributor Check for Samples: CDCE72010 FEATURES 1 • • • • • • • • • • • • • • High Performance LVPECL, LVDS, LVCMOS
|
Original
|
CDCE72010
SCAS858C
500MHz
250MHz)
800MHz
250MHz
LVDS register
|
PDF
|
DS90CF365MTD
Abstract: DS90CF365 DS90C385 DS90C365 DS90C365MTD DS90C385MTD MTD56 SLC64A
Text: DS90C385/DS90C365 +3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display FPD Link-85 MHz, +3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link-85 MHz General Description The DS90C385 transmitter converts 28 bits of LVCMOS/ LVTTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link.
|
Original
|
DS90C385/DS90C365
24-Bit
Link-85
18-Bit
DS90C385
DS90CF365MTD
DS90CF365
DS90C365
DS90C365MTD
DS90C385MTD
MTD56
SLC64A
|
PDF
|
XEP20
Abstract: SY100EPT20V SY100EPT20VZC SY100EPT20VZCTR SY10EPT20V SY10EPT20VZC SY10EPT20VZCTR
Text: Micrel, Inc. ECL Pro SY10EPT20V ECL Pro™ SY100EPT20V 5V/3.3V LVTTL/LVCMOS-to-DIFFERENTIAL LVPECL TRANSLATOR SY10EPT20V SY100EPT20V FEATURES • ■ ■ ■ ■ ■ ■ ■ 3.3V and 5V power supply options 300ps typical propagation delay Differential LVPECL output
|
Original
|
SY10EPT20V
SY100EPT20V
300ps
800MHz
SY10/100EPT20V
M9999-111605
XEP20
SY100EPT20V
SY100EPT20VZC
SY100EPT20VZCTR
SY10EPT20V
SY10EPT20VZC
SY10EPT20VZCTR
|
PDF
|