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    LVDS LEVEL TRANSLATOR Search Results

    LVDS LEVEL TRANSLATOR Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74LV4T126FK Toshiba Electronic Devices & Storage Corporation Level shifter, Unidirectional, 1-Bit x 4 Single Supply Bus Buffer, US14, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    74LV4T125FK Toshiba Electronic Devices & Storage Corporation Level shifter, Unidirectional, 1-Bit x 4 Single Supply Bus Buffer, US14, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL1T04NX Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Inverter with Level Shifting, XSON6, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL2T125FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer with Level Shifting, SOT-765 (US8), 2 in 1, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL2T126FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer with Level Shifting, SOT-765 (US8), 2 in 1, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation

    LVDS LEVEL TRANSLATOR Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    IN50

    Abstract: MAX9180 MAX9181 MAX9181EXT-T SC70-6
    Text: 19-2415; Rev 0; 4/02 Low-Jitter, Low-Noise LVPECL-to-LVDS Level Translator in an SC70 Package The MAX9181 is an LVPECL-to-LVDS level translator that accepts a single LVPECL input and translates it to a single LVDS output. It is ideal for interfacing between


    Original     		MAX9181 400Mbps MAX9181 IN50 MAX9180 MAX9181EXT-T SC70-6 PDF

    LVPECL multidrop

    Abstract: IN50 MAX9180 MAX9181 MAX9181EXT-T SC70-6
    Text: 19-2415; Rev 1; 2/04 Low-Jitter, Low-Noise LVPECL-to-LVDS Level Translator in an SC70 Package The MAX9181 is an LVPECL-to-LVDS level translator that accepts a single LVPECL input and translates it to a single LVDS output. It is ideal for interfacing between


    Original     		MAX9181 400Mbps MAX9181 LVPECL multidrop IN50 MAX9180 MAX9181EXT-T SC70-6 PDF

    Untitled

    Abstract: No abstract text available
    Text: 19-2415; Rev 1; 2/04 Low-Jitter, Low-Noise LVPECL-to-LVDS Level Translator in an SC70 Package The MAX9181 is an LVPECL-to-LVDS level translator that accepts a single LVPECL input and translates it to a single LVDS output. It is ideal for interfacing between


    Original     		MAX9181 MAX9181â 400Mbps MAX9181 PDF

    PTN3310

    Abstract: PTN3311 PTN3331 PTN3332 PTN3341 PTN3342 SN65LVDS31 SN65LVDS32 PTN3331DH-T LVDS Line Driver
    Text: PTN3331/PTN3332/ PTN3341/PTN3342 High-performance LVDS-LVTTL Quad Logic Translator Family Philips offers a family of high-speed logic translator ICs, providing a solution for logic level translation between LVTTL and LVDS low-voltage differential signaling . These LVDS drivers and


    Original     		PTN3331/PTN3332/ PTN3341/PTN3342 PTN3331 PTN3341 PTN3332 PTN3342 PTN3310 PTN3311 PTN3331 PTN3332 PTN3341 PTN3342 SN65LVDS31 SN65LVDS32 PTN3331DH-T LVDS Line Driver PDF

    VSC6431

    Abstract: VSC6432 LVDS Level Translator 333Mhz
    Text: 333Mb/s 17 Channel LVDS to ECL Level Translator VSC6431 Product Brief Timing and Logic Features: • 333MHz / 333Mb/s Operation • ECL to LVDS Level Translation • -2V and +3.3V Power Supplies • 128-pin Thermally Enhanced PQFP Packaging • 16 Data Channels, 1 Frame


    Original     		333Mb/s VSC6431 333MHz 128-pin VSC6431 300mV 600mV VSC6432 LVDS Level Translator PDF

    Untitled

    Abstract: No abstract text available
    Text: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES DESCRIPTION D Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML D Signaling Rates1 up to 1.5 Gbps D CML Compatible Output Directly Drives


    Original     		SN65CML100 SLLS547 PDF

    C101

    Abstract: SN65CML100 SN65CML100D SN65CML100DGK TDS6604
    Text: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES DESCRIPTION D Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML D Signaling Rates1 up to 1.5 Gbps D CML Compatible Output Directly Drives


    Original     		SN65CML100 SLLS547 622-MHz C101 SN65CML100 SN65CML100D SN65CML100DGK TDS6604 PDF

    vid 200

    Abstract: C101 SN65CML100 SN65CML100D SN65CML100DGK TDS6604
    Text: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES DESCRIPTION D Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML D Signaling Rates1 up to 1.5 Gbps D CML Compatible Output Directly Drives


    Original     		SN65CML100 SLLS547 622-MHz vid 200 C101 SN65CML100 SN65CML100D SN65CML100DGK TDS6604 PDF

    Untitled

    Abstract: No abstract text available
    Text: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES DESCRIPTION D Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML D Signaling Rates1 up to 1.5 Gbps D CML Compatible Output Directly Drives


    Original     		SN65CML100 SLLS547 SN65CML100DR SN65CML100, SN65CML100EVM SN65CML100 SLLC131, PDF

    vid 200

    Abstract: C101 SN65CML100 SN65CML100D SN65CML100DGK TDS6604
    Text: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES DESCRIPTION D Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML D Signaling Rates1 up to 1.5 Gbps D CML Compatible Output Directly Drives


    Original     		SN65CML100 SLLS547 622-MHz vid 200 C101 SN65CML100 SN65CML100D SN65CML100DGK TDS6604 PDF

    uA 741

    Abstract: BIT3107 VSC6431 internal circuit diagram of IC 741
    Text: VITESSE SEMICONDUCTOR CORPORATION Data Sheet VSC6431 LVDS to ECL Level Translator Features • • • • • 333MHz/ 333Mb/s Operation Data and Frame Retiming LVDS Inputs and ECL Outputs 16 Data Channels 1 Frame Channel with 4 Fanouts • 1 Clock Channel with 2 Fanouts


    Original     		VSC6431 333MHz/ 333Mb/s 128-Pin VSC6431 VSC6431, theVSC6432, G52329-0, uA 741 BIT3107 internal circuit diagram of IC 741 PDF

    Untitled

    Abstract: No abstract text available
    Text: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES • • • • • • • • • • DESCRIPTION Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML Signaling Rates 1 up to 1.5 Gbps


    Original     		SN65CML100 SLLS547 TIA/EIA-644) PDF

    Untitled

    Abstract: No abstract text available
    Text: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES • • • • • • • • • • DESCRIPTION Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML Signaling Rates 1 up to 1.5 Gbps


    Original     		SN65CML100 SLLS547 TIA/EIA-644) PDF

    TT-800

    Abstract: C101 SN65CML100 SN65CML100D SN65CML100DGK TDS6604 MV-1Y
    Text: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES • • • • • • • • • • DESCRIPTION Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML Signaling Rates 1 up to 1.5 Gbps


    Original     		SN65CML100 SLLS547 622-MHz TT-800 C101 SN65CML100 SN65CML100D SN65CML100DGK TDS6604 MV-1Y PDF

    Untitled

    Abstract: No abstract text available
    Text: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES • • • • • • • • • • DESCRIPTION Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML Signaling Rates 1 up to 1.5 Gbps


    Original     		SN65CML100 SLLS547 TIA/EIA-644) PDF

    Untitled

    Abstract: No abstract text available
    Text: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES • • • • • • • • • • DESCRIPTION Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML Signaling Rates 1 up to 1.5 Gbps


    Original     		SN65CML100 SLLS547 PDF

    C101

    Abstract: SN65CML100 SN65CML100D SN65CML100DGK TDS6604
    Text: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES • • • • • • • • • • DESCRIPTION Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML Signaling Rates 1 up to 1.5 Gbps


    Original     		SN65CML100 SLLS547 622-MHz C101 SN65CML100 SN65CML100D SN65CML100DGK TDS6604 PDF

    Untitled

    Abstract: No abstract text available
    Text: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES • • • • • • • • • • DESCRIPTION Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML Signaling Rates 1 up to 1.5 Gbps


    Original     		SN65CML100 SLLS547 TIA/EIA-644) PDF

    C101

    Abstract: SN65CML100 SN65CML100D SN65CML100DGK TDS6604 CML100
    Text: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES • • • • • • • • • • DESCRIPTION Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML Signaling Rates 1 up to 1.5 Gbps


    Original     		SN65CML100 SLLS547 622-MHz C101 SN65CML100 SN65CML100D SN65CML100DGK TDS6604 CML100 PDF

    Untitled

    Abstract: No abstract text available
    Text: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES • • • • • • • • • • DESCRIPTION Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML Signaling Rates 1 up to 1.5 Gbps


    Original     		SN65CML100 SLLS547 TIA/EIA-644) PDF

    Untitled

    Abstract: No abstract text available
    Text: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES • • • • • • • • • • DESCRIPTION Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML Signaling Rates 1 up to 1.5 Gbps


    Original     		SN65CML100 SLLS547 TIA/EIA-644) PDF

    Untitled

    Abstract: No abstract text available
    Text: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES • • • • • • • • • • DESCRIPTION Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML Signaling Rates 1 up to 1.5 Gbps


    Original     		SN65CML100 SLLS547 TIA/EIA-644) PDF

    N100

    Abstract: NB100LVEP91 NB100LVEP91DW NB100LVEP91DWR2
    Text: NB100LVEP91 2.5V / 3.3V Any Level Positive Input to −2.5V / −3.3V / −5V NECL Output Translator The NB100LVEP91 is a triple any level positive input to NECL output translator. The device accepts LVPECL, LVTTL, LVCMOS, HSTL, CML or LVDS signals, and translates them to differential


    Original     		NB100LVEP91 NB100LVEP91 LVEP91 r14525 NB100LVEP91/D N100 NB100LVEP91DW NB100LVEP91DWR2 PDF

    N100

    Abstract: NB100LVEP91 NB100LVEP91DW NB100LVEP91DWR2 qfn-24 4x4
    Text: NB100LVEP91 2.5V / 3.3V Any Level Positive Input to −2.5V / −3.3V / −5V NECL Output Translator The NB100LVEP91 is a triple any level positive input to NECL output translator. The device accepts LVPECL, LVTTL, LVCMOS, HSTL, CML or LVDS signals, and translates them to differential


    Original     		NB100LVEP91 NB100LVEP91 LVEP91 r14525 NB100LVEP91/D N100 NB100LVEP91DW NB100LVEP91DWR2 qfn-24 4x4 PDF